1 /* SPDX-License-Identifier: GPL-2.0+ */ 1 2 /* 3 * Copyright (C) 2016 Freescale Semiconductor, 4 * Copyright 2017~2018 NXP 5 */ 6 7 #ifndef _IMX8QM_PADS_H 8 #define _IMX8QM_PADS_H 9 10 /* pin id */ 11 #define IMX8QM_SIM0_CLK 12 #define IMX8QM_SIM0_RST 13 #define IMX8QM_SIM0_IO 14 #define IMX8QM_SIM0_PD 15 #define IMX8QM_SIM0_POWER_EN 16 #define IMX8QM_SIM0_GPIO0_00 17 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM 18 #define IMX8QM_M40_I2C0_SCL 19 #define IMX8QM_M40_I2C0_SDA 20 #define IMX8QM_M40_GPIO0_00 21 #define IMX8QM_M40_GPIO0_01 22 #define IMX8QM_M41_I2C0_SCL 23 #define IMX8QM_M41_I2C0_SDA 24 #define IMX8QM_M41_GPIO0_00 25 #define IMX8QM_M41_GPIO0_01 26 #define IMX8QM_GPT0_CLK 27 #define IMX8QM_GPT0_CAPTURE 28 #define IMX8QM_GPT0_COMPARE 29 #define IMX8QM_GPT1_CLK 30 #define IMX8QM_GPT1_CAPTURE 31 #define IMX8QM_GPT1_COMPARE 32 #define IMX8QM_UART0_RX 33 #define IMX8QM_UART0_TX 34 #define IMX8QM_UART0_RTS_B 35 #define IMX8QM_UART0_CTS_B 36 #define IMX8QM_UART1_TX 37 #define IMX8QM_UART1_RX 38 #define IMX8QM_UART1_RTS_B 39 #define IMX8QM_UART1_CTS_B 40 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH 41 #define IMX8QM_SCU_PMIC_MEMC_ON 42 #define IMX8QM_SCU_WDOG_OUT 43 #define IMX8QM_PMIC_I2C_SDA 44 #define IMX8QM_PMIC_I2C_SCL 45 #define IMX8QM_PMIC_EARLY_WARNING 46 #define IMX8QM_PMIC_INT_B 47 #define IMX8QM_SCU_GPIO0_00 48 #define IMX8QM_SCU_GPIO0_01 49 #define IMX8QM_SCU_GPIO0_02 50 #define IMX8QM_SCU_GPIO0_03 51 #define IMX8QM_SCU_GPIO0_04 52 #define IMX8QM_SCU_GPIO0_05 53 #define IMX8QM_SCU_GPIO0_06 54 #define IMX8QM_SCU_GPIO0_07 55 #define IMX8QM_SCU_BOOT_MODE0 56 #define IMX8QM_SCU_BOOT_MODE1 57 #define IMX8QM_SCU_BOOT_MODE2 58 #define IMX8QM_SCU_BOOT_MODE3 59 #define IMX8QM_SCU_BOOT_MODE4 60 #define IMX8QM_SCU_BOOT_MODE5 61 #define IMX8QM_LVDS0_GPIO00 62 #define IMX8QM_LVDS0_GPIO01 63 #define IMX8QM_LVDS0_I2C0_SCL 64 #define IMX8QM_LVDS0_I2C0_SDA 65 #define IMX8QM_LVDS0_I2C1_SCL 66 #define IMX8QM_LVDS0_I2C1_SDA 67 #define IMX8QM_LVDS1_GPIO00 68 #define IMX8QM_LVDS1_GPIO01 69 #define IMX8QM_LVDS1_I2C0_SCL 70 #define IMX8QM_LVDS1_I2C0_SDA 71 #define IMX8QM_LVDS1_I2C1_SCL 72 #define IMX8QM_LVDS1_I2C1_SDA 73 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO 74 #define IMX8QM_MIPI_DSI0_I2C0_SCL 75 #define IMX8QM_MIPI_DSI0_I2C0_SDA 76 #define IMX8QM_MIPI_DSI0_GPIO0_00 77 #define IMX8QM_MIPI_DSI0_GPIO0_01 78 #define IMX8QM_MIPI_DSI1_I2C0_SCL 79 #define IMX8QM_MIPI_DSI1_I2C0_SDA 80 #define IMX8QM_MIPI_DSI1_GPIO0_00 81 #define IMX8QM_MIPI_DSI1_GPIO0_01 82 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGP 83 #define IMX8QM_MIPI_CSI0_MCLK_OUT 84 #define IMX8QM_MIPI_CSI0_I2C0_SCL 85 #define IMX8QM_MIPI_CSI0_I2C0_SDA 86 #define IMX8QM_MIPI_CSI0_GPIO0_00 87 #define IMX8QM_MIPI_CSI0_GPIO0_01 88 #define IMX8QM_MIPI_CSI1_MCLK_OUT 89 #define IMX8QM_MIPI_CSI1_GPIO0_00 90 #define IMX8QM_MIPI_CSI1_GPIO0_01 91 #define IMX8QM_MIPI_CSI1_I2C0_SCL 92 #define IMX8QM_MIPI_CSI1_I2C0_SDA 93 #define IMX8QM_HDMI_TX0_TS_SCL 94 #define IMX8QM_HDMI_TX0_TS_SDA 95 #define IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO 96 #define IMX8QM_ESAI1_FSR 97 #define IMX8QM_ESAI1_FST 98 #define IMX8QM_ESAI1_SCKR 99 #define IMX8QM_ESAI1_SCKT 100 #define IMX8QM_ESAI1_TX0 101 #define IMX8QM_ESAI1_TX1 102 #define IMX8QM_ESAI1_TX2_RX3 103 #define IMX8QM_ESAI1_TX3_RX2 104 #define IMX8QM_ESAI1_TX4_RX1 105 #define IMX8QM_ESAI1_TX5_RX0 106 #define IMX8QM_SPDIF0_RX 107 #define IMX8QM_SPDIF0_TX 108 #define IMX8QM_SPDIF0_EXT_CLK 109 #define IMX8QM_SPI3_SCK 110 #define IMX8QM_SPI3_SDO 111 #define IMX8QM_SPI3_SDI 112 #define IMX8QM_SPI3_CS0 113 #define IMX8QM_SPI3_CS1 114 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB 115 #define IMX8QM_ESAI0_FSR 116 #define IMX8QM_ESAI0_FST 117 #define IMX8QM_ESAI0_SCKR 118 #define IMX8QM_ESAI0_SCKT 119 #define IMX8QM_ESAI0_TX0 120 #define IMX8QM_ESAI0_TX1 121 #define IMX8QM_ESAI0_TX2_RX3 122 #define IMX8QM_ESAI0_TX3_RX2 123 #define IMX8QM_ESAI0_TX4_RX1 124 #define IMX8QM_ESAI0_TX5_RX0 125 #define IMX8QM_MCLK_IN0 126 #define IMX8QM_MCLK_OUT0 127 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC 128 #define IMX8QM_SPI0_SCK 129 #define IMX8QM_SPI0_SDO 130 #define IMX8QM_SPI0_SDI 131 #define IMX8QM_SPI0_CS0 132 #define IMX8QM_SPI0_CS1 133 #define IMX8QM_SPI2_SCK 134 #define IMX8QM_SPI2_SDO 135 #define IMX8QM_SPI2_SDI 136 #define IMX8QM_SPI2_CS0 137 #define IMX8QM_SPI2_CS1 138 #define IMX8QM_SAI1_RXC 139 #define IMX8QM_SAI1_RXD 140 #define IMX8QM_SAI1_RXFS 141 #define IMX8QM_SAI1_TXC 142 #define IMX8QM_SAI1_TXD 143 #define IMX8QM_SAI1_TXFS 144 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT 145 #define IMX8QM_ADC_IN7 146 #define IMX8QM_ADC_IN6 147 #define IMX8QM_ADC_IN5 148 #define IMX8QM_ADC_IN4 149 #define IMX8QM_ADC_IN3 150 #define IMX8QM_ADC_IN2 151 #define IMX8QM_ADC_IN1 152 #define IMX8QM_ADC_IN0 153 #define IMX8QM_MLB_SIG 154 #define IMX8QM_MLB_CLK 155 #define IMX8QM_MLB_DATA 156 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT 157 #define IMX8QM_FLEXCAN0_RX 158 #define IMX8QM_FLEXCAN0_TX 159 #define IMX8QM_FLEXCAN1_RX 160 #define IMX8QM_FLEXCAN1_TX 161 #define IMX8QM_FLEXCAN2_RX 162 #define IMX8QM_FLEXCAN2_TX 163 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR 164 #define IMX8QM_USB_SS3_TC0 165 #define IMX8QM_USB_SS3_TC1 166 #define IMX8QM_USB_SS3_TC2 167 #define IMX8QM_USB_SS3_TC3 168 #define IMX8QM_COMP_CTL_GPIO_3V3_USB3IO 169 #define IMX8QM_USDHC1_RESET_B 170 #define IMX8QM_USDHC1_VSELECT 171 #define IMX8QM_USDHC2_RESET_B 172 #define IMX8QM_USDHC2_VSELECT 173 #define IMX8QM_USDHC2_WP 174 #define IMX8QM_USDHC2_CD_B 175 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP 176 #define IMX8QM_ENET0_MDIO 177 #define IMX8QM_ENET0_MDC 178 #define IMX8QM_ENET0_REFCLK_125M_25M 179 #define IMX8QM_ENET1_REFCLK_125M_25M 180 #define IMX8QM_ENET1_MDIO 181 #define IMX8QM_ENET1_MDC 182 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT 183 #define IMX8QM_QSPI1A_SS0_B 184 #define IMX8QM_QSPI1A_SS1_B 185 #define IMX8QM_QSPI1A_SCLK 186 #define IMX8QM_QSPI1A_DQS 187 #define IMX8QM_QSPI1A_DATA3 188 #define IMX8QM_QSPI1A_DATA2 189 #define IMX8QM_QSPI1A_DATA1 190 #define IMX8QM_QSPI1A_DATA0 191 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1 192 #define IMX8QM_QSPI0A_DATA0 193 #define IMX8QM_QSPI0A_DATA1 194 #define IMX8QM_QSPI0A_DATA2 195 #define IMX8QM_QSPI0A_DATA3 196 #define IMX8QM_QSPI0A_DQS 197 #define IMX8QM_QSPI0A_SS0_B 198 #define IMX8QM_QSPI0A_SS1_B 199 #define IMX8QM_QSPI0A_SCLK 200 #define IMX8QM_QSPI0B_SCLK 201 #define IMX8QM_QSPI0B_DATA0 202 #define IMX8QM_QSPI0B_DATA1 203 #define IMX8QM_QSPI0B_DATA2 204 #define IMX8QM_QSPI0B_DATA3 205 #define IMX8QM_QSPI0B_DQS 206 #define IMX8QM_QSPI0B_SS0_B 207 #define IMX8QM_QSPI0B_SS1_B 208 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0 209 #define IMX8QM_PCIE_CTRL0_CLKREQ_B 210 #define IMX8QM_PCIE_CTRL0_WAKE_B 211 #define IMX8QM_PCIE_CTRL0_PERST_B 212 #define IMX8QM_PCIE_CTRL1_CLKREQ_B 213 #define IMX8QM_PCIE_CTRL1_WAKE_B 214 #define IMX8QM_PCIE_CTRL1_PERST_B 215 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP 216 #define IMX8QM_USB_HSIC0_DATA 217 #define IMX8QM_USB_HSIC0_STROBE 218 #define IMX8QM_CALIBRATION_0_HSIC 219 #define IMX8QM_CALIBRATION_1_HSIC 220 #define IMX8QM_EMMC0_CLK 221 #define IMX8QM_EMMC0_CMD 222 #define IMX8QM_EMMC0_DATA0 223 #define IMX8QM_EMMC0_DATA1 224 #define IMX8QM_EMMC0_DATA2 225 #define IMX8QM_EMMC0_DATA3 226 #define IMX8QM_EMMC0_DATA4 227 #define IMX8QM_EMMC0_DATA5 228 #define IMX8QM_EMMC0_DATA6 229 #define IMX8QM_EMMC0_DATA7 230 #define IMX8QM_EMMC0_STROBE 231 #define IMX8QM_EMMC0_RESET_B 232 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX 233 #define IMX8QM_USDHC1_CLK 234 #define IMX8QM_USDHC1_CMD 235 #define IMX8QM_USDHC1_DATA0 236 #define IMX8QM_USDHC1_DATA1 237 #define IMX8QM_CTL_NAND_RE_P_N 238 #define IMX8QM_USDHC1_DATA2 239 #define IMX8QM_USDHC1_DATA3 240 #define IMX8QM_CTL_NAND_DQS_P_N 241 #define IMX8QM_USDHC1_DATA4 242 #define IMX8QM_USDHC1_DATA5 243 #define IMX8QM_USDHC1_DATA6 244 #define IMX8QM_USDHC1_DATA7 245 #define IMX8QM_USDHC1_STROBE 246 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2 247 #define IMX8QM_USDHC2_CLK 248 #define IMX8QM_USDHC2_CMD 249 #define IMX8QM_USDHC2_DATA0 250 #define IMX8QM_USDHC2_DATA1 251 #define IMX8QM_USDHC2_DATA2 252 #define IMX8QM_USDHC2_DATA3 253 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3 254 #define IMX8QM_ENET0_RGMII_TXC 255 #define IMX8QM_ENET0_RGMII_TX_CTL 256 #define IMX8QM_ENET0_RGMII_TXD0 257 #define IMX8QM_ENET0_RGMII_TXD1 258 #define IMX8QM_ENET0_RGMII_TXD2 259 #define IMX8QM_ENET0_RGMII_TXD3 260 #define IMX8QM_ENET0_RGMII_RXC 261 #define IMX8QM_ENET0_RGMII_RX_CTL 262 #define IMX8QM_ENET0_RGMII_RXD0 263 #define IMX8QM_ENET0_RGMII_RXD1 264 #define IMX8QM_ENET0_RGMII_RXD2 265 #define IMX8QM_ENET0_RGMII_RXD3 266 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENET 267 #define IMX8QM_ENET1_RGMII_TXC 268 #define IMX8QM_ENET1_RGMII_TX_CTL 269 #define IMX8QM_ENET1_RGMII_TXD0 270 #define IMX8QM_ENET1_RGMII_TXD1 271 #define IMX8QM_ENET1_RGMII_TXD2 272 #define IMX8QM_ENET1_RGMII_TXD3 273 #define IMX8QM_ENET1_RGMII_RXC 274 #define IMX8QM_ENET1_RGMII_RX_CTL 275 #define IMX8QM_ENET1_RGMII_RXD0 276 #define IMX8QM_ENET1_RGMII_RXD1 277 #define IMX8QM_ENET1_RGMII_RXD2 278 #define IMX8QM_ENET1_RGMII_RXD3 279 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENET 280 281 /* 282 * format: <pin_id mux_mode> 283 */ 284 #define IMX8QM_SIM0_CLK_DMA_SIM0_CLK 285 #define IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00 286 #define IMX8QM_SIM0_RST_DMA_SIM0_RST 287 #define IMX8QM_SIM0_RST_LSIO_GPIO0_IO01 288 #define IMX8QM_SIM0_IO_DMA_SIM0_IO 289 #define IMX8QM_SIM0_IO_LSIO_GPIO0_IO02 290 #define IMX8QM_SIM0_PD_DMA_SIM0_PD 291 #define IMX8QM_SIM0_PD_DMA_I2C3_SCL 292 #define IMX8QM_SIM0_PD_LSIO_GPIO0_IO03 293 #define IMX8QM_SIM0_POWER_EN_DMA_SIM0_POWER_EN 294 #define IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA 295 #define IMX8QM_SIM0_POWER_EN_LSIO_GPIO0_IO04 296 #define IMX8QM_SIM0_GPIO0_00_DMA_SIM0_POWER_EN 297 #define IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05 298 #define IMX8QM_M40_I2C0_SCL_M40_I2C0_SCL 299 #define IMX8QM_M40_I2C0_SCL_M40_UART0_RX 300 #define IMX8QM_M40_I2C0_SCL_M40_GPIO0_IO02 301 #define IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06 302 #define IMX8QM_M40_I2C0_SDA_M40_I2C0_SDA 303 #define IMX8QM_M40_I2C0_SDA_M40_UART0_TX 304 #define IMX8QM_M40_I2C0_SDA_M40_GPIO0_IO03 305 #define IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07 306 #define IMX8QM_M40_GPIO0_00_M40_GPIO0_IO00 307 #define IMX8QM_M40_GPIO0_00_M40_TPM0_CH0 308 #define IMX8QM_M40_GPIO0_00_DMA_UART4_RX 309 #define IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08 310 #define IMX8QM_M40_GPIO0_01_M40_GPIO0_IO01 311 #define IMX8QM_M40_GPIO0_01_M40_TPM0_CH1 312 #define IMX8QM_M40_GPIO0_01_DMA_UART4_TX 313 #define IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09 314 #define IMX8QM_M41_I2C0_SCL_M41_I2C0_SCL 315 #define IMX8QM_M41_I2C0_SCL_M41_UART0_RX 316 #define IMX8QM_M41_I2C0_SCL_M41_GPIO0_IO02 317 #define IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10 318 #define IMX8QM_M41_I2C0_SDA_M41_I2C0_SDA 319 #define IMX8QM_M41_I2C0_SDA_M41_UART0_TX 320 #define IMX8QM_M41_I2C0_SDA_M41_GPIO0_IO03 321 #define IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11 322 #define IMX8QM_M41_GPIO0_00_M41_GPIO0_IO00 323 #define IMX8QM_M41_GPIO0_00_M41_TPM0_CH0 324 #define IMX8QM_M41_GPIO0_00_DMA_UART3_RX 325 #define IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12 326 #define IMX8QM_M41_GPIO0_01_M41_GPIO0_IO01 327 #define IMX8QM_M41_GPIO0_01_M41_TPM0_CH1 328 #define IMX8QM_M41_GPIO0_01_DMA_UART3_TX 329 #define IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13 330 #define IMX8QM_GPT0_CLK_LSIO_GPT0_CLK 331 #define IMX8QM_GPT0_CLK_DMA_I2C1_SCL 332 #define IMX8QM_GPT0_CLK_LSIO_KPP0_COL4 333 #define IMX8QM_GPT0_CLK_LSIO_GPIO0_IO14 334 #define IMX8QM_GPT0_CAPTURE_LSIO_GPT0_CAPTURE 335 #define IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA 336 #define IMX8QM_GPT0_CAPTURE_LSIO_KPP0_COL5 337 #define IMX8QM_GPT0_CAPTURE_LSIO_GPIO0_IO15 338 #define IMX8QM_GPT0_COMPARE_LSIO_GPT0_COMPARE 339 #define IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT 340 #define IMX8QM_GPT0_COMPARE_LSIO_KPP0_COL6 341 #define IMX8QM_GPT0_COMPARE_LSIO_GPIO0_IO16 342 #define IMX8QM_GPT1_CLK_LSIO_GPT1_CLK 343 #define IMX8QM_GPT1_CLK_DMA_I2C2_SCL 344 #define IMX8QM_GPT1_CLK_LSIO_KPP0_COL7 345 #define IMX8QM_GPT1_CLK_LSIO_GPIO0_IO17 346 #define IMX8QM_GPT1_CAPTURE_LSIO_GPT1_CAPTURE 347 #define IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA 348 #define IMX8QM_GPT1_CAPTURE_LSIO_KPP0_ROW4 349 #define IMX8QM_GPT1_CAPTURE_LSIO_GPIO0_IO18 350 #define IMX8QM_GPT1_COMPARE_LSIO_GPT1_COMPARE 351 #define IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT 352 #define IMX8QM_GPT1_COMPARE_LSIO_KPP0_ROW5 353 #define IMX8QM_GPT1_COMPARE_LSIO_GPIO0_IO19 354 #define IMX8QM_UART0_RX_DMA_UART0_RX 355 #define IMX8QM_UART0_RX_SCU_UART0_RX 356 #define IMX8QM_UART0_RX_LSIO_GPIO0_IO20 357 #define IMX8QM_UART0_TX_DMA_UART0_TX 358 #define IMX8QM_UART0_TX_SCU_UART0_TX 359 #define IMX8QM_UART0_TX_LSIO_GPIO0_IO21 360 #define IMX8QM_UART0_RTS_B_DMA_UART0_RTS_B 361 #define IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT 362 #define IMX8QM_UART0_RTS_B_DMA_UART2_RX 363 #define IMX8QM_UART0_RTS_B_LSIO_GPIO0_IO22 364 #define IMX8QM_UART0_CTS_B_DMA_UART0_CTS_B 365 #define IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT 366 #define IMX8QM_UART0_CTS_B_DMA_UART2_TX 367 #define IMX8QM_UART0_CTS_B_LSIO_GPIO0_IO23 368 #define IMX8QM_UART1_TX_DMA_UART1_TX 369 #define IMX8QM_UART1_TX_DMA_SPI3_SCK 370 #define IMX8QM_UART1_TX_LSIO_GPIO0_IO24 371 #define IMX8QM_UART1_RX_DMA_UART1_RX 372 #define IMX8QM_UART1_RX_DMA_SPI3_SDO 373 #define IMX8QM_UART1_RX_LSIO_GPIO0_IO25 374 #define IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B 375 #define IMX8QM_UART1_RTS_B_DMA_SPI3_SDI 376 #define IMX8QM_UART1_RTS_B_DMA_UART1_CTS_B 377 #define IMX8QM_UART1_RTS_B_LSIO_GPIO0_IO26 378 #define IMX8QM_UART1_CTS_B_DMA_UART1_CTS_B 379 #define IMX8QM_UART1_CTS_B_DMA_SPI3_CS0 380 #define IMX8QM_UART1_CTS_B_DMA_UART1_RTS_B 381 #define IMX8QM_UART1_CTS_B_LSIO_GPIO0_IO27 382 #define IMX8QM_SCU_PMIC_MEMC_ON_SCU_GPIO0_IOXX 383 #define IMX8QM_SCU_WDOG_OUT_SCU_WDOG0_WDOG_OUT 384 #define IMX8QM_PMIC_I2C_SDA_SCU_PMIC_I2C_SDA 385 #define IMX8QM_PMIC_I2C_SCL_SCU_PMIC_I2C_SCL 386 #define IMX8QM_PMIC_EARLY_WARNING_SCU_PMIC_EAR 387 #define IMX8QM_PMIC_INT_B_SCU_DIMX8QMMIC_INT_B 388 #define IMX8QM_SCU_GPIO0_00_SCU_GPIO0_IO00 389 #define IMX8QM_SCU_GPIO0_00_SCU_UART0_RX 390 #define IMX8QM_SCU_GPIO0_00_LSIO_GPIO0_IO28 391 #define IMX8QM_SCU_GPIO0_01_SCU_GPIO0_IO01 392 #define IMX8QM_SCU_GPIO0_01_SCU_UART0_TX 393 #define IMX8QM_SCU_GPIO0_01_LSIO_GPIO0_IO29 394 #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IO02 395 #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IOXX_PMI 396 #define IMX8QM_SCU_GPIO0_02_LSIO_GPIO0_IO30 397 #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IO03 398 #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IOXX_PMI 399 #define IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31 400 #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IO04 401 #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IOXX_PMI 402 #define IMX8QM_SCU_GPIO0_04_LSIO_GPIO1_IO00 403 #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IO05 404 #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IOXX_PMI 405 #define IMX8QM_SCU_GPIO0_05_LSIO_GPIO1_IO01 406 #define IMX8QM_SCU_GPIO0_06_SCU_GPIO0_IO06 407 #define IMX8QM_SCU_GPIO0_06_SCU_TPM0_CH0 408 #define IMX8QM_SCU_GPIO0_06_LSIO_GPIO1_IO02 409 #define IMX8QM_SCU_GPIO0_07_SCU_GPIO0_IO07 410 #define IMX8QM_SCU_GPIO0_07_SCU_TPM0_CH1 411 #define IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_ 412 #define IMX8QM_SCU_GPIO0_07_LSIO_GPIO1_IO03 413 #define IMX8QM_SCU_BOOT_MODE0_SCU_DSC_BOOT_MOD 414 #define IMX8QM_SCU_BOOT_MODE1_SCU_DSC_BOOT_MOD 415 #define IMX8QM_SCU_BOOT_MODE2_SCU_DSC_BOOT_MOD 416 #define IMX8QM_SCU_BOOT_MODE3_SCU_DSC_BOOT_MOD 417 #define IMX8QM_SCU_BOOT_MODE4_SCU_DSC_BOOT_MOD 418 #define IMX8QM_SCU_BOOT_MODE4_SCU_PMIC_I2C_SCL 419 #define IMX8QM_SCU_BOOT_MODE5_SCU_DSC_BOOT_MOD 420 #define IMX8QM_SCU_BOOT_MODE5_SCU_PMIC_I2C_SDA 421 #define IMX8QM_LVDS0_GPIO00_LVDS0_GPIO0_IO00 422 #define IMX8QM_LVDS0_GPIO00_LVDS0_PWM0_OUT 423 #define IMX8QM_LVDS0_GPIO00_LSIO_GPIO1_IO04 424 #define IMX8QM_LVDS0_GPIO01_LVDS0_GPIO0_IO01 425 #define IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 426 #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_I2C0_SCL 427 #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_GPIO0_IO02 428 #define IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 429 #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_I2C0_SDA 430 #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_GPIO0_IO03 431 #define IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 432 #define IMX8QM_LVDS0_I2C1_SCL_LVDS0_I2C1_SCL 433 #define IMX8QM_LVDS0_I2C1_SCL_DMA_UART2_TX 434 #define IMX8QM_LVDS0_I2C1_SCL_LSIO_GPIO1_IO08 435 #define IMX8QM_LVDS0_I2C1_SDA_LVDS0_I2C1_SDA 436 #define IMX8QM_LVDS0_I2C1_SDA_DMA_UART2_RX 437 #define IMX8QM_LVDS0_I2C1_SDA_LSIO_GPIO1_IO09 438 #define IMX8QM_LVDS1_GPIO00_LVDS1_GPIO0_IO00 439 #define IMX8QM_LVDS1_GPIO00_LVDS1_PWM0_OUT 440 #define IMX8QM_LVDS1_GPIO00_LSIO_GPIO1_IO10 441 #define IMX8QM_LVDS1_GPIO01_LVDS1_GPIO0_IO01 442 #define IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 443 #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_I2C0_SCL 444 #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_GPIO0_IO02 445 #define IMX8QM_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12 446 #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_I2C0_SDA 447 #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_GPIO0_IO03 448 #define IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13 449 #define IMX8QM_LVDS1_I2C1_SCL_LVDS1_I2C1_SCL 450 #define IMX8QM_LVDS1_I2C1_SCL_DMA_UART3_TX 451 #define IMX8QM_LVDS1_I2C1_SCL_LSIO_GPIO1_IO14 452 #define IMX8QM_LVDS1_I2C1_SDA_LVDS1_I2C1_SDA 453 #define IMX8QM_LVDS1_I2C1_SDA_DMA_UART3_RX 454 #define IMX8QM_LVDS1_I2C1_SDA_LSIO_GPIO1_IO15 455 #define IMX8QM_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2 456 #define IMX8QM_MIPI_DSI0_I2C0_SCL_LSIO_GPIO1_I 457 #define IMX8QM_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2 458 #define IMX8QM_MIPI_DSI0_I2C0_SDA_LSIO_GPIO1_I 459 #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GP 460 #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PW 461 #define IMX8QM_MIPI_DSI0_GPIO0_00_LSIO_GPIO1_I 462 #define IMX8QM_MIPI_DSI0_GPIO0_01_MIPI_DSI0_GP 463 #define IMX8QM_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_I 464 #define IMX8QM_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2 465 #define IMX8QM_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_I 466 #define IMX8QM_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2 467 #define IMX8QM_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_I 468 #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GP 469 #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PW 470 #define IMX8QM_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_I 471 #define IMX8QM_MIPI_DSI1_GPIO0_01_MIPI_DSI1_GP 472 #define IMX8QM_MIPI_DSI1_GPIO0_01_LSIO_GPIO1_I 473 #define IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_AC 474 #define IMX8QM_MIPI_CSI0_MCLK_OUT_LSIO_GPIO1_I 475 #define IMX8QM_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2 476 #define IMX8QM_MIPI_CSI0_I2C0_SCL_LSIO_GPIO1_I 477 #define IMX8QM_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2 478 #define IMX8QM_MIPI_CSI0_I2C0_SDA_LSIO_GPIO1_I 479 #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI0_GP 480 #define IMX8QM_MIPI_CSI0_GPIO0_00_DMA_I2C0_SCL 481 #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI1_I2 482 #define IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_I 483 #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI0_GP 484 #define IMX8QM_MIPI_CSI0_GPIO0_01_DMA_I2C0_SDA 485 #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI1_I2 486 #define IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_I 487 #define IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_AC 488 #define IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_I 489 #define IMX8QM_MIPI_CSI1_GPIO0_00_MIPI_CSI1_GP 490 #define IMX8QM_MIPI_CSI1_GPIO0_00_DMA_UART4_RX 491 #define IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_I 492 #define IMX8QM_MIPI_CSI1_GPIO0_01_MIPI_CSI1_GP 493 #define IMX8QM_MIPI_CSI1_GPIO0_01_DMA_UART4_TX 494 #define IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_I 495 #define IMX8QM_MIPI_CSI1_I2C0_SCL_MIPI_CSI1_I2 496 #define IMX8QM_MIPI_CSI1_I2C0_SCL_LSIO_GPIO2_I 497 #define IMX8QM_MIPI_CSI1_I2C0_SDA_MIPI_CSI1_I2 498 #define IMX8QM_MIPI_CSI1_I2C0_SDA_LSIO_GPIO2_I 499 #define IMX8QM_HDMI_TX0_TS_SCL_HDMI_TX0_I2C0_S 500 #define IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 501 #define IMX8QM_HDMI_TX0_TS_SCL_LSIO_GPIO2_IO02 502 #define IMX8QM_HDMI_TX0_TS_SDA_HDMI_TX0_I2C0_S 503 #define IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 504 #define IMX8QM_HDMI_TX0_TS_SDA_LSIO_GPIO2_IO03 505 #define IMX8QM_ESAI1_FSR_AUD_ESAI1_FSR 506 #define IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04 507 #define IMX8QM_ESAI1_FST_AUD_ESAI1_FST 508 #define IMX8QM_ESAI1_FST_AUD_SPDIF0_EXT_CLK 509 #define IMX8QM_ESAI1_FST_LSIO_GPIO2_IO05 510 #define IMX8QM_ESAI1_SCKR_AUD_ESAI1_SCKR 511 #define IMX8QM_ESAI1_SCKR_LSIO_GPIO2_IO06 512 #define IMX8QM_ESAI1_SCKT_AUD_ESAI1_SCKT 513 #define IMX8QM_ESAI1_SCKT_AUD_SAI2_RXC 514 #define IMX8QM_ESAI1_SCKT_AUD_SPDIF0_EXT_CLK 515 #define IMX8QM_ESAI1_SCKT_LSIO_GPIO2_IO07 516 #define IMX8QM_ESAI1_TX0_AUD_ESAI1_TX0 517 #define IMX8QM_ESAI1_TX0_AUD_SAI2_RXD 518 #define IMX8QM_ESAI1_TX0_AUD_SPDIF0_RX 519 #define IMX8QM_ESAI1_TX0_LSIO_GPIO2_IO08 520 #define IMX8QM_ESAI1_TX1_AUD_ESAI1_TX1 521 #define IMX8QM_ESAI1_TX1_AUD_SAI2_RXFS 522 #define IMX8QM_ESAI1_TX1_AUD_SPDIF0_TX 523 #define IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 524 #define IMX8QM_ESAI1_TX2_RX3_AUD_ESAI1_TX2_RX3 525 #define IMX8QM_ESAI1_TX2_RX3_AUD_SPDIF0_RX 526 #define IMX8QM_ESAI1_TX2_RX3_LSIO_GPIO2_IO10 527 #define IMX8QM_ESAI1_TX3_RX2_AUD_ESAI1_TX3_RX2 528 #define IMX8QM_ESAI1_TX3_RX2_AUD_SPDIF0_TX 529 #define IMX8QM_ESAI1_TX3_RX2_LSIO_GPIO2_IO11 530 #define IMX8QM_ESAI1_TX4_RX1_AUD_ESAI1_TX4_RX1 531 #define IMX8QM_ESAI1_TX4_RX1_LSIO_GPIO2_IO12 532 #define IMX8QM_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0 533 #define IMX8QM_ESAI1_TX5_RX0_LSIO_GPIO2_IO13 534 #define IMX8QM_SPDIF0_RX_AUD_SPDIF0_RX 535 #define IMX8QM_SPDIF0_RX_AUD_MQS_R 536 #define IMX8QM_SPDIF0_RX_AUD_ACM_MCLK_IN1 537 #define IMX8QM_SPDIF0_RX_LSIO_GPIO2_IO14 538 #define IMX8QM_SPDIF0_TX_AUD_SPDIF0_TX 539 #define IMX8QM_SPDIF0_TX_AUD_MQS_L 540 #define IMX8QM_SPDIF0_TX_AUD_ACM_MCLK_OUT1 541 #define IMX8QM_SPDIF0_TX_LSIO_GPIO2_IO15 542 #define IMX8QM_SPDIF0_EXT_CLK_AUD_SPDIF0_EXT_C 543 #define IMX8QM_SPDIF0_EXT_CLK_DMA_DMA0_REQ_IN0 544 #define IMX8QM_SPDIF0_EXT_CLK_LSIO_GPIO2_IO16 545 #define IMX8QM_SPI3_SCK_DMA_SPI3_SCK 546 #define IMX8QM_SPI3_SCK_LSIO_GPIO2_IO17 547 #define IMX8QM_SPI3_SDO_DMA_SPI3_SDO 548 #define IMX8QM_SPI3_SDO_DMA_FTM_CH0 549 #define IMX8QM_SPI3_SDO_LSIO_GPIO2_IO18 550 #define IMX8QM_SPI3_SDI_DMA_SPI3_SDI 551 #define IMX8QM_SPI3_SDI_DMA_FTM_CH1 552 #define IMX8QM_SPI3_SDI_LSIO_GPIO2_IO19 553 #define IMX8QM_SPI3_CS0_DMA_SPI3_CS0 554 #define IMX8QM_SPI3_CS0_DMA_FTM_CH2 555 #define IMX8QM_SPI3_CS0_LSIO_GPIO2_IO20 556 #define IMX8QM_SPI3_CS1_DMA_SPI3_CS1 557 #define IMX8QM_SPI3_CS1_LSIO_GPIO2_IO21 558 #define IMX8QM_ESAI0_FSR_AUD_ESAI0_FSR 559 #define IMX8QM_ESAI0_FSR_LSIO_GPIO2_IO22 560 #define IMX8QM_ESAI0_FST_AUD_ESAI0_FST 561 #define IMX8QM_ESAI0_FST_LSIO_GPIO2_IO23 562 #define IMX8QM_ESAI0_SCKR_AUD_ESAI0_SCKR 563 #define IMX8QM_ESAI0_SCKR_LSIO_GPIO2_IO24 564 #define IMX8QM_ESAI0_SCKT_AUD_ESAI0_SCKT 565 #define IMX8QM_ESAI0_SCKT_LSIO_GPIO2_IO25 566 #define IMX8QM_ESAI0_TX0_AUD_ESAI0_TX0 567 #define IMX8QM_ESAI0_TX0_LSIO_GPIO2_IO26 568 #define IMX8QM_ESAI0_TX1_AUD_ESAI0_TX1 569 #define IMX8QM_ESAI0_TX1_LSIO_GPIO2_IO27 570 #define IMX8QM_ESAI0_TX2_RX3_AUD_ESAI0_TX2_RX3 571 #define IMX8QM_ESAI0_TX2_RX3_LSIO_GPIO2_IO28 572 #define IMX8QM_ESAI0_TX3_RX2_AUD_ESAI0_TX3_RX2 573 #define IMX8QM_ESAI0_TX3_RX2_LSIO_GPIO2_IO29 574 #define IMX8QM_ESAI0_TX4_RX1_AUD_ESAI0_TX4_RX1 575 #define IMX8QM_ESAI0_TX4_RX1_LSIO_GPIO2_IO30 576 #define IMX8QM_ESAI0_TX5_RX0_AUD_ESAI0_TX5_RX0 577 #define IMX8QM_ESAI0_TX5_RX0_LSIO_GPIO2_IO31 578 #define IMX8QM_MCLK_IN0_AUD_ACM_MCLK_IN0 579 #define IMX8QM_MCLK_IN0_AUD_ESAI0_RX_HF_CLK 580 #define IMX8QM_MCLK_IN0_AUD_ESAI1_RX_HF_CLK 581 #define IMX8QM_MCLK_IN0_LSIO_GPIO3_IO00 582 #define IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0 583 #define IMX8QM_MCLK_OUT0_AUD_ESAI0_TX_HF_CLK 584 #define IMX8QM_MCLK_OUT0_AUD_ESAI1_TX_HF_CLK 585 #define IMX8QM_MCLK_OUT0_LSIO_GPIO3_IO01 586 #define IMX8QM_SPI0_SCK_DMA_SPI0_SCK 587 #define IMX8QM_SPI0_SCK_AUD_SAI0_RXC 588 #define IMX8QM_SPI0_SCK_LSIO_GPIO3_IO02 589 #define IMX8QM_SPI0_SDO_DMA_SPI0_SDO 590 #define IMX8QM_SPI0_SDO_AUD_SAI0_TXD 591 #define IMX8QM_SPI0_SDO_LSIO_GPIO3_IO03 592 #define IMX8QM_SPI0_SDI_DMA_SPI0_SDI 593 #define IMX8QM_SPI0_SDI_AUD_SAI0_RXD 594 #define IMX8QM_SPI0_SDI_LSIO_GPIO3_IO04 595 #define IMX8QM_SPI0_CS0_DMA_SPI0_CS0 596 #define IMX8QM_SPI0_CS0_AUD_SAI0_RXFS 597 #define IMX8QM_SPI0_CS0_LSIO_GPIO3_IO05 598 #define IMX8QM_SPI0_CS1_DMA_SPI0_CS1 599 #define IMX8QM_SPI0_CS1_AUD_SAI0_TXC 600 #define IMX8QM_SPI0_CS1_LSIO_GPIO3_IO06 601 #define IMX8QM_SPI2_SCK_DMA_SPI2_SCK 602 #define IMX8QM_SPI2_SCK_LSIO_GPIO3_IO07 603 #define IMX8QM_SPI2_SDO_DMA_SPI2_SDO 604 #define IMX8QM_SPI2_SDO_LSIO_GPIO3_IO08 605 #define IMX8QM_SPI2_SDI_DMA_SPI2_SDI 606 #define IMX8QM_SPI2_SDI_LSIO_GPIO3_IO09 607 #define IMX8QM_SPI2_CS0_DMA_SPI2_CS0 608 #define IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 609 #define IMX8QM_SPI2_CS1_DMA_SPI2_CS1 610 #define IMX8QM_SPI2_CS1_AUD_SAI0_TXFS 611 #define IMX8QM_SPI2_CS1_LSIO_GPIO3_IO11 612 #define IMX8QM_SAI1_RXC_AUD_SAI1_RXC 613 #define IMX8QM_SAI1_RXC_AUD_SAI0_TXD 614 #define IMX8QM_SAI1_RXC_LSIO_GPIO3_IO12 615 #define IMX8QM_SAI1_RXD_AUD_SAI1_RXD 616 #define IMX8QM_SAI1_RXD_AUD_SAI0_TXFS 617 #define IMX8QM_SAI1_RXD_LSIO_GPIO3_IO13 618 #define IMX8QM_SAI1_RXFS_AUD_SAI1_RXFS 619 #define IMX8QM_SAI1_RXFS_AUD_SAI0_RXD 620 #define IMX8QM_SAI1_RXFS_LSIO_GPIO3_IO14 621 #define IMX8QM_SAI1_TXC_AUD_SAI1_TXC 622 #define IMX8QM_SAI1_TXC_AUD_SAI0_TXC 623 #define IMX8QM_SAI1_TXC_LSIO_GPIO3_IO15 624 #define IMX8QM_SAI1_TXD_AUD_SAI1_TXD 625 #define IMX8QM_SAI1_TXD_AUD_SAI1_RXC 626 #define IMX8QM_SAI1_TXD_LSIO_GPIO3_IO16 627 #define IMX8QM_SAI1_TXFS_AUD_SAI1_TXFS 628 #define IMX8QM_SAI1_TXFS_AUD_SAI1_RXFS 629 #define IMX8QM_SAI1_TXFS_LSIO_GPIO3_IO17 630 #define IMX8QM_ADC_IN7_DMA_ADC1_IN3 631 #define IMX8QM_ADC_IN7_DMA_SPI1_CS1 632 #define IMX8QM_ADC_IN7_LSIO_KPP0_ROW3 633 #define IMX8QM_ADC_IN7_LSIO_GPIO3_IO25 634 #define IMX8QM_ADC_IN6_DMA_ADC1_IN2 635 #define IMX8QM_ADC_IN6_DMA_SPI1_CS0 636 #define IMX8QM_ADC_IN6_LSIO_KPP0_ROW2 637 #define IMX8QM_ADC_IN6_LSIO_GPIO3_IO24 638 #define IMX8QM_ADC_IN5_DMA_ADC1_IN1 639 #define IMX8QM_ADC_IN5_DMA_SPI1_SDI 640 #define IMX8QM_ADC_IN5_LSIO_KPP0_ROW1 641 #define IMX8QM_ADC_IN5_LSIO_GPIO3_IO23 642 #define IMX8QM_ADC_IN4_DMA_ADC1_IN0 643 #define IMX8QM_ADC_IN4_DMA_SPI1_SDO 644 #define IMX8QM_ADC_IN4_LSIO_KPP0_ROW0 645 #define IMX8QM_ADC_IN4_LSIO_GPIO3_IO22 646 #define IMX8QM_ADC_IN3_DMA_ADC0_IN3 647 #define IMX8QM_ADC_IN3_DMA_SPI1_SCK 648 #define IMX8QM_ADC_IN3_LSIO_KPP0_COL3 649 #define IMX8QM_ADC_IN3_LSIO_GPIO3_IO21 650 #define IMX8QM_ADC_IN2_DMA_ADC0_IN2 651 #define IMX8QM_ADC_IN2_LSIO_KPP0_COL2 652 #define IMX8QM_ADC_IN2_LSIO_GPIO3_IO20 653 #define IMX8QM_ADC_IN1_DMA_ADC0_IN1 654 #define IMX8QM_ADC_IN1_LSIO_KPP0_COL1 655 #define IMX8QM_ADC_IN1_LSIO_GPIO3_IO19 656 #define IMX8QM_ADC_IN0_DMA_ADC0_IN0 657 #define IMX8QM_ADC_IN0_LSIO_KPP0_COL0 658 #define IMX8QM_ADC_IN0_LSIO_GPIO3_IO18 659 #define IMX8QM_MLB_SIG_CONN_MLB_SIG 660 #define IMX8QM_MLB_SIG_AUD_SAI3_RXC 661 #define IMX8QM_MLB_SIG_LSIO_GPIO3_IO26 662 #define IMX8QM_MLB_CLK_CONN_MLB_CLK 663 #define IMX8QM_MLB_CLK_AUD_SAI3_RXFS 664 #define IMX8QM_MLB_CLK_LSIO_GPIO3_IO27 665 #define IMX8QM_MLB_DATA_CONN_MLB_DATA 666 #define IMX8QM_MLB_DATA_AUD_SAI3_RXD 667 #define IMX8QM_MLB_DATA_LSIO_GPIO3_IO28 668 #define IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX 669 #define IMX8QM_FLEXCAN0_RX_LSIO_GPIO3_IO29 670 #define IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX 671 #define IMX8QM_FLEXCAN0_TX_LSIO_GPIO3_IO30 672 #define IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX 673 #define IMX8QM_FLEXCAN1_RX_LSIO_GPIO3_IO31 674 #define IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX 675 #define IMX8QM_FLEXCAN1_TX_LSIO_GPIO4_IO00 676 #define IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX 677 #define IMX8QM_FLEXCAN2_RX_LSIO_GPIO4_IO01 678 #define IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX 679 #define IMX8QM_FLEXCAN2_TX_LSIO_GPIO4_IO02 680 #define IMX8QM_USB_SS3_TC0_DMA_I2C1_SCL 681 #define IMX8QM_USB_SS3_TC0_CONN_USB_OTG1_PWR 682 #define IMX8QM_USB_SS3_TC0_LSIO_GPIO4_IO03 683 #define IMX8QM_USB_SS3_TC1_DMA_I2C1_SCL 684 #define IMX8QM_USB_SS3_TC1_CONN_USB_OTG2_PWR 685 #define IMX8QM_USB_SS3_TC1_LSIO_GPIO4_IO04 686 #define IMX8QM_USB_SS3_TC2_DMA_I2C1_SDA 687 #define IMX8QM_USB_SS3_TC2_CONN_USB_OTG1_OC 688 #define IMX8QM_USB_SS3_TC2_LSIO_GPIO4_IO05 689 #define IMX8QM_USB_SS3_TC3_DMA_I2C1_SDA 690 #define IMX8QM_USB_SS3_TC3_CONN_USB_OTG2_OC 691 #define IMX8QM_USB_SS3_TC3_LSIO_GPIO4_IO06 692 #define IMX8QM_USDHC1_RESET_B_CONN_USDHC1_RESE 693 #define IMX8QM_USDHC1_RESET_B_LSIO_GPIO4_IO07 694 #define IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSEL 695 #define IMX8QM_USDHC1_VSELECT_LSIO_GPIO4_IO08 696 #define IMX8QM_USDHC2_RESET_B_CONN_USDHC2_RESE 697 #define IMX8QM_USDHC2_RESET_B_LSIO_GPIO4_IO09 698 #define IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSEL 699 #define IMX8QM_USDHC2_VSELECT_LSIO_GPIO4_IO10 700 #define IMX8QM_USDHC2_WP_CONN_USDHC2_WP 701 #define IMX8QM_USDHC2_WP_LSIO_GPIO4_IO11 702 #define IMX8QM_USDHC2_CD_B_CONN_USDHC2_CD_B 703 #define IMX8QM_USDHC2_CD_B_LSIO_GPIO4_IO12 704 #define IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO 705 #define IMX8QM_ENET0_MDIO_DMA_I2C4_SDA 706 #define IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 707 #define IMX8QM_ENET0_MDC_CONN_ENET0_MDC 708 #define IMX8QM_ENET0_MDC_DMA_I2C4_SCL 709 #define IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 710 #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET 711 #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET 712 #define IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO 713 #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET 714 #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET 715 #define IMX8QM_ENET1_REFCLK_125M_25M_LSIO_GPIO 716 #define IMX8QM_ENET1_MDIO_CONN_ENET1_MDIO 717 #define IMX8QM_ENET1_MDIO_DMA_I2C4_SDA 718 #define IMX8QM_ENET1_MDIO_LSIO_GPIO4_IO17 719 #define IMX8QM_ENET1_MDC_CONN_ENET1_MDC 720 #define IMX8QM_ENET1_MDC_DMA_I2C4_SCL 721 #define IMX8QM_ENET1_MDC_LSIO_GPIO4_IO18 722 #define IMX8QM_QSPI1A_SS0_B_LSIO_QSPI1A_SS0_B 723 #define IMX8QM_QSPI1A_SS0_B_LSIO_GPIO4_IO19 724 #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SS1_B 725 #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SCLK2 726 #define IMX8QM_QSPI1A_SS1_B_LSIO_GPIO4_IO20 727 #define IMX8QM_QSPI1A_SCLK_LSIO_QSPI1A_SCLK 728 #define IMX8QM_QSPI1A_SCLK_LSIO_GPIO4_IO21 729 #define IMX8QM_QSPI1A_DQS_LSIO_QSPI1A_DQS 730 #define IMX8QM_QSPI1A_DQS_LSIO_GPIO4_IO22 731 #define IMX8QM_QSPI1A_DATA3_LSIO_QSPI1A_DATA3 732 #define IMX8QM_QSPI1A_DATA3_DMA_I2C1_SDA 733 #define IMX8QM_QSPI1A_DATA3_CONN_USB_OTG1_OC 734 #define IMX8QM_QSPI1A_DATA3_LSIO_GPIO4_IO23 735 #define IMX8QM_QSPI1A_DATA2_LSIO_QSPI1A_DATA2 736 #define IMX8QM_QSPI1A_DATA2_DMA_I2C1_SCL 737 #define IMX8QM_QSPI1A_DATA2_CONN_USB_OTG2_PWR 738 #define IMX8QM_QSPI1A_DATA2_LSIO_GPIO4_IO24 739 #define IMX8QM_QSPI1A_DATA1_LSIO_QSPI1A_DATA1 740 #define IMX8QM_QSPI1A_DATA1_DMA_I2C1_SDA 741 #define IMX8QM_QSPI1A_DATA1_CONN_USB_OTG2_OC 742 #define IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25 743 #define IMX8QM_QSPI1A_DATA0_LSIO_QSPI1A_DATA0 744 #define IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26 745 #define IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 746 #define IMX8QM_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 747 #define IMX8QM_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 748 #define IMX8QM_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 749 #define IMX8QM_QSPI0A_DQS_LSIO_QSPI0A_DQS 750 #define IMX8QM_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B 751 #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B 752 #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SCLK2 753 #define IMX8QM_QSPI0A_SCLK_LSIO_QSPI0A_SCLK 754 #define IMX8QM_QSPI0B_SCLK_LSIO_QSPI0B_SCLK 755 #define IMX8QM_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 756 #define IMX8QM_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 757 #define IMX8QM_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 758 #define IMX8QM_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 759 #define IMX8QM_QSPI0B_DQS_LSIO_QSPI0B_DQS 760 #define IMX8QM_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B 761 #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B 762 #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SCLK2 763 #define IMX8QM_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_ 764 #define IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_ 765 #define IMX8QM_PCIE_CTRL0_WAKE_B_HSIO_PCIE0_WA 766 #define IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO 767 #define IMX8QM_PCIE_CTRL0_PERST_B_HSIO_PCIE0_P 768 #define IMX8QM_PCIE_CTRL0_PERST_B_LSIO_GPIO4_I 769 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_HSIO_PCIE1_ 770 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_DMA_I2C1_SD 771 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_CONN_USB_OT 772 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_ 773 #define IMX8QM_PCIE_CTRL1_WAKE_B_HSIO_PCIE1_WA 774 #define IMX8QM_PCIE_CTRL1_WAKE_B_DMA_I2C1_SCL 775 #define IMX8QM_PCIE_CTRL1_WAKE_B_CONN_USB_OTG2 776 #define IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO 777 #define IMX8QM_PCIE_CTRL1_PERST_B_HSIO_PCIE1_P 778 #define IMX8QM_PCIE_CTRL1_PERST_B_DMA_I2C1_SCL 779 #define IMX8QM_PCIE_CTRL1_PERST_B_CONN_USB_OTG 780 #define IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_I 781 #define IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_D 782 #define IMX8QM_USB_HSIC0_DATA_DMA_I2C1_SDA 783 #define IMX8QM_USB_HSIC0_DATA_LSIO_GPIO5_IO01 784 #define IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0 785 #define IMX8QM_USB_HSIC0_STROBE_DMA_I2C1_SCL 786 #define IMX8QM_USB_HSIC0_STROBE_LSIO_GPIO5_IO0 787 #define IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 788 #define IMX8QM_EMMC0_CLK_CONN_NAND_READY_B 789 #define IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 790 #define IMX8QM_EMMC0_CMD_CONN_NAND_DQS 791 #define IMX8QM_EMMC0_CMD_AUD_MQS_R 792 #define IMX8QM_EMMC0_CMD_LSIO_GPIO5_IO03 793 #define IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 794 #define IMX8QM_EMMC0_DATA0_CONN_NAND_DATA00 795 #define IMX8QM_EMMC0_DATA0_LSIO_GPIO5_IO04 796 #define IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 797 #define IMX8QM_EMMC0_DATA1_CONN_NAND_DATA01 798 #define IMX8QM_EMMC0_DATA1_LSIO_GPIO5_IO05 799 #define IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 800 #define IMX8QM_EMMC0_DATA2_CONN_NAND_DATA02 801 #define IMX8QM_EMMC0_DATA2_LSIO_GPIO5_IO06 802 #define IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 803 #define IMX8QM_EMMC0_DATA3_CONN_NAND_DATA03 804 #define IMX8QM_EMMC0_DATA3_LSIO_GPIO5_IO07 805 #define IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 806 #define IMX8QM_EMMC0_DATA4_CONN_NAND_DATA04 807 #define IMX8QM_EMMC0_DATA4_LSIO_GPIO5_IO08 808 #define IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 809 #define IMX8QM_EMMC0_DATA5_CONN_NAND_DATA05 810 #define IMX8QM_EMMC0_DATA5_LSIO_GPIO5_IO09 811 #define IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 812 #define IMX8QM_EMMC0_DATA6_CONN_NAND_DATA06 813 #define IMX8QM_EMMC0_DATA6_LSIO_GPIO5_IO10 814 #define IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 815 #define IMX8QM_EMMC0_DATA7_CONN_NAND_DATA07 816 #define IMX8QM_EMMC0_DATA7_LSIO_GPIO5_IO11 817 #define IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 818 #define IMX8QM_EMMC0_STROBE_CONN_NAND_CLE 819 #define IMX8QM_EMMC0_STROBE_LSIO_GPIO5_IO12 820 #define IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_ 821 #define IMX8QM_EMMC0_RESET_B_CONN_NAND_WP_B 822 #define IMX8QM_EMMC0_RESET_B_CONN_USDHC1_VSELE 823 #define IMX8QM_EMMC0_RESET_B_LSIO_GPIO5_IO13 824 #define IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 825 #define IMX8QM_USDHC1_CLK_AUD_MQS_R 826 #define IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 827 #define IMX8QM_USDHC1_CMD_AUD_MQS_L 828 #define IMX8QM_USDHC1_CMD_LSIO_GPIO5_IO14 829 #define IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 830 #define IMX8QM_USDHC1_DATA0_CONN_NAND_RE_N 831 #define IMX8QM_USDHC1_DATA0_LSIO_GPIO5_IO15 832 #define IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 833 #define IMX8QM_USDHC1_DATA1_CONN_NAND_RE_P 834 #define IMX8QM_USDHC1_DATA1_LSIO_GPIO5_IO16 835 #define IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 836 #define IMX8QM_USDHC1_DATA2_CONN_NAND_DQS_N 837 #define IMX8QM_USDHC1_DATA2_LSIO_GPIO5_IO17 838 #define IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 839 #define IMX8QM_USDHC1_DATA3_CONN_NAND_DQS_P 840 #define IMX8QM_USDHC1_DATA3_LSIO_GPIO5_IO18 841 #define IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 842 #define IMX8QM_USDHC1_DATA4_CONN_NAND_CE0_B 843 #define IMX8QM_USDHC1_DATA4_AUD_MQS_R 844 #define IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19 845 #define IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 846 #define IMX8QM_USDHC1_DATA5_CONN_NAND_RE_B 847 #define IMX8QM_USDHC1_DATA5_AUD_MQS_L 848 #define IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 849 #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 850 #define IMX8QM_USDHC1_DATA6_CONN_NAND_WE_B 851 #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_WP 852 #define IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 853 #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 854 #define IMX8QM_USDHC1_DATA7_CONN_NAND_ALE 855 #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_CD_B 856 #define IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22 857 #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_STROB 858 #define IMX8QM_USDHC1_STROBE_CONN_NAND_CE1_B 859 #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_RESET 860 #define IMX8QM_USDHC1_STROBE_LSIO_GPIO5_IO23 861 #define IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 862 #define IMX8QM_USDHC2_CLK_AUD_MQS_R 863 #define IMX8QM_USDHC2_CLK_LSIO_GPIO5_IO24 864 #define IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 865 #define IMX8QM_USDHC2_CMD_AUD_MQS_L 866 #define IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 867 #define IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 868 #define IMX8QM_USDHC2_DATA0_DMA_UART4_RX 869 #define IMX8QM_USDHC2_DATA0_LSIO_GPIO5_IO26 870 #define IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 871 #define IMX8QM_USDHC2_DATA1_DMA_UART4_TX 872 #define IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 873 #define IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 874 #define IMX8QM_USDHC2_DATA2_DMA_UART4_CTS_B 875 #define IMX8QM_USDHC2_DATA2_LSIO_GPIO5_IO28 876 #define IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 877 #define IMX8QM_USDHC2_DATA3_DMA_UART4_RTS_B 878 #define IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 879 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMI 880 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK 881 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK 882 #define IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 883 #define IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_R 884 #define IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_I 885 #define IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGM 886 #define IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO0 887 #define IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGM 888 #define IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO0 889 #define IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGM 890 #define IMX8QM_ENET0_RGMII_TXD2_DMA_UART3_TX 891 #define IMX8QM_ENET0_RGMII_TXD2_VPU_TSI_S1_VID 892 #define IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO0 893 #define IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGM 894 #define IMX8QM_ENET0_RGMII_TXD3_DMA_UART3_RTS_ 895 #define IMX8QM_ENET0_RGMII_TXD3_VPU_TSI_S1_SYN 896 #define IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO0 897 #define IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMI 898 #define IMX8QM_ENET0_RGMII_RXC_DMA_UART3_CTS_B 899 #define IMX8QM_ENET0_RGMII_RXC_VPU_TSI_S1_DATA 900 #define IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 901 #define IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_R 902 #define IMX8QM_ENET0_RGMII_RX_CTL_VPU_TSI_S0_V 903 #define IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_I 904 #define IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGM 905 #define IMX8QM_ENET0_RGMII_RXD0_VPU_TSI_S0_SYN 906 #define IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO0 907 #define IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGM 908 #define IMX8QM_ENET0_RGMII_RXD1_VPU_TSI_S0_DAT 909 #define IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO0 910 #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGM 911 #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RMI 912 #define IMX8QM_ENET0_RGMII_RXD2_VPU_TSI_S0_CLK 913 #define IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO0 914 #define IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGM 915 #define IMX8QM_ENET0_RGMII_RXD3_DMA_UART3_RX 916 #define IMX8QM_ENET0_RGMII_RXD3_VPU_TSI_S1_CLK 917 #define IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO0 918 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RGMI 919 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK 920 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK 921 #define IMX8QM_ENET1_RGMII_TXC_LSIO_GPIO6_IO10 922 #define IMX8QM_ENET1_RGMII_TX_CTL_CONN_ENET1_R 923 #define IMX8QM_ENET1_RGMII_TX_CTL_LSIO_GPIO6_I 924 #define IMX8QM_ENET1_RGMII_TXD0_CONN_ENET1_RGM 925 #define IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO1 926 #define IMX8QM_ENET1_RGMII_TXD1_CONN_ENET1_RGM 927 #define IMX8QM_ENET1_RGMII_TXD1_LSIO_GPIO6_IO1 928 #define IMX8QM_ENET1_RGMII_TXD2_CONN_ENET1_RGM 929 #define IMX8QM_ENET1_RGMII_TXD2_DMA_UART3_TX 930 #define IMX8QM_ENET1_RGMII_TXD2_VPU_TSI_S1_VID 931 #define IMX8QM_ENET1_RGMII_TXD2_LSIO_GPIO6_IO1 932 #define IMX8QM_ENET1_RGMII_TXD3_CONN_ENET1_RGM 933 #define IMX8QM_ENET1_RGMII_TXD3_DMA_UART3_RTS_ 934 #define IMX8QM_ENET1_RGMII_TXD3_VPU_TSI_S1_SYN 935 #define IMX8QM_ENET1_RGMII_TXD3_LSIO_GPIO6_IO1 936 #define IMX8QM_ENET1_RGMII_RXC_CONN_ENET1_RGMI 937 #define IMX8QM_ENET1_RGMII_RXC_DMA_UART3_CTS_B 938 #define IMX8QM_ENET1_RGMII_RXC_VPU_TSI_S1_DATA 939 #define IMX8QM_ENET1_RGMII_RXC_LSIO_GPIO6_IO16 940 #define IMX8QM_ENET1_RGMII_RX_CTL_CONN_ENET1_R 941 #define IMX8QM_ENET1_RGMII_RX_CTL_VPU_TSI_S0_V 942 #define IMX8QM_ENET1_RGMII_RX_CTL_LSIO_GPIO6_I 943 #define IMX8QM_ENET1_RGMII_RXD0_CONN_ENET1_RGM 944 #define IMX8QM_ENET1_RGMII_RXD0_VPU_TSI_S0_SYN 945 #define IMX8QM_ENET1_RGMII_RXD0_LSIO_GPIO6_IO1 946 #define IMX8QM_ENET1_RGMII_RXD1_CONN_ENET1_RGM 947 #define IMX8QM_ENET1_RGMII_RXD1_VPU_TSI_S0_DAT 948 #define IMX8QM_ENET1_RGMII_RXD1_LSIO_GPIO6_IO1 949 #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RGM 950 #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RMI 951 #define IMX8QM_ENET1_RGMII_RXD2_VPU_TSI_S0_CLK 952 #define IMX8QM_ENET1_RGMII_RXD2_LSIO_GPIO6_IO2 953 #define IMX8QM_ENET1_RGMII_RXD3_CONN_ENET1_RGM 954 #define IMX8QM_ENET1_RGMII_RXD3_DMA_UART3_RX 955 #define IMX8QM_ENET1_RGMII_RXD3_VPU_TSI_S1_CLK 956 #define IMX8QM_ENET1_RGMII_RXD3_LSIO_GPIO6_IO2 957 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENET 958 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENET 959 960 #endif /* _IMX8QM_PADS_H */ 961
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