1 /* SPDX-License-Identifier: GPL-2.0+ */ 1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 2 /* 3 * Copyright (C) 2016 Freescale Semiconductor, 3 * Copyright (C) 2016 Freescale Semiconductor, Inc. 4 * Copyright 2017~2018 NXP 4 * Copyright 2017~2018 NXP 5 */ 5 */ 6 6 7 #ifndef _IMX8QM_PADS_H 7 #ifndef _IMX8QM_PADS_H 8 #define _IMX8QM_PADS_H 8 #define _IMX8QM_PADS_H 9 9 10 /* pin id */ 10 /* pin id */ 11 #define IMX8QM_SIM0_CLK 11 #define IMX8QM_SIM0_CLK 0 12 #define IMX8QM_SIM0_RST 12 #define IMX8QM_SIM0_RST 1 13 #define IMX8QM_SIM0_IO 13 #define IMX8QM_SIM0_IO 2 14 #define IMX8QM_SIM0_PD 14 #define IMX8QM_SIM0_PD 3 15 #define IMX8QM_SIM0_POWER_EN 15 #define IMX8QM_SIM0_POWER_EN 4 16 #define IMX8QM_SIM0_GPIO0_00 16 #define IMX8QM_SIM0_GPIO0_00 5 17 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM 17 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM 6 18 #define IMX8QM_M40_I2C0_SCL 18 #define IMX8QM_M40_I2C0_SCL 7 19 #define IMX8QM_M40_I2C0_SDA 19 #define IMX8QM_M40_I2C0_SDA 8 20 #define IMX8QM_M40_GPIO0_00 20 #define IMX8QM_M40_GPIO0_00 9 21 #define IMX8QM_M40_GPIO0_01 21 #define IMX8QM_M40_GPIO0_01 10 22 #define IMX8QM_M41_I2C0_SCL 22 #define IMX8QM_M41_I2C0_SCL 11 23 #define IMX8QM_M41_I2C0_SDA 23 #define IMX8QM_M41_I2C0_SDA 12 24 #define IMX8QM_M41_GPIO0_00 24 #define IMX8QM_M41_GPIO0_00 13 25 #define IMX8QM_M41_GPIO0_01 25 #define IMX8QM_M41_GPIO0_01 14 26 #define IMX8QM_GPT0_CLK 26 #define IMX8QM_GPT0_CLK 15 27 #define IMX8QM_GPT0_CAPTURE 27 #define IMX8QM_GPT0_CAPTURE 16 28 #define IMX8QM_GPT0_COMPARE 28 #define IMX8QM_GPT0_COMPARE 17 29 #define IMX8QM_GPT1_CLK 29 #define IMX8QM_GPT1_CLK 18 30 #define IMX8QM_GPT1_CAPTURE 30 #define IMX8QM_GPT1_CAPTURE 19 31 #define IMX8QM_GPT1_COMPARE 31 #define IMX8QM_GPT1_COMPARE 20 32 #define IMX8QM_UART0_RX 32 #define IMX8QM_UART0_RX 21 33 #define IMX8QM_UART0_TX 33 #define IMX8QM_UART0_TX 22 34 #define IMX8QM_UART0_RTS_B 34 #define IMX8QM_UART0_RTS_B 23 35 #define IMX8QM_UART0_CTS_B 35 #define IMX8QM_UART0_CTS_B 24 36 #define IMX8QM_UART1_TX 36 #define IMX8QM_UART1_TX 25 37 #define IMX8QM_UART1_RX 37 #define IMX8QM_UART1_RX 26 38 #define IMX8QM_UART1_RTS_B 38 #define IMX8QM_UART1_RTS_B 27 39 #define IMX8QM_UART1_CTS_B 39 #define IMX8QM_UART1_CTS_B 28 40 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH 40 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH 29 41 #define IMX8QM_SCU_PMIC_MEMC_ON 41 #define IMX8QM_SCU_PMIC_MEMC_ON 30 42 #define IMX8QM_SCU_WDOG_OUT 42 #define IMX8QM_SCU_WDOG_OUT 31 43 #define IMX8QM_PMIC_I2C_SDA 43 #define IMX8QM_PMIC_I2C_SDA 32 44 #define IMX8QM_PMIC_I2C_SCL 44 #define IMX8QM_PMIC_I2C_SCL 33 45 #define IMX8QM_PMIC_EARLY_WARNING 45 #define IMX8QM_PMIC_EARLY_WARNING 34 46 #define IMX8QM_PMIC_INT_B 46 #define IMX8QM_PMIC_INT_B 35 47 #define IMX8QM_SCU_GPIO0_00 47 #define IMX8QM_SCU_GPIO0_00 36 48 #define IMX8QM_SCU_GPIO0_01 48 #define IMX8QM_SCU_GPIO0_01 37 49 #define IMX8QM_SCU_GPIO0_02 49 #define IMX8QM_SCU_GPIO0_02 38 50 #define IMX8QM_SCU_GPIO0_03 50 #define IMX8QM_SCU_GPIO0_03 39 51 #define IMX8QM_SCU_GPIO0_04 51 #define IMX8QM_SCU_GPIO0_04 40 52 #define IMX8QM_SCU_GPIO0_05 52 #define IMX8QM_SCU_GPIO0_05 41 53 #define IMX8QM_SCU_GPIO0_06 53 #define IMX8QM_SCU_GPIO0_06 42 54 #define IMX8QM_SCU_GPIO0_07 54 #define IMX8QM_SCU_GPIO0_07 43 55 #define IMX8QM_SCU_BOOT_MODE0 55 #define IMX8QM_SCU_BOOT_MODE0 44 56 #define IMX8QM_SCU_BOOT_MODE1 56 #define IMX8QM_SCU_BOOT_MODE1 45 57 #define IMX8QM_SCU_BOOT_MODE2 57 #define IMX8QM_SCU_BOOT_MODE2 46 58 #define IMX8QM_SCU_BOOT_MODE3 58 #define IMX8QM_SCU_BOOT_MODE3 47 59 #define IMX8QM_SCU_BOOT_MODE4 59 #define IMX8QM_SCU_BOOT_MODE4 48 60 #define IMX8QM_SCU_BOOT_MODE5 60 #define IMX8QM_SCU_BOOT_MODE5 49 61 #define IMX8QM_LVDS0_GPIO00 61 #define IMX8QM_LVDS0_GPIO00 50 62 #define IMX8QM_LVDS0_GPIO01 62 #define IMX8QM_LVDS0_GPIO01 51 63 #define IMX8QM_LVDS0_I2C0_SCL 63 #define IMX8QM_LVDS0_I2C0_SCL 52 64 #define IMX8QM_LVDS0_I2C0_SDA 64 #define IMX8QM_LVDS0_I2C0_SDA 53 65 #define IMX8QM_LVDS0_I2C1_SCL 65 #define IMX8QM_LVDS0_I2C1_SCL 54 66 #define IMX8QM_LVDS0_I2C1_SDA 66 #define IMX8QM_LVDS0_I2C1_SDA 55 67 #define IMX8QM_LVDS1_GPIO00 67 #define IMX8QM_LVDS1_GPIO00 56 68 #define IMX8QM_LVDS1_GPIO01 68 #define IMX8QM_LVDS1_GPIO01 57 69 #define IMX8QM_LVDS1_I2C0_SCL 69 #define IMX8QM_LVDS1_I2C0_SCL 58 70 #define IMX8QM_LVDS1_I2C0_SDA 70 #define IMX8QM_LVDS1_I2C0_SDA 59 71 #define IMX8QM_LVDS1_I2C1_SCL 71 #define IMX8QM_LVDS1_I2C1_SCL 60 72 #define IMX8QM_LVDS1_I2C1_SDA 72 #define IMX8QM_LVDS1_I2C1_SDA 61 73 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO 73 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO 62 74 #define IMX8QM_MIPI_DSI0_I2C0_SCL 74 #define IMX8QM_MIPI_DSI0_I2C0_SCL 63 75 #define IMX8QM_MIPI_DSI0_I2C0_SDA 75 #define IMX8QM_MIPI_DSI0_I2C0_SDA 64 76 #define IMX8QM_MIPI_DSI0_GPIO0_00 76 #define IMX8QM_MIPI_DSI0_GPIO0_00 65 77 #define IMX8QM_MIPI_DSI0_GPIO0_01 77 #define IMX8QM_MIPI_DSI0_GPIO0_01 66 78 #define IMX8QM_MIPI_DSI1_I2C0_SCL 78 #define IMX8QM_MIPI_DSI1_I2C0_SCL 67 79 #define IMX8QM_MIPI_DSI1_I2C0_SDA 79 #define IMX8QM_MIPI_DSI1_I2C0_SDA 68 80 #define IMX8QM_MIPI_DSI1_GPIO0_00 80 #define IMX8QM_MIPI_DSI1_GPIO0_00 69 81 #define IMX8QM_MIPI_DSI1_GPIO0_01 81 #define IMX8QM_MIPI_DSI1_GPIO0_01 70 82 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGP 82 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO 71 83 #define IMX8QM_MIPI_CSI0_MCLK_OUT 83 #define IMX8QM_MIPI_CSI0_MCLK_OUT 72 84 #define IMX8QM_MIPI_CSI0_I2C0_SCL 84 #define IMX8QM_MIPI_CSI0_I2C0_SCL 73 85 #define IMX8QM_MIPI_CSI0_I2C0_SDA 85 #define IMX8QM_MIPI_CSI0_I2C0_SDA 74 86 #define IMX8QM_MIPI_CSI0_GPIO0_00 86 #define IMX8QM_MIPI_CSI0_GPIO0_00 75 87 #define IMX8QM_MIPI_CSI0_GPIO0_01 87 #define IMX8QM_MIPI_CSI0_GPIO0_01 76 88 #define IMX8QM_MIPI_CSI1_MCLK_OUT 88 #define IMX8QM_MIPI_CSI1_MCLK_OUT 77 89 #define IMX8QM_MIPI_CSI1_GPIO0_00 89 #define IMX8QM_MIPI_CSI1_GPIO0_00 78 90 #define IMX8QM_MIPI_CSI1_GPIO0_01 90 #define IMX8QM_MIPI_CSI1_GPIO0_01 79 91 #define IMX8QM_MIPI_CSI1_I2C0_SCL 91 #define IMX8QM_MIPI_CSI1_I2C0_SCL 80 92 #define IMX8QM_MIPI_CSI1_I2C0_SDA 92 #define IMX8QM_MIPI_CSI1_I2C0_SDA 81 93 #define IMX8QM_HDMI_TX0_TS_SCL 93 #define IMX8QM_HDMI_TX0_TS_SCL 82 94 #define IMX8QM_HDMI_TX0_TS_SDA 94 #define IMX8QM_HDMI_TX0_TS_SDA 83 95 #define IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO 95 #define IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO 84 96 #define IMX8QM_ESAI1_FSR 96 #define IMX8QM_ESAI1_FSR 85 97 #define IMX8QM_ESAI1_FST 97 #define IMX8QM_ESAI1_FST 86 98 #define IMX8QM_ESAI1_SCKR 98 #define IMX8QM_ESAI1_SCKR 87 99 #define IMX8QM_ESAI1_SCKT 99 #define IMX8QM_ESAI1_SCKT 88 100 #define IMX8QM_ESAI1_TX0 100 #define IMX8QM_ESAI1_TX0 89 101 #define IMX8QM_ESAI1_TX1 101 #define IMX8QM_ESAI1_TX1 90 102 #define IMX8QM_ESAI1_TX2_RX3 102 #define IMX8QM_ESAI1_TX2_RX3 91 103 #define IMX8QM_ESAI1_TX3_RX2 103 #define IMX8QM_ESAI1_TX3_RX2 92 104 #define IMX8QM_ESAI1_TX4_RX1 104 #define IMX8QM_ESAI1_TX4_RX1 93 105 #define IMX8QM_ESAI1_TX5_RX0 105 #define IMX8QM_ESAI1_TX5_RX0 94 106 #define IMX8QM_SPDIF0_RX 106 #define IMX8QM_SPDIF0_RX 95 107 #define IMX8QM_SPDIF0_TX 107 #define IMX8QM_SPDIF0_TX 96 108 #define IMX8QM_SPDIF0_EXT_CLK 108 #define IMX8QM_SPDIF0_EXT_CLK 97 109 #define IMX8QM_SPI3_SCK 109 #define IMX8QM_SPI3_SCK 98 110 #define IMX8QM_SPI3_SDO 110 #define IMX8QM_SPI3_SDO 99 111 #define IMX8QM_SPI3_SDI 111 #define IMX8QM_SPI3_SDI 100 112 #define IMX8QM_SPI3_CS0 112 #define IMX8QM_SPI3_CS0 101 113 #define IMX8QM_SPI3_CS1 113 #define IMX8QM_SPI3_CS1 102 114 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB 114 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB 103 115 #define IMX8QM_ESAI0_FSR 115 #define IMX8QM_ESAI0_FSR 104 116 #define IMX8QM_ESAI0_FST 116 #define IMX8QM_ESAI0_FST 105 117 #define IMX8QM_ESAI0_SCKR 117 #define IMX8QM_ESAI0_SCKR 106 118 #define IMX8QM_ESAI0_SCKT 118 #define IMX8QM_ESAI0_SCKT 107 119 #define IMX8QM_ESAI0_TX0 119 #define IMX8QM_ESAI0_TX0 108 120 #define IMX8QM_ESAI0_TX1 120 #define IMX8QM_ESAI0_TX1 109 121 #define IMX8QM_ESAI0_TX2_RX3 121 #define IMX8QM_ESAI0_TX2_RX3 110 122 #define IMX8QM_ESAI0_TX3_RX2 122 #define IMX8QM_ESAI0_TX3_RX2 111 123 #define IMX8QM_ESAI0_TX4_RX1 123 #define IMX8QM_ESAI0_TX4_RX1 112 124 #define IMX8QM_ESAI0_TX5_RX0 124 #define IMX8QM_ESAI0_TX5_RX0 113 125 #define IMX8QM_MCLK_IN0 125 #define IMX8QM_MCLK_IN0 114 126 #define IMX8QM_MCLK_OUT0 126 #define IMX8QM_MCLK_OUT0 115 127 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC 127 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC 116 128 #define IMX8QM_SPI0_SCK 128 #define IMX8QM_SPI0_SCK 117 129 #define IMX8QM_SPI0_SDO 129 #define IMX8QM_SPI0_SDO 118 130 #define IMX8QM_SPI0_SDI 130 #define IMX8QM_SPI0_SDI 119 131 #define IMX8QM_SPI0_CS0 131 #define IMX8QM_SPI0_CS0 120 132 #define IMX8QM_SPI0_CS1 132 #define IMX8QM_SPI0_CS1 121 133 #define IMX8QM_SPI2_SCK 133 #define IMX8QM_SPI2_SCK 122 134 #define IMX8QM_SPI2_SDO 134 #define IMX8QM_SPI2_SDO 123 135 #define IMX8QM_SPI2_SDI 135 #define IMX8QM_SPI2_SDI 124 136 #define IMX8QM_SPI2_CS0 136 #define IMX8QM_SPI2_CS0 125 137 #define IMX8QM_SPI2_CS1 137 #define IMX8QM_SPI2_CS1 126 138 #define IMX8QM_SAI1_RXC 138 #define IMX8QM_SAI1_RXC 127 139 #define IMX8QM_SAI1_RXD 139 #define IMX8QM_SAI1_RXD 128 140 #define IMX8QM_SAI1_RXFS 140 #define IMX8QM_SAI1_RXFS 129 141 #define IMX8QM_SAI1_TXC 141 #define IMX8QM_SAI1_TXC 130 142 #define IMX8QM_SAI1_TXD 142 #define IMX8QM_SAI1_TXD 131 143 #define IMX8QM_SAI1_TXFS 143 #define IMX8QM_SAI1_TXFS 132 144 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT 144 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT 133 145 #define IMX8QM_ADC_IN7 145 #define IMX8QM_ADC_IN7 134 146 #define IMX8QM_ADC_IN6 146 #define IMX8QM_ADC_IN6 135 147 #define IMX8QM_ADC_IN5 147 #define IMX8QM_ADC_IN5 136 148 #define IMX8QM_ADC_IN4 148 #define IMX8QM_ADC_IN4 137 149 #define IMX8QM_ADC_IN3 149 #define IMX8QM_ADC_IN3 138 150 #define IMX8QM_ADC_IN2 150 #define IMX8QM_ADC_IN2 139 151 #define IMX8QM_ADC_IN1 151 #define IMX8QM_ADC_IN1 140 152 #define IMX8QM_ADC_IN0 152 #define IMX8QM_ADC_IN0 141 153 #define IMX8QM_MLB_SIG 153 #define IMX8QM_MLB_SIG 142 154 #define IMX8QM_MLB_CLK 154 #define IMX8QM_MLB_CLK 143 155 #define IMX8QM_MLB_DATA 155 #define IMX8QM_MLB_DATA 144 156 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT 156 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT 145 157 #define IMX8QM_FLEXCAN0_RX 157 #define IMX8QM_FLEXCAN0_RX 146 158 #define IMX8QM_FLEXCAN0_TX 158 #define IMX8QM_FLEXCAN0_TX 147 159 #define IMX8QM_FLEXCAN1_RX 159 #define IMX8QM_FLEXCAN1_RX 148 160 #define IMX8QM_FLEXCAN1_TX 160 #define IMX8QM_FLEXCAN1_TX 149 161 #define IMX8QM_FLEXCAN2_RX 161 #define IMX8QM_FLEXCAN2_RX 150 162 #define IMX8QM_FLEXCAN2_TX 162 #define IMX8QM_FLEXCAN2_TX 151 163 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR 163 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR 152 164 #define IMX8QM_USB_SS3_TC0 164 #define IMX8QM_USB_SS3_TC0 153 165 #define IMX8QM_USB_SS3_TC1 165 #define IMX8QM_USB_SS3_TC1 154 166 #define IMX8QM_USB_SS3_TC2 166 #define IMX8QM_USB_SS3_TC2 155 167 #define IMX8QM_USB_SS3_TC3 167 #define IMX8QM_USB_SS3_TC3 156 168 #define IMX8QM_COMP_CTL_GPIO_3V3_USB3IO 168 #define IMX8QM_COMP_CTL_GPIO_3V3_USB3IO 157 169 #define IMX8QM_USDHC1_RESET_B 169 #define IMX8QM_USDHC1_RESET_B 158 170 #define IMX8QM_USDHC1_VSELECT 170 #define IMX8QM_USDHC1_VSELECT 159 171 #define IMX8QM_USDHC2_RESET_B 171 #define IMX8QM_USDHC2_RESET_B 160 172 #define IMX8QM_USDHC2_VSELECT 172 #define IMX8QM_USDHC2_VSELECT 161 173 #define IMX8QM_USDHC2_WP 173 #define IMX8QM_USDHC2_WP 162 174 #define IMX8QM_USDHC2_CD_B 174 #define IMX8QM_USDHC2_CD_B 163 175 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP 175 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP 164 176 #define IMX8QM_ENET0_MDIO 176 #define IMX8QM_ENET0_MDIO 165 177 #define IMX8QM_ENET0_MDC 177 #define IMX8QM_ENET0_MDC 166 178 #define IMX8QM_ENET0_REFCLK_125M_25M 178 #define IMX8QM_ENET0_REFCLK_125M_25M 167 179 #define IMX8QM_ENET1_REFCLK_125M_25M 179 #define IMX8QM_ENET1_REFCLK_125M_25M 168 180 #define IMX8QM_ENET1_MDIO 180 #define IMX8QM_ENET1_MDIO 169 181 #define IMX8QM_ENET1_MDC 181 #define IMX8QM_ENET1_MDC 170 182 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT 182 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT 171 183 #define IMX8QM_QSPI1A_SS0_B 183 #define IMX8QM_QSPI1A_SS0_B 172 184 #define IMX8QM_QSPI1A_SS1_B 184 #define IMX8QM_QSPI1A_SS1_B 173 185 #define IMX8QM_QSPI1A_SCLK 185 #define IMX8QM_QSPI1A_SCLK 174 186 #define IMX8QM_QSPI1A_DQS 186 #define IMX8QM_QSPI1A_DQS 175 187 #define IMX8QM_QSPI1A_DATA3 187 #define IMX8QM_QSPI1A_DATA3 176 188 #define IMX8QM_QSPI1A_DATA2 188 #define IMX8QM_QSPI1A_DATA2 177 189 #define IMX8QM_QSPI1A_DATA1 189 #define IMX8QM_QSPI1A_DATA1 178 190 #define IMX8QM_QSPI1A_DATA0 190 #define IMX8QM_QSPI1A_DATA0 179 191 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1 191 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1 180 192 #define IMX8QM_QSPI0A_DATA0 192 #define IMX8QM_QSPI0A_DATA0 181 193 #define IMX8QM_QSPI0A_DATA1 193 #define IMX8QM_QSPI0A_DATA1 182 194 #define IMX8QM_QSPI0A_DATA2 194 #define IMX8QM_QSPI0A_DATA2 183 195 #define IMX8QM_QSPI0A_DATA3 195 #define IMX8QM_QSPI0A_DATA3 184 196 #define IMX8QM_QSPI0A_DQS 196 #define IMX8QM_QSPI0A_DQS 185 197 #define IMX8QM_QSPI0A_SS0_B 197 #define IMX8QM_QSPI0A_SS0_B 186 198 #define IMX8QM_QSPI0A_SS1_B 198 #define IMX8QM_QSPI0A_SS1_B 187 199 #define IMX8QM_QSPI0A_SCLK 199 #define IMX8QM_QSPI0A_SCLK 188 200 #define IMX8QM_QSPI0B_SCLK 200 #define IMX8QM_QSPI0B_SCLK 189 201 #define IMX8QM_QSPI0B_DATA0 201 #define IMX8QM_QSPI0B_DATA0 190 202 #define IMX8QM_QSPI0B_DATA1 202 #define IMX8QM_QSPI0B_DATA1 191 203 #define IMX8QM_QSPI0B_DATA2 203 #define IMX8QM_QSPI0B_DATA2 192 204 #define IMX8QM_QSPI0B_DATA3 204 #define IMX8QM_QSPI0B_DATA3 193 205 #define IMX8QM_QSPI0B_DQS 205 #define IMX8QM_QSPI0B_DQS 194 206 #define IMX8QM_QSPI0B_SS0_B 206 #define IMX8QM_QSPI0B_SS0_B 195 207 #define IMX8QM_QSPI0B_SS1_B 207 #define IMX8QM_QSPI0B_SS1_B 196 208 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0 208 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0 197 209 #define IMX8QM_PCIE_CTRL0_CLKREQ_B 209 #define IMX8QM_PCIE_CTRL0_CLKREQ_B 198 210 #define IMX8QM_PCIE_CTRL0_WAKE_B 210 #define IMX8QM_PCIE_CTRL0_WAKE_B 199 211 #define IMX8QM_PCIE_CTRL0_PERST_B 211 #define IMX8QM_PCIE_CTRL0_PERST_B 200 212 #define IMX8QM_PCIE_CTRL1_CLKREQ_B 212 #define IMX8QM_PCIE_CTRL1_CLKREQ_B 201 213 #define IMX8QM_PCIE_CTRL1_WAKE_B 213 #define IMX8QM_PCIE_CTRL1_WAKE_B 202 214 #define IMX8QM_PCIE_CTRL1_PERST_B 214 #define IMX8QM_PCIE_CTRL1_PERST_B 203 215 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP 215 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP 204 216 #define IMX8QM_USB_HSIC0_DATA 216 #define IMX8QM_USB_HSIC0_DATA 205 217 #define IMX8QM_USB_HSIC0_STROBE 217 #define IMX8QM_USB_HSIC0_STROBE 206 218 #define IMX8QM_CALIBRATION_0_HSIC 218 #define IMX8QM_CALIBRATION_0_HSIC 207 219 #define IMX8QM_CALIBRATION_1_HSIC 219 #define IMX8QM_CALIBRATION_1_HSIC 208 220 #define IMX8QM_EMMC0_CLK 220 #define IMX8QM_EMMC0_CLK 209 221 #define IMX8QM_EMMC0_CMD 221 #define IMX8QM_EMMC0_CMD 210 222 #define IMX8QM_EMMC0_DATA0 222 #define IMX8QM_EMMC0_DATA0 211 223 #define IMX8QM_EMMC0_DATA1 223 #define IMX8QM_EMMC0_DATA1 212 224 #define IMX8QM_EMMC0_DATA2 224 #define IMX8QM_EMMC0_DATA2 213 225 #define IMX8QM_EMMC0_DATA3 225 #define IMX8QM_EMMC0_DATA3 214 226 #define IMX8QM_EMMC0_DATA4 226 #define IMX8QM_EMMC0_DATA4 215 227 #define IMX8QM_EMMC0_DATA5 227 #define IMX8QM_EMMC0_DATA5 216 228 #define IMX8QM_EMMC0_DATA6 228 #define IMX8QM_EMMC0_DATA6 217 229 #define IMX8QM_EMMC0_DATA7 229 #define IMX8QM_EMMC0_DATA7 218 230 #define IMX8QM_EMMC0_STROBE 230 #define IMX8QM_EMMC0_STROBE 219 231 #define IMX8QM_EMMC0_RESET_B 231 #define IMX8QM_EMMC0_RESET_B 220 232 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX 232 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX 221 233 #define IMX8QM_USDHC1_CLK 233 #define IMX8QM_USDHC1_CLK 222 234 #define IMX8QM_USDHC1_CMD 234 #define IMX8QM_USDHC1_CMD 223 235 #define IMX8QM_USDHC1_DATA0 235 #define IMX8QM_USDHC1_DATA0 224 236 #define IMX8QM_USDHC1_DATA1 236 #define IMX8QM_USDHC1_DATA1 225 237 #define IMX8QM_CTL_NAND_RE_P_N 237 #define IMX8QM_CTL_NAND_RE_P_N 226 238 #define IMX8QM_USDHC1_DATA2 238 #define IMX8QM_USDHC1_DATA2 227 239 #define IMX8QM_USDHC1_DATA3 239 #define IMX8QM_USDHC1_DATA3 228 240 #define IMX8QM_CTL_NAND_DQS_P_N 240 #define IMX8QM_CTL_NAND_DQS_P_N 229 241 #define IMX8QM_USDHC1_DATA4 241 #define IMX8QM_USDHC1_DATA4 230 242 #define IMX8QM_USDHC1_DATA5 242 #define IMX8QM_USDHC1_DATA5 231 243 #define IMX8QM_USDHC1_DATA6 243 #define IMX8QM_USDHC1_DATA6 232 244 #define IMX8QM_USDHC1_DATA7 244 #define IMX8QM_USDHC1_DATA7 233 245 #define IMX8QM_USDHC1_STROBE 245 #define IMX8QM_USDHC1_STROBE 234 246 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2 246 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2 235 247 #define IMX8QM_USDHC2_CLK 247 #define IMX8QM_USDHC2_CLK 236 248 #define IMX8QM_USDHC2_CMD 248 #define IMX8QM_USDHC2_CMD 237 249 #define IMX8QM_USDHC2_DATA0 249 #define IMX8QM_USDHC2_DATA0 238 250 #define IMX8QM_USDHC2_DATA1 250 #define IMX8QM_USDHC2_DATA1 239 251 #define IMX8QM_USDHC2_DATA2 251 #define IMX8QM_USDHC2_DATA2 240 252 #define IMX8QM_USDHC2_DATA3 252 #define IMX8QM_USDHC2_DATA3 241 253 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3 253 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3 242 254 #define IMX8QM_ENET0_RGMII_TXC 254 #define IMX8QM_ENET0_RGMII_TXC 243 255 #define IMX8QM_ENET0_RGMII_TX_CTL 255 #define IMX8QM_ENET0_RGMII_TX_CTL 244 256 #define IMX8QM_ENET0_RGMII_TXD0 256 #define IMX8QM_ENET0_RGMII_TXD0 245 257 #define IMX8QM_ENET0_RGMII_TXD1 257 #define IMX8QM_ENET0_RGMII_TXD1 246 258 #define IMX8QM_ENET0_RGMII_TXD2 258 #define IMX8QM_ENET0_RGMII_TXD2 247 259 #define IMX8QM_ENET0_RGMII_TXD3 259 #define IMX8QM_ENET0_RGMII_TXD3 248 260 #define IMX8QM_ENET0_RGMII_RXC 260 #define IMX8QM_ENET0_RGMII_RXC 249 261 #define IMX8QM_ENET0_RGMII_RX_CTL 261 #define IMX8QM_ENET0_RGMII_RX_CTL 250 262 #define IMX8QM_ENET0_RGMII_RXD0 262 #define IMX8QM_ENET0_RGMII_RXD0 251 263 #define IMX8QM_ENET0_RGMII_RXD1 263 #define IMX8QM_ENET0_RGMII_RXD1 252 264 #define IMX8QM_ENET0_RGMII_RXD2 264 #define IMX8QM_ENET0_RGMII_RXD2 253 265 #define IMX8QM_ENET0_RGMII_RXD3 265 #define IMX8QM_ENET0_RGMII_RXD3 254 266 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENET 266 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB 255 267 #define IMX8QM_ENET1_RGMII_TXC 267 #define IMX8QM_ENET1_RGMII_TXC 256 268 #define IMX8QM_ENET1_RGMII_TX_CTL 268 #define IMX8QM_ENET1_RGMII_TX_CTL 257 269 #define IMX8QM_ENET1_RGMII_TXD0 269 #define IMX8QM_ENET1_RGMII_TXD0 258 270 #define IMX8QM_ENET1_RGMII_TXD1 270 #define IMX8QM_ENET1_RGMII_TXD1 259 271 #define IMX8QM_ENET1_RGMII_TXD2 271 #define IMX8QM_ENET1_RGMII_TXD2 260 272 #define IMX8QM_ENET1_RGMII_TXD3 272 #define IMX8QM_ENET1_RGMII_TXD3 261 273 #define IMX8QM_ENET1_RGMII_RXC 273 #define IMX8QM_ENET1_RGMII_RXC 262 274 #define IMX8QM_ENET1_RGMII_RX_CTL 274 #define IMX8QM_ENET1_RGMII_RX_CTL 263 275 #define IMX8QM_ENET1_RGMII_RXD0 275 #define IMX8QM_ENET1_RGMII_RXD0 264 276 #define IMX8QM_ENET1_RGMII_RXD1 276 #define IMX8QM_ENET1_RGMII_RXD1 265 277 #define IMX8QM_ENET1_RGMII_RXD2 277 #define IMX8QM_ENET1_RGMII_RXD2 266 278 #define IMX8QM_ENET1_RGMII_RXD3 278 #define IMX8QM_ENET1_RGMII_RXD3 267 279 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENET 279 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA 268 280 280 281 /* 281 /* 282 * format: <pin_id mux_mode> 282 * format: <pin_id mux_mode> 283 */ 283 */ 284 #define IMX8QM_SIM0_CLK_DMA_SIM0_CLK 284 #define IMX8QM_SIM0_CLK_DMA_SIM0_CLK IMX8QM_SIM0_CLK 0 285 #define IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00 285 #define IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00 IMX8QM_SIM0_CLK 3 286 #define IMX8QM_SIM0_RST_DMA_SIM0_RST 286 #define IMX8QM_SIM0_RST_DMA_SIM0_RST IMX8QM_SIM0_RST 0 287 #define IMX8QM_SIM0_RST_LSIO_GPIO0_IO01 287 #define IMX8QM_SIM0_RST_LSIO_GPIO0_IO01 IMX8QM_SIM0_RST 3 288 #define IMX8QM_SIM0_IO_DMA_SIM0_IO 288 #define IMX8QM_SIM0_IO_DMA_SIM0_IO IMX8QM_SIM0_IO 0 289 #define IMX8QM_SIM0_IO_LSIO_GPIO0_IO02 289 #define IMX8QM_SIM0_IO_LSIO_GPIO0_IO02 IMX8QM_SIM0_IO 3 290 #define IMX8QM_SIM0_PD_DMA_SIM0_PD 290 #define IMX8QM_SIM0_PD_DMA_SIM0_PD IMX8QM_SIM0_PD 0 291 #define IMX8QM_SIM0_PD_DMA_I2C3_SCL 291 #define IMX8QM_SIM0_PD_DMA_I2C3_SCL IMX8QM_SIM0_PD 1 292 #define IMX8QM_SIM0_PD_LSIO_GPIO0_IO03 292 #define IMX8QM_SIM0_PD_LSIO_GPIO0_IO03 IMX8QM_SIM0_PD 3 293 #define IMX8QM_SIM0_POWER_EN_DMA_SIM0_POWER_EN 293 #define IMX8QM_SIM0_POWER_EN_DMA_SIM0_POWER_EN IMX8QM_SIM0_POWER_EN 0 294 #define IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA 294 #define IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA IMX8QM_SIM0_POWER_EN 1 295 #define IMX8QM_SIM0_POWER_EN_LSIO_GPIO0_IO04 295 #define IMX8QM_SIM0_POWER_EN_LSIO_GPIO0_IO04 IMX8QM_SIM0_POWER_EN 3 296 #define IMX8QM_SIM0_GPIO0_00_DMA_SIM0_POWER_EN 296 #define IMX8QM_SIM0_GPIO0_00_DMA_SIM0_POWER_EN IMX8QM_SIM0_GPIO0_00 0 297 #define IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05 297 #define IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05 IMX8QM_SIM0_GPIO0_00 3 298 #define IMX8QM_M40_I2C0_SCL_M40_I2C0_SCL 298 #define IMX8QM_M40_I2C0_SCL_M40_I2C0_SCL IMX8QM_M40_I2C0_SCL 0 299 #define IMX8QM_M40_I2C0_SCL_M40_UART0_RX 299 #define IMX8QM_M40_I2C0_SCL_M40_UART0_RX IMX8QM_M40_I2C0_SCL 1 300 #define IMX8QM_M40_I2C0_SCL_M40_GPIO0_IO02 300 #define IMX8QM_M40_I2C0_SCL_M40_GPIO0_IO02 IMX8QM_M40_I2C0_SCL 2 301 #define IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06 301 #define IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06 IMX8QM_M40_I2C0_SCL 3 302 #define IMX8QM_M40_I2C0_SDA_M40_I2C0_SDA 302 #define IMX8QM_M40_I2C0_SDA_M40_I2C0_SDA IMX8QM_M40_I2C0_SDA 0 303 #define IMX8QM_M40_I2C0_SDA_M40_UART0_TX 303 #define IMX8QM_M40_I2C0_SDA_M40_UART0_TX IMX8QM_M40_I2C0_SDA 1 304 #define IMX8QM_M40_I2C0_SDA_M40_GPIO0_IO03 304 #define IMX8QM_M40_I2C0_SDA_M40_GPIO0_IO03 IMX8QM_M40_I2C0_SDA 2 305 #define IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07 305 #define IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07 IMX8QM_M40_I2C0_SDA 3 306 #define IMX8QM_M40_GPIO0_00_M40_GPIO0_IO00 306 #define IMX8QM_M40_GPIO0_00_M40_GPIO0_IO00 IMX8QM_M40_GPIO0_00 0 307 #define IMX8QM_M40_GPIO0_00_M40_TPM0_CH0 307 #define IMX8QM_M40_GPIO0_00_M40_TPM0_CH0 IMX8QM_M40_GPIO0_00 1 308 #define IMX8QM_M40_GPIO0_00_DMA_UART4_RX 308 #define IMX8QM_M40_GPIO0_00_DMA_UART4_RX IMX8QM_M40_GPIO0_00 2 309 #define IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08 309 #define IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08 IMX8QM_M40_GPIO0_00 3 310 #define IMX8QM_M40_GPIO0_01_M40_GPIO0_IO01 310 #define IMX8QM_M40_GPIO0_01_M40_GPIO0_IO01 IMX8QM_M40_GPIO0_01 0 311 #define IMX8QM_M40_GPIO0_01_M40_TPM0_CH1 311 #define IMX8QM_M40_GPIO0_01_M40_TPM0_CH1 IMX8QM_M40_GPIO0_01 1 312 #define IMX8QM_M40_GPIO0_01_DMA_UART4_TX 312 #define IMX8QM_M40_GPIO0_01_DMA_UART4_TX IMX8QM_M40_GPIO0_01 2 313 #define IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09 313 #define IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09 IMX8QM_M40_GPIO0_01 3 314 #define IMX8QM_M41_I2C0_SCL_M41_I2C0_SCL 314 #define IMX8QM_M41_I2C0_SCL_M41_I2C0_SCL IMX8QM_M41_I2C0_SCL 0 315 #define IMX8QM_M41_I2C0_SCL_M41_UART0_RX 315 #define IMX8QM_M41_I2C0_SCL_M41_UART0_RX IMX8QM_M41_I2C0_SCL 1 316 #define IMX8QM_M41_I2C0_SCL_M41_GPIO0_IO02 316 #define IMX8QM_M41_I2C0_SCL_M41_GPIO0_IO02 IMX8QM_M41_I2C0_SCL 2 317 #define IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10 317 #define IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10 IMX8QM_M41_I2C0_SCL 3 318 #define IMX8QM_M41_I2C0_SDA_M41_I2C0_SDA 318 #define IMX8QM_M41_I2C0_SDA_M41_I2C0_SDA IMX8QM_M41_I2C0_SDA 0 319 #define IMX8QM_M41_I2C0_SDA_M41_UART0_TX 319 #define IMX8QM_M41_I2C0_SDA_M41_UART0_TX IMX8QM_M41_I2C0_SDA 1 320 #define IMX8QM_M41_I2C0_SDA_M41_GPIO0_IO03 320 #define IMX8QM_M41_I2C0_SDA_M41_GPIO0_IO03 IMX8QM_M41_I2C0_SDA 2 321 #define IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11 321 #define IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11 IMX8QM_M41_I2C0_SDA 3 322 #define IMX8QM_M41_GPIO0_00_M41_GPIO0_IO00 322 #define IMX8QM_M41_GPIO0_00_M41_GPIO0_IO00 IMX8QM_M41_GPIO0_00 0 323 #define IMX8QM_M41_GPIO0_00_M41_TPM0_CH0 323 #define IMX8QM_M41_GPIO0_00_M41_TPM0_CH0 IMX8QM_M41_GPIO0_00 1 324 #define IMX8QM_M41_GPIO0_00_DMA_UART3_RX 324 #define IMX8QM_M41_GPIO0_00_DMA_UART3_RX IMX8QM_M41_GPIO0_00 2 325 #define IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12 325 #define IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12 IMX8QM_M41_GPIO0_00 3 326 #define IMX8QM_M41_GPIO0_01_M41_GPIO0_IO01 326 #define IMX8QM_M41_GPIO0_01_M41_GPIO0_IO01 IMX8QM_M41_GPIO0_01 0 327 #define IMX8QM_M41_GPIO0_01_M41_TPM0_CH1 327 #define IMX8QM_M41_GPIO0_01_M41_TPM0_CH1 IMX8QM_M41_GPIO0_01 1 328 #define IMX8QM_M41_GPIO0_01_DMA_UART3_TX 328 #define IMX8QM_M41_GPIO0_01_DMA_UART3_TX IMX8QM_M41_GPIO0_01 2 329 #define IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13 329 #define IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13 IMX8QM_M41_GPIO0_01 3 330 #define IMX8QM_GPT0_CLK_LSIO_GPT0_CLK 330 #define IMX8QM_GPT0_CLK_LSIO_GPT0_CLK IMX8QM_GPT0_CLK 0 331 #define IMX8QM_GPT0_CLK_DMA_I2C1_SCL 331 #define IMX8QM_GPT0_CLK_DMA_I2C1_SCL IMX8QM_GPT0_CLK 1 332 #define IMX8QM_GPT0_CLK_LSIO_KPP0_COL4 332 #define IMX8QM_GPT0_CLK_LSIO_KPP0_COL4 IMX8QM_GPT0_CLK 2 333 #define IMX8QM_GPT0_CLK_LSIO_GPIO0_IO14 333 #define IMX8QM_GPT0_CLK_LSIO_GPIO0_IO14 IMX8QM_GPT0_CLK 3 334 #define IMX8QM_GPT0_CAPTURE_LSIO_GPT0_CAPTURE 334 #define IMX8QM_GPT0_CAPTURE_LSIO_GPT0_CAPTURE IMX8QM_GPT0_CAPTURE 0 335 #define IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA 335 #define IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA IMX8QM_GPT0_CAPTURE 1 336 #define IMX8QM_GPT0_CAPTURE_LSIO_KPP0_COL5 336 #define IMX8QM_GPT0_CAPTURE_LSIO_KPP0_COL5 IMX8QM_GPT0_CAPTURE 2 337 #define IMX8QM_GPT0_CAPTURE_LSIO_GPIO0_IO15 337 #define IMX8QM_GPT0_CAPTURE_LSIO_GPIO0_IO15 IMX8QM_GPT0_CAPTURE 3 338 #define IMX8QM_GPT0_COMPARE_LSIO_GPT0_COMPARE 338 #define IMX8QM_GPT0_COMPARE_LSIO_GPT0_COMPARE IMX8QM_GPT0_COMPARE 0 339 #define IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT 339 #define IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT IMX8QM_GPT0_COMPARE 1 340 #define IMX8QM_GPT0_COMPARE_LSIO_KPP0_COL6 340 #define IMX8QM_GPT0_COMPARE_LSIO_KPP0_COL6 IMX8QM_GPT0_COMPARE 2 341 #define IMX8QM_GPT0_COMPARE_LSIO_GPIO0_IO16 341 #define IMX8QM_GPT0_COMPARE_LSIO_GPIO0_IO16 IMX8QM_GPT0_COMPARE 3 342 #define IMX8QM_GPT1_CLK_LSIO_GPT1_CLK 342 #define IMX8QM_GPT1_CLK_LSIO_GPT1_CLK IMX8QM_GPT1_CLK 0 343 #define IMX8QM_GPT1_CLK_DMA_I2C2_SCL 343 #define IMX8QM_GPT1_CLK_DMA_I2C2_SCL IMX8QM_GPT1_CLK 1 344 #define IMX8QM_GPT1_CLK_LSIO_KPP0_COL7 344 #define IMX8QM_GPT1_CLK_LSIO_KPP0_COL7 IMX8QM_GPT1_CLK 2 345 #define IMX8QM_GPT1_CLK_LSIO_GPIO0_IO17 345 #define IMX8QM_GPT1_CLK_LSIO_GPIO0_IO17 IMX8QM_GPT1_CLK 3 346 #define IMX8QM_GPT1_CAPTURE_LSIO_GPT1_CAPTURE 346 #define IMX8QM_GPT1_CAPTURE_LSIO_GPT1_CAPTURE IMX8QM_GPT1_CAPTURE 0 347 #define IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA 347 #define IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA IMX8QM_GPT1_CAPTURE 1 348 #define IMX8QM_GPT1_CAPTURE_LSIO_KPP0_ROW4 348 #define IMX8QM_GPT1_CAPTURE_LSIO_KPP0_ROW4 IMX8QM_GPT1_CAPTURE 2 349 #define IMX8QM_GPT1_CAPTURE_LSIO_GPIO0_IO18 349 #define IMX8QM_GPT1_CAPTURE_LSIO_GPIO0_IO18 IMX8QM_GPT1_CAPTURE 3 350 #define IMX8QM_GPT1_COMPARE_LSIO_GPT1_COMPARE 350 #define IMX8QM_GPT1_COMPARE_LSIO_GPT1_COMPARE IMX8QM_GPT1_COMPARE 0 351 #define IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT 351 #define IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT IMX8QM_GPT1_COMPARE 1 352 #define IMX8QM_GPT1_COMPARE_LSIO_KPP0_ROW5 352 #define IMX8QM_GPT1_COMPARE_LSIO_KPP0_ROW5 IMX8QM_GPT1_COMPARE 2 353 #define IMX8QM_GPT1_COMPARE_LSIO_GPIO0_IO19 353 #define IMX8QM_GPT1_COMPARE_LSIO_GPIO0_IO19 IMX8QM_GPT1_COMPARE 3 354 #define IMX8QM_UART0_RX_DMA_UART0_RX 354 #define IMX8QM_UART0_RX_DMA_UART0_RX IMX8QM_UART0_RX 0 355 #define IMX8QM_UART0_RX_SCU_UART0_RX 355 #define IMX8QM_UART0_RX_SCU_UART0_RX IMX8QM_UART0_RX 1 356 #define IMX8QM_UART0_RX_LSIO_GPIO0_IO20 356 #define IMX8QM_UART0_RX_LSIO_GPIO0_IO20 IMX8QM_UART0_RX 3 357 #define IMX8QM_UART0_TX_DMA_UART0_TX 357 #define IMX8QM_UART0_TX_DMA_UART0_TX IMX8QM_UART0_TX 0 358 #define IMX8QM_UART0_TX_SCU_UART0_TX 358 #define IMX8QM_UART0_TX_SCU_UART0_TX IMX8QM_UART0_TX 1 359 #define IMX8QM_UART0_TX_LSIO_GPIO0_IO21 359 #define IMX8QM_UART0_TX_LSIO_GPIO0_IO21 IMX8QM_UART0_TX 3 360 #define IMX8QM_UART0_RTS_B_DMA_UART0_RTS_B 360 #define IMX8QM_UART0_RTS_B_DMA_UART0_RTS_B IMX8QM_UART0_RTS_B 0 361 #define IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT 361 #define IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT IMX8QM_UART0_RTS_B 1 362 #define IMX8QM_UART0_RTS_B_DMA_UART2_RX 362 #define IMX8QM_UART0_RTS_B_DMA_UART2_RX IMX8QM_UART0_RTS_B 2 363 #define IMX8QM_UART0_RTS_B_LSIO_GPIO0_IO22 363 #define IMX8QM_UART0_RTS_B_LSIO_GPIO0_IO22 IMX8QM_UART0_RTS_B 3 364 #define IMX8QM_UART0_CTS_B_DMA_UART0_CTS_B 364 #define IMX8QM_UART0_CTS_B_DMA_UART0_CTS_B IMX8QM_UART0_CTS_B 0 365 #define IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT 365 #define IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT IMX8QM_UART0_CTS_B 1 366 #define IMX8QM_UART0_CTS_B_DMA_UART2_TX 366 #define IMX8QM_UART0_CTS_B_DMA_UART2_TX IMX8QM_UART0_CTS_B 2 367 #define IMX8QM_UART0_CTS_B_LSIO_GPIO0_IO23 367 #define IMX8QM_UART0_CTS_B_LSIO_GPIO0_IO23 IMX8QM_UART0_CTS_B 3 368 #define IMX8QM_UART1_TX_DMA_UART1_TX 368 #define IMX8QM_UART1_TX_DMA_UART1_TX IMX8QM_UART1_TX 0 369 #define IMX8QM_UART1_TX_DMA_SPI3_SCK 369 #define IMX8QM_UART1_TX_DMA_SPI3_SCK IMX8QM_UART1_TX 1 370 #define IMX8QM_UART1_TX_LSIO_GPIO0_IO24 370 #define IMX8QM_UART1_TX_LSIO_GPIO0_IO24 IMX8QM_UART1_TX 3 371 #define IMX8QM_UART1_RX_DMA_UART1_RX 371 #define IMX8QM_UART1_RX_DMA_UART1_RX IMX8QM_UART1_RX 0 372 #define IMX8QM_UART1_RX_DMA_SPI3_SDO 372 #define IMX8QM_UART1_RX_DMA_SPI3_SDO IMX8QM_UART1_RX 1 373 #define IMX8QM_UART1_RX_LSIO_GPIO0_IO25 373 #define IMX8QM_UART1_RX_LSIO_GPIO0_IO25 IMX8QM_UART1_RX 3 374 #define IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B 374 #define IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B IMX8QM_UART1_RTS_B 0 375 #define IMX8QM_UART1_RTS_B_DMA_SPI3_SDI 375 #define IMX8QM_UART1_RTS_B_DMA_SPI3_SDI IMX8QM_UART1_RTS_B 1 376 #define IMX8QM_UART1_RTS_B_DMA_UART1_CTS_B 376 #define IMX8QM_UART1_RTS_B_DMA_UART1_CTS_B IMX8QM_UART1_RTS_B 2 377 #define IMX8QM_UART1_RTS_B_LSIO_GPIO0_IO26 377 #define IMX8QM_UART1_RTS_B_LSIO_GPIO0_IO26 IMX8QM_UART1_RTS_B 3 378 #define IMX8QM_UART1_CTS_B_DMA_UART1_CTS_B 378 #define IMX8QM_UART1_CTS_B_DMA_UART1_CTS_B IMX8QM_UART1_CTS_B 0 379 #define IMX8QM_UART1_CTS_B_DMA_SPI3_CS0 379 #define IMX8QM_UART1_CTS_B_DMA_SPI3_CS0 IMX8QM_UART1_CTS_B 1 380 #define IMX8QM_UART1_CTS_B_DMA_UART1_RTS_B 380 #define IMX8QM_UART1_CTS_B_DMA_UART1_RTS_B IMX8QM_UART1_CTS_B 2 381 #define IMX8QM_UART1_CTS_B_LSIO_GPIO0_IO27 381 #define IMX8QM_UART1_CTS_B_LSIO_GPIO0_IO27 IMX8QM_UART1_CTS_B 3 382 #define IMX8QM_SCU_PMIC_MEMC_ON_SCU_GPIO0_IOXX 382 #define IMX8QM_SCU_PMIC_MEMC_ON_SCU_GPIO0_IOXX_PMIC_MEMC_ON IMX8QM_SCU_PMIC_MEMC_ON 0 383 #define IMX8QM_SCU_WDOG_OUT_SCU_WDOG0_WDOG_OUT 383 #define IMX8QM_SCU_WDOG_OUT_SCU_WDOG0_WDOG_OUT IMX8QM_SCU_WDOG_OUT 0 384 #define IMX8QM_PMIC_I2C_SDA_SCU_PMIC_I2C_SDA 384 #define IMX8QM_PMIC_I2C_SDA_SCU_PMIC_I2C_SDA IMX8QM_PMIC_I2C_SDA 0 385 #define IMX8QM_PMIC_I2C_SCL_SCU_PMIC_I2C_SCL 385 #define IMX8QM_PMIC_I2C_SCL_SCU_PMIC_I2C_SCL IMX8QM_PMIC_I2C_SCL 0 386 #define IMX8QM_PMIC_EARLY_WARNING_SCU_PMIC_EAR 386 #define IMX8QM_PMIC_EARLY_WARNING_SCU_PMIC_EARLY_WARNING IMX8QM_PMIC_EARLY_WARNING 0 387 #define IMX8QM_PMIC_INT_B_SCU_DIMX8QMMIC_INT_B 387 #define IMX8QM_PMIC_INT_B_SCU_DIMX8QMMIC_INT_B IMX8QM_PMIC_INT_B 0 388 #define IMX8QM_SCU_GPIO0_00_SCU_GPIO0_IO00 388 #define IMX8QM_SCU_GPIO0_00_SCU_GPIO0_IO00 IMX8QM_SCU_GPIO0_00 0 389 #define IMX8QM_SCU_GPIO0_00_SCU_UART0_RX 389 #define IMX8QM_SCU_GPIO0_00_SCU_UART0_RX IMX8QM_SCU_GPIO0_00 1 390 #define IMX8QM_SCU_GPIO0_00_LSIO_GPIO0_IO28 390 #define IMX8QM_SCU_GPIO0_00_LSIO_GPIO0_IO28 IMX8QM_SCU_GPIO0_00 3 391 #define IMX8QM_SCU_GPIO0_01_SCU_GPIO0_IO01 391 #define IMX8QM_SCU_GPIO0_01_SCU_GPIO0_IO01 IMX8QM_SCU_GPIO0_01 0 392 #define IMX8QM_SCU_GPIO0_01_SCU_UART0_TX 392 #define IMX8QM_SCU_GPIO0_01_SCU_UART0_TX IMX8QM_SCU_GPIO0_01 1 393 #define IMX8QM_SCU_GPIO0_01_LSIO_GPIO0_IO29 393 #define IMX8QM_SCU_GPIO0_01_LSIO_GPIO0_IO29 IMX8QM_SCU_GPIO0_01 3 394 #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IO02 394 #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IO02 IMX8QM_SCU_GPIO0_02 0 395 #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IOXX_PMI 395 #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IOXX_PMIC_GPU0_ON IMX8QM_SCU_GPIO0_02 1 396 #define IMX8QM_SCU_GPIO0_02_LSIO_GPIO0_IO30 396 #define IMX8QM_SCU_GPIO0_02_LSIO_GPIO0_IO30 IMX8QM_SCU_GPIO0_02 3 397 #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IO03 397 #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IO03 IMX8QM_SCU_GPIO0_03 0 398 #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IOXX_PMI 398 #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IOXX_PMIC_GPU1_ON IMX8QM_SCU_GPIO0_03 1 399 #define IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31 399 #define IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31 IMX8QM_SCU_GPIO0_03 3 400 #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IO04 400 #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IO04 IMX8QM_SCU_GPIO0_04 0 401 #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IOXX_PMI 401 #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IOXX_PMIC_A72_ON IMX8QM_SCU_GPIO0_04 1 402 #define IMX8QM_SCU_GPIO0_04_LSIO_GPIO1_IO00 402 #define IMX8QM_SCU_GPIO0_04_LSIO_GPIO1_IO00 IMX8QM_SCU_GPIO0_04 3 403 #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IO05 403 #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IO05 IMX8QM_SCU_GPIO0_05 0 404 #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IOXX_PMI 404 #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IOXX_PMIC_A53_ON IMX8QM_SCU_GPIO0_05 1 405 #define IMX8QM_SCU_GPIO0_05_LSIO_GPIO1_IO01 405 #define IMX8QM_SCU_GPIO0_05_LSIO_GPIO1_IO01 IMX8QM_SCU_GPIO0_05 3 406 #define IMX8QM_SCU_GPIO0_06_SCU_GPIO0_IO06 406 #define IMX8QM_SCU_GPIO0_06_SCU_GPIO0_IO06 IMX8QM_SCU_GPIO0_06 0 407 #define IMX8QM_SCU_GPIO0_06_SCU_TPM0_CH0 407 #define IMX8QM_SCU_GPIO0_06_SCU_TPM0_CH0 IMX8QM_SCU_GPIO0_06 1 408 #define IMX8QM_SCU_GPIO0_06_LSIO_GPIO1_IO02 408 #define IMX8QM_SCU_GPIO0_06_LSIO_GPIO1_IO02 IMX8QM_SCU_GPIO0_06 3 409 #define IMX8QM_SCU_GPIO0_07_SCU_GPIO0_IO07 409 #define IMX8QM_SCU_GPIO0_07_SCU_GPIO0_IO07 IMX8QM_SCU_GPIO0_07 0 410 #define IMX8QM_SCU_GPIO0_07_SCU_TPM0_CH1 410 #define IMX8QM_SCU_GPIO0_07_SCU_TPM0_CH1 IMX8QM_SCU_GPIO0_07 1 411 #define IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_ 411 #define IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_OUTPUT_32K IMX8QM_SCU_GPIO0_07 2 412 #define IMX8QM_SCU_GPIO0_07_LSIO_GPIO1_IO03 412 #define IMX8QM_SCU_GPIO0_07_LSIO_GPIO1_IO03 IMX8QM_SCU_GPIO0_07 3 413 #define IMX8QM_SCU_BOOT_MODE0_SCU_DSC_BOOT_MOD 413 #define IMX8QM_SCU_BOOT_MODE0_SCU_DSC_BOOT_MODE0 IMX8QM_SCU_BOOT_MODE0 0 414 #define IMX8QM_SCU_BOOT_MODE1_SCU_DSC_BOOT_MOD 414 #define IMX8QM_SCU_BOOT_MODE1_SCU_DSC_BOOT_MODE1 IMX8QM_SCU_BOOT_MODE1 0 415 #define IMX8QM_SCU_BOOT_MODE2_SCU_DSC_BOOT_MOD 415 #define IMX8QM_SCU_BOOT_MODE2_SCU_DSC_BOOT_MODE2 IMX8QM_SCU_BOOT_MODE2 0 416 #define IMX8QM_SCU_BOOT_MODE3_SCU_DSC_BOOT_MOD 416 #define IMX8QM_SCU_BOOT_MODE3_SCU_DSC_BOOT_MODE3 IMX8QM_SCU_BOOT_MODE3 0 417 #define IMX8QM_SCU_BOOT_MODE4_SCU_DSC_BOOT_MOD 417 #define IMX8QM_SCU_BOOT_MODE4_SCU_DSC_BOOT_MODE4 IMX8QM_SCU_BOOT_MODE4 0 418 #define IMX8QM_SCU_BOOT_MODE4_SCU_PMIC_I2C_SCL 418 #define IMX8QM_SCU_BOOT_MODE4_SCU_PMIC_I2C_SCL IMX8QM_SCU_BOOT_MODE4 1 419 #define IMX8QM_SCU_BOOT_MODE5_SCU_DSC_BOOT_MOD 419 #define IMX8QM_SCU_BOOT_MODE5_SCU_DSC_BOOT_MODE5 IMX8QM_SCU_BOOT_MODE5 0 420 #define IMX8QM_SCU_BOOT_MODE5_SCU_PMIC_I2C_SDA 420 #define IMX8QM_SCU_BOOT_MODE5_SCU_PMIC_I2C_SDA IMX8QM_SCU_BOOT_MODE5 1 421 #define IMX8QM_LVDS0_GPIO00_LVDS0_GPIO0_IO00 421 #define IMX8QM_LVDS0_GPIO00_LVDS0_GPIO0_IO00 IMX8QM_LVDS0_GPIO00 0 422 #define IMX8QM_LVDS0_GPIO00_LVDS0_PWM0_OUT 422 #define IMX8QM_LVDS0_GPIO00_LVDS0_PWM0_OUT IMX8QM_LVDS0_GPIO00 1 423 #define IMX8QM_LVDS0_GPIO00_LSIO_GPIO1_IO04 423 #define IMX8QM_LVDS0_GPIO00_LSIO_GPIO1_IO04 IMX8QM_LVDS0_GPIO00 3 424 #define IMX8QM_LVDS0_GPIO01_LVDS0_GPIO0_IO01 424 #define IMX8QM_LVDS0_GPIO01_LVDS0_GPIO0_IO01 IMX8QM_LVDS0_GPIO01 0 425 #define IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 425 #define IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 IMX8QM_LVDS0_GPIO01 3 426 #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_I2C0_SCL 426 #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_I2C0_SCL IMX8QM_LVDS0_I2C0_SCL 0 427 #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_GPIO0_IO02 427 #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_GPIO0_IO02 IMX8QM_LVDS0_I2C0_SCL 1 428 #define IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 428 #define IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 IMX8QM_LVDS0_I2C0_SCL 3 429 #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_I2C0_SDA 429 #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_I2C0_SDA IMX8QM_LVDS0_I2C0_SDA 0 430 #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_GPIO0_IO03 430 #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_GPIO0_IO03 IMX8QM_LVDS0_I2C0_SDA 1 431 #define IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 431 #define IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 IMX8QM_LVDS0_I2C0_SDA 3 432 #define IMX8QM_LVDS0_I2C1_SCL_LVDS0_I2C1_SCL 432 #define IMX8QM_LVDS0_I2C1_SCL_LVDS0_I2C1_SCL IMX8QM_LVDS0_I2C1_SCL 0 433 #define IMX8QM_LVDS0_I2C1_SCL_DMA_UART2_TX 433 #define IMX8QM_LVDS0_I2C1_SCL_DMA_UART2_TX IMX8QM_LVDS0_I2C1_SCL 1 434 #define IMX8QM_LVDS0_I2C1_SCL_LSIO_GPIO1_IO08 434 #define IMX8QM_LVDS0_I2C1_SCL_LSIO_GPIO1_IO08 IMX8QM_LVDS0_I2C1_SCL 3 435 #define IMX8QM_LVDS0_I2C1_SDA_LVDS0_I2C1_SDA 435 #define IMX8QM_LVDS0_I2C1_SDA_LVDS0_I2C1_SDA IMX8QM_LVDS0_I2C1_SDA 0 436 #define IMX8QM_LVDS0_I2C1_SDA_DMA_UART2_RX 436 #define IMX8QM_LVDS0_I2C1_SDA_DMA_UART2_RX IMX8QM_LVDS0_I2C1_SDA 1 437 #define IMX8QM_LVDS0_I2C1_SDA_LSIO_GPIO1_IO09 437 #define IMX8QM_LVDS0_I2C1_SDA_LSIO_GPIO1_IO09 IMX8QM_LVDS0_I2C1_SDA 3 438 #define IMX8QM_LVDS1_GPIO00_LVDS1_GPIO0_IO00 438 #define IMX8QM_LVDS1_GPIO00_LVDS1_GPIO0_IO00 IMX8QM_LVDS1_GPIO00 0 439 #define IMX8QM_LVDS1_GPIO00_LVDS1_PWM0_OUT 439 #define IMX8QM_LVDS1_GPIO00_LVDS1_PWM0_OUT IMX8QM_LVDS1_GPIO00 1 440 #define IMX8QM_LVDS1_GPIO00_LSIO_GPIO1_IO10 440 #define IMX8QM_LVDS1_GPIO00_LSIO_GPIO1_IO10 IMX8QM_LVDS1_GPIO00 3 441 #define IMX8QM_LVDS1_GPIO01_LVDS1_GPIO0_IO01 441 #define IMX8QM_LVDS1_GPIO01_LVDS1_GPIO0_IO01 IMX8QM_LVDS1_GPIO01 0 442 #define IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 442 #define IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 IMX8QM_LVDS1_GPIO01 3 443 #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_I2C0_SCL 443 #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_I2C0_SCL IMX8QM_LVDS1_I2C0_SCL 0 444 #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_GPIO0_IO02 444 #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_GPIO0_IO02 IMX8QM_LVDS1_I2C0_SCL 1 445 #define IMX8QM_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12 445 #define IMX8QM_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12 IMX8QM_LVDS1_I2C0_SCL 3 446 #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_I2C0_SDA 446 #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_I2C0_SDA IMX8QM_LVDS1_I2C0_SDA 0 447 #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_GPIO0_IO03 447 #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_GPIO0_IO03 IMX8QM_LVDS1_I2C0_SDA 1 448 #define IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13 448 #define IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13 IMX8QM_LVDS1_I2C0_SDA 3 449 #define IMX8QM_LVDS1_I2C1_SCL_LVDS1_I2C1_SCL 449 #define IMX8QM_LVDS1_I2C1_SCL_LVDS1_I2C1_SCL IMX8QM_LVDS1_I2C1_SCL 0 450 #define IMX8QM_LVDS1_I2C1_SCL_DMA_UART3_TX 450 #define IMX8QM_LVDS1_I2C1_SCL_DMA_UART3_TX IMX8QM_LVDS1_I2C1_SCL 1 451 #define IMX8QM_LVDS1_I2C1_SCL_LSIO_GPIO1_IO14 451 #define IMX8QM_LVDS1_I2C1_SCL_LSIO_GPIO1_IO14 IMX8QM_LVDS1_I2C1_SCL 3 452 #define IMX8QM_LVDS1_I2C1_SDA_LVDS1_I2C1_SDA 452 #define IMX8QM_LVDS1_I2C1_SDA_LVDS1_I2C1_SDA IMX8QM_LVDS1_I2C1_SDA 0 453 #define IMX8QM_LVDS1_I2C1_SDA_DMA_UART3_RX 453 #define IMX8QM_LVDS1_I2C1_SDA_DMA_UART3_RX IMX8QM_LVDS1_I2C1_SDA 1 454 #define IMX8QM_LVDS1_I2C1_SDA_LSIO_GPIO1_IO15 454 #define IMX8QM_LVDS1_I2C1_SDA_LSIO_GPIO1_IO15 IMX8QM_LVDS1_I2C1_SDA 3 455 #define IMX8QM_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2 455 #define IMX8QM_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL IMX8QM_MIPI_DSI0_I2C0_SCL 0 456 #define IMX8QM_MIPI_DSI0_I2C0_SCL_LSIO_GPIO1_I 456 #define IMX8QM_MIPI_DSI0_I2C0_SCL_LSIO_GPIO1_IO16 IMX8QM_MIPI_DSI0_I2C0_SCL 3 457 #define IMX8QM_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2 457 #define IMX8QM_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA IMX8QM_MIPI_DSI0_I2C0_SDA 0 458 #define IMX8QM_MIPI_DSI0_I2C0_SDA_LSIO_GPIO1_I 458 #define IMX8QM_MIPI_DSI0_I2C0_SDA_LSIO_GPIO1_IO17 IMX8QM_MIPI_DSI0_I2C0_SDA 3 459 #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GP 459 #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00 IMX8QM_MIPI_DSI0_GPIO0_00 0 460 #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PW 460 #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PWM0_OUT IMX8QM_MIPI_DSI0_GPIO0_00 1 461 #define IMX8QM_MIPI_DSI0_GPIO0_00_LSIO_GPIO1_I 461 #define IMX8QM_MIPI_DSI0_GPIO0_00_LSIO_GPIO1_IO18 IMX8QM_MIPI_DSI0_GPIO0_00 3 462 #define IMX8QM_MIPI_DSI0_GPIO0_01_MIPI_DSI0_GP 462 #define IMX8QM_MIPI_DSI0_GPIO0_01_MIPI_DSI0_GPIO0_IO01 IMX8QM_MIPI_DSI0_GPIO0_01 0 463 #define IMX8QM_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_I 463 #define IMX8QM_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO19 IMX8QM_MIPI_DSI0_GPIO0_01 3 464 #define IMX8QM_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2 464 #define IMX8QM_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL IMX8QM_MIPI_DSI1_I2C0_SCL 0 465 #define IMX8QM_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_I 465 #define IMX8QM_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20 IMX8QM_MIPI_DSI1_I2C0_SCL 3 466 #define IMX8QM_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2 466 #define IMX8QM_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA IMX8QM_MIPI_DSI1_I2C0_SDA 0 467 #define IMX8QM_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_I 467 #define IMX8QM_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21 IMX8QM_MIPI_DSI1_I2C0_SDA 3 468 #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GP 468 #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00 IMX8QM_MIPI_DSI1_GPIO0_00 0 469 #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PW 469 #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PWM0_OUT IMX8QM_MIPI_DSI1_GPIO0_00 1 470 #define IMX8QM_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_I 470 #define IMX8QM_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22 IMX8QM_MIPI_DSI1_GPIO0_00 3 471 #define IMX8QM_MIPI_DSI1_GPIO0_01_MIPI_DSI1_GP 471 #define IMX8QM_MIPI_DSI1_GPIO0_01_MIPI_DSI1_GPIO0_IO01 IMX8QM_MIPI_DSI1_GPIO0_01 0 472 #define IMX8QM_MIPI_DSI1_GPIO0_01_LSIO_GPIO1_I 472 #define IMX8QM_MIPI_DSI1_GPIO0_01_LSIO_GPIO1_IO23 IMX8QM_MIPI_DSI1_GPIO0_01 3 473 #define IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_AC 473 #define IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT IMX8QM_MIPI_CSI0_MCLK_OUT 0 474 #define IMX8QM_MIPI_CSI0_MCLK_OUT_LSIO_GPIO1_I 474 #define IMX8QM_MIPI_CSI0_MCLK_OUT_LSIO_GPIO1_IO24 IMX8QM_MIPI_CSI0_MCLK_OUT 3 475 #define IMX8QM_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2 475 #define IMX8QM_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL IMX8QM_MIPI_CSI0_I2C0_SCL 0 476 #define IMX8QM_MIPI_CSI0_I2C0_SCL_LSIO_GPIO1_I 476 #define IMX8QM_MIPI_CSI0_I2C0_SCL_LSIO_GPIO1_IO25 IMX8QM_MIPI_CSI0_I2C0_SCL 3 477 #define IMX8QM_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2 477 #define IMX8QM_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA IMX8QM_MIPI_CSI0_I2C0_SDA 0 478 #define IMX8QM_MIPI_CSI0_I2C0_SDA_LSIO_GPIO1_I 478 #define IMX8QM_MIPI_CSI0_I2C0_SDA_LSIO_GPIO1_IO26 IMX8QM_MIPI_CSI0_I2C0_SDA 3 479 #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI0_GP 479 #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI0_GPIO0_IO00 IMX8QM_MIPI_CSI0_GPIO0_00 0 480 #define IMX8QM_MIPI_CSI0_GPIO0_00_DMA_I2C0_SCL 480 #define IMX8QM_MIPI_CSI0_GPIO0_00_DMA_I2C0_SCL IMX8QM_MIPI_CSI0_GPIO0_00 1 481 #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI1_I2 481 #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI1_I2C0_SCL IMX8QM_MIPI_CSI0_GPIO0_00 2 482 #define IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_I 482 #define IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27 IMX8QM_MIPI_CSI0_GPIO0_00 3 483 #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI0_GP 483 #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI0_GPIO0_IO01 IMX8QM_MIPI_CSI0_GPIO0_01 0 484 #define IMX8QM_MIPI_CSI0_GPIO0_01_DMA_I2C0_SDA 484 #define IMX8QM_MIPI_CSI0_GPIO0_01_DMA_I2C0_SDA IMX8QM_MIPI_CSI0_GPIO0_01 1 485 #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI1_I2 485 #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI1_I2C0_SDA IMX8QM_MIPI_CSI0_GPIO0_01 2 486 #define IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_I 486 #define IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 IMX8QM_MIPI_CSI0_GPIO0_01 3 487 #define IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_AC 487 #define IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT IMX8QM_MIPI_CSI1_MCLK_OUT 0 488 #define IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_I 488 #define IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29 IMX8QM_MIPI_CSI1_MCLK_OUT 3 489 #define IMX8QM_MIPI_CSI1_GPIO0_00_MIPI_CSI1_GP 489 #define IMX8QM_MIPI_CSI1_GPIO0_00_MIPI_CSI1_GPIO0_IO00 IMX8QM_MIPI_CSI1_GPIO0_00 0 490 #define IMX8QM_MIPI_CSI1_GPIO0_00_DMA_UART4_RX 490 #define IMX8QM_MIPI_CSI1_GPIO0_00_DMA_UART4_RX IMX8QM_MIPI_CSI1_GPIO0_00 1 491 #define IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_I 491 #define IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 IMX8QM_MIPI_CSI1_GPIO0_00 3 492 #define IMX8QM_MIPI_CSI1_GPIO0_01_MIPI_CSI1_GP 492 #define IMX8QM_MIPI_CSI1_GPIO0_01_MIPI_CSI1_GPIO0_IO01 IMX8QM_MIPI_CSI1_GPIO0_01 0 493 #define IMX8QM_MIPI_CSI1_GPIO0_01_DMA_UART4_TX 493 #define IMX8QM_MIPI_CSI1_GPIO0_01_DMA_UART4_TX IMX8QM_MIPI_CSI1_GPIO0_01 1 494 #define IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_I 494 #define IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 IMX8QM_MIPI_CSI1_GPIO0_01 3 495 #define IMX8QM_MIPI_CSI1_I2C0_SCL_MIPI_CSI1_I2 495 #define IMX8QM_MIPI_CSI1_I2C0_SCL_MIPI_CSI1_I2C0_SCL IMX8QM_MIPI_CSI1_I2C0_SCL 0 496 #define IMX8QM_MIPI_CSI1_I2C0_SCL_LSIO_GPIO2_I 496 #define IMX8QM_MIPI_CSI1_I2C0_SCL_LSIO_GPIO2_IO00 IMX8QM_MIPI_CSI1_I2C0_SCL 3 497 #define IMX8QM_MIPI_CSI1_I2C0_SDA_MIPI_CSI1_I2 497 #define IMX8QM_MIPI_CSI1_I2C0_SDA_MIPI_CSI1_I2C0_SDA IMX8QM_MIPI_CSI1_I2C0_SDA 0 498 #define IMX8QM_MIPI_CSI1_I2C0_SDA_LSIO_GPIO2_I 498 #define IMX8QM_MIPI_CSI1_I2C0_SDA_LSIO_GPIO2_IO01 IMX8QM_MIPI_CSI1_I2C0_SDA 3 499 #define IMX8QM_HDMI_TX0_TS_SCL_HDMI_TX0_I2C0_S 499 #define IMX8QM_HDMI_TX0_TS_SCL_HDMI_TX0_I2C0_SCL IMX8QM_HDMI_TX0_TS_SCL 0 500 #define IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 500 #define IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL IMX8QM_HDMI_TX0_TS_SCL 1 501 #define IMX8QM_HDMI_TX0_TS_SCL_LSIO_GPIO2_IO02 501 #define IMX8QM_HDMI_TX0_TS_SCL_LSIO_GPIO2_IO02 IMX8QM_HDMI_TX0_TS_SCL 3 502 #define IMX8QM_HDMI_TX0_TS_SDA_HDMI_TX0_I2C0_S 502 #define IMX8QM_HDMI_TX0_TS_SDA_HDMI_TX0_I2C0_SDA IMX8QM_HDMI_TX0_TS_SDA 0 503 #define IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 503 #define IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA IMX8QM_HDMI_TX0_TS_SDA 1 504 #define IMX8QM_HDMI_TX0_TS_SDA_LSIO_GPIO2_IO03 504 #define IMX8QM_HDMI_TX0_TS_SDA_LSIO_GPIO2_IO03 IMX8QM_HDMI_TX0_TS_SDA 3 505 #define IMX8QM_ESAI1_FSR_AUD_ESAI1_FSR 505 #define IMX8QM_ESAI1_FSR_AUD_ESAI1_FSR IMX8QM_ESAI1_FSR 0 506 #define IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04 506 #define IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04 IMX8QM_ESAI1_FSR 3 507 #define IMX8QM_ESAI1_FST_AUD_ESAI1_FST 507 #define IMX8QM_ESAI1_FST_AUD_ESAI1_FST IMX8QM_ESAI1_FST 0 508 #define IMX8QM_ESAI1_FST_AUD_SPDIF0_EXT_CLK 508 #define IMX8QM_ESAI1_FST_AUD_SPDIF0_EXT_CLK IMX8QM_ESAI1_FST 1 509 #define IMX8QM_ESAI1_FST_LSIO_GPIO2_IO05 509 #define IMX8QM_ESAI1_FST_LSIO_GPIO2_IO05 IMX8QM_ESAI1_FST 3 510 #define IMX8QM_ESAI1_SCKR_AUD_ESAI1_SCKR 510 #define IMX8QM_ESAI1_SCKR_AUD_ESAI1_SCKR IMX8QM_ESAI1_SCKR 0 511 #define IMX8QM_ESAI1_SCKR_LSIO_GPIO2_IO06 511 #define IMX8QM_ESAI1_SCKR_LSIO_GPIO2_IO06 IMX8QM_ESAI1_SCKR 3 512 #define IMX8QM_ESAI1_SCKT_AUD_ESAI1_SCKT 512 #define IMX8QM_ESAI1_SCKT_AUD_ESAI1_SCKT IMX8QM_ESAI1_SCKT 0 513 #define IMX8QM_ESAI1_SCKT_AUD_SAI2_RXC 513 #define IMX8QM_ESAI1_SCKT_AUD_SAI2_RXC IMX8QM_ESAI1_SCKT 1 514 #define IMX8QM_ESAI1_SCKT_AUD_SPDIF0_EXT_CLK 514 #define IMX8QM_ESAI1_SCKT_AUD_SPDIF0_EXT_CLK IMX8QM_ESAI1_SCKT 2 515 #define IMX8QM_ESAI1_SCKT_LSIO_GPIO2_IO07 515 #define IMX8QM_ESAI1_SCKT_LSIO_GPIO2_IO07 IMX8QM_ESAI1_SCKT 3 516 #define IMX8QM_ESAI1_TX0_AUD_ESAI1_TX0 516 #define IMX8QM_ESAI1_TX0_AUD_ESAI1_TX0 IMX8QM_ESAI1_TX0 0 517 #define IMX8QM_ESAI1_TX0_AUD_SAI2_RXD 517 #define IMX8QM_ESAI1_TX0_AUD_SAI2_RXD IMX8QM_ESAI1_TX0 1 518 #define IMX8QM_ESAI1_TX0_AUD_SPDIF0_RX 518 #define IMX8QM_ESAI1_TX0_AUD_SPDIF0_RX IMX8QM_ESAI1_TX0 2 519 #define IMX8QM_ESAI1_TX0_LSIO_GPIO2_IO08 519 #define IMX8QM_ESAI1_TX0_LSIO_GPIO2_IO08 IMX8QM_ESAI1_TX0 3 520 #define IMX8QM_ESAI1_TX1_AUD_ESAI1_TX1 520 #define IMX8QM_ESAI1_TX1_AUD_ESAI1_TX1 IMX8QM_ESAI1_TX1 0 521 #define IMX8QM_ESAI1_TX1_AUD_SAI2_RXFS 521 #define IMX8QM_ESAI1_TX1_AUD_SAI2_RXFS IMX8QM_ESAI1_TX1 1 522 #define IMX8QM_ESAI1_TX1_AUD_SPDIF0_TX 522 #define IMX8QM_ESAI1_TX1_AUD_SPDIF0_TX IMX8QM_ESAI1_TX1 2 523 #define IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 523 #define IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 IMX8QM_ESAI1_TX1 3 524 #define IMX8QM_ESAI1_TX2_RX3_AUD_ESAI1_TX2_RX3 524 #define IMX8QM_ESAI1_TX2_RX3_AUD_ESAI1_TX2_RX3 IMX8QM_ESAI1_TX2_RX3 0 525 #define IMX8QM_ESAI1_TX2_RX3_AUD_SPDIF0_RX 525 #define IMX8QM_ESAI1_TX2_RX3_AUD_SPDIF0_RX IMX8QM_ESAI1_TX2_RX3 1 526 #define IMX8QM_ESAI1_TX2_RX3_LSIO_GPIO2_IO10 526 #define IMX8QM_ESAI1_TX2_RX3_LSIO_GPIO2_IO10 IMX8QM_ESAI1_TX2_RX3 3 527 #define IMX8QM_ESAI1_TX3_RX2_AUD_ESAI1_TX3_RX2 527 #define IMX8QM_ESAI1_TX3_RX2_AUD_ESAI1_TX3_RX2 IMX8QM_ESAI1_TX3_RX2 0 528 #define IMX8QM_ESAI1_TX3_RX2_AUD_SPDIF0_TX 528 #define IMX8QM_ESAI1_TX3_RX2_AUD_SPDIF0_TX IMX8QM_ESAI1_TX3_RX2 1 529 #define IMX8QM_ESAI1_TX3_RX2_LSIO_GPIO2_IO11 529 #define IMX8QM_ESAI1_TX3_RX2_LSIO_GPIO2_IO11 IMX8QM_ESAI1_TX3_RX2 3 530 #define IMX8QM_ESAI1_TX4_RX1_AUD_ESAI1_TX4_RX1 530 #define IMX8QM_ESAI1_TX4_RX1_AUD_ESAI1_TX4_RX1 IMX8QM_ESAI1_TX4_RX1 0 531 #define IMX8QM_ESAI1_TX4_RX1_LSIO_GPIO2_IO12 531 #define IMX8QM_ESAI1_TX4_RX1_LSIO_GPIO2_IO12 IMX8QM_ESAI1_TX4_RX1 3 532 #define IMX8QM_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0 532 #define IMX8QM_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0 IMX8QM_ESAI1_TX5_RX0 0 533 #define IMX8QM_ESAI1_TX5_RX0_LSIO_GPIO2_IO13 533 #define IMX8QM_ESAI1_TX5_RX0_LSIO_GPIO2_IO13 IMX8QM_ESAI1_TX5_RX0 3 534 #define IMX8QM_SPDIF0_RX_AUD_SPDIF0_RX 534 #define IMX8QM_SPDIF0_RX_AUD_SPDIF0_RX IMX8QM_SPDIF0_RX 0 535 #define IMX8QM_SPDIF0_RX_AUD_MQS_R 535 #define IMX8QM_SPDIF0_RX_AUD_MQS_R IMX8QM_SPDIF0_RX 1 536 #define IMX8QM_SPDIF0_RX_AUD_ACM_MCLK_IN1 536 #define IMX8QM_SPDIF0_RX_AUD_ACM_MCLK_IN1 IMX8QM_SPDIF0_RX 2 537 #define IMX8QM_SPDIF0_RX_LSIO_GPIO2_IO14 537 #define IMX8QM_SPDIF0_RX_LSIO_GPIO2_IO14 IMX8QM_SPDIF0_RX 3 538 #define IMX8QM_SPDIF0_TX_AUD_SPDIF0_TX 538 #define IMX8QM_SPDIF0_TX_AUD_SPDIF0_TX IMX8QM_SPDIF0_TX 0 539 #define IMX8QM_SPDIF0_TX_AUD_MQS_L 539 #define IMX8QM_SPDIF0_TX_AUD_MQS_L IMX8QM_SPDIF0_TX 1 540 #define IMX8QM_SPDIF0_TX_AUD_ACM_MCLK_OUT1 540 #define IMX8QM_SPDIF0_TX_AUD_ACM_MCLK_OUT1 IMX8QM_SPDIF0_TX 2 541 #define IMX8QM_SPDIF0_TX_LSIO_GPIO2_IO15 541 #define IMX8QM_SPDIF0_TX_LSIO_GPIO2_IO15 IMX8QM_SPDIF0_TX 3 542 #define IMX8QM_SPDIF0_EXT_CLK_AUD_SPDIF0_EXT_C 542 #define IMX8QM_SPDIF0_EXT_CLK_AUD_SPDIF0_EXT_CLK IMX8QM_SPDIF0_EXT_CLK 0 543 #define IMX8QM_SPDIF0_EXT_CLK_DMA_DMA0_REQ_IN0 543 #define IMX8QM_SPDIF0_EXT_CLK_DMA_DMA0_REQ_IN0 IMX8QM_SPDIF0_EXT_CLK 1 544 #define IMX8QM_SPDIF0_EXT_CLK_LSIO_GPIO2_IO16 544 #define IMX8QM_SPDIF0_EXT_CLK_LSIO_GPIO2_IO16 IMX8QM_SPDIF0_EXT_CLK 3 545 #define IMX8QM_SPI3_SCK_DMA_SPI3_SCK 545 #define IMX8QM_SPI3_SCK_DMA_SPI3_SCK IMX8QM_SPI3_SCK 0 546 #define IMX8QM_SPI3_SCK_LSIO_GPIO2_IO17 546 #define IMX8QM_SPI3_SCK_LSIO_GPIO2_IO17 IMX8QM_SPI3_SCK 3 547 #define IMX8QM_SPI3_SDO_DMA_SPI3_SDO 547 #define IMX8QM_SPI3_SDO_DMA_SPI3_SDO IMX8QM_SPI3_SDO 0 548 #define IMX8QM_SPI3_SDO_DMA_FTM_CH0 548 #define IMX8QM_SPI3_SDO_DMA_FTM_CH0 IMX8QM_SPI3_SDO 1 549 #define IMX8QM_SPI3_SDO_LSIO_GPIO2_IO18 549 #define IMX8QM_SPI3_SDO_LSIO_GPIO2_IO18 IMX8QM_SPI3_SDO 3 550 #define IMX8QM_SPI3_SDI_DMA_SPI3_SDI 550 #define IMX8QM_SPI3_SDI_DMA_SPI3_SDI IMX8QM_SPI3_SDI 0 551 #define IMX8QM_SPI3_SDI_DMA_FTM_CH1 551 #define IMX8QM_SPI3_SDI_DMA_FTM_CH1 IMX8QM_SPI3_SDI 1 552 #define IMX8QM_SPI3_SDI_LSIO_GPIO2_IO19 552 #define IMX8QM_SPI3_SDI_LSIO_GPIO2_IO19 IMX8QM_SPI3_SDI 3 553 #define IMX8QM_SPI3_CS0_DMA_SPI3_CS0 553 #define IMX8QM_SPI3_CS0_DMA_SPI3_CS0 IMX8QM_SPI3_CS0 0 554 #define IMX8QM_SPI3_CS0_DMA_FTM_CH2 554 #define IMX8QM_SPI3_CS0_DMA_FTM_CH2 IMX8QM_SPI3_CS0 1 555 #define IMX8QM_SPI3_CS0_LSIO_GPIO2_IO20 555 #define IMX8QM_SPI3_CS0_LSIO_GPIO2_IO20 IMX8QM_SPI3_CS0 3 556 #define IMX8QM_SPI3_CS1_DMA_SPI3_CS1 556 #define IMX8QM_SPI3_CS1_DMA_SPI3_CS1 IMX8QM_SPI3_CS1 0 557 #define IMX8QM_SPI3_CS1_LSIO_GPIO2_IO21 557 #define IMX8QM_SPI3_CS1_LSIO_GPIO2_IO21 IMX8QM_SPI3_CS1 3 558 #define IMX8QM_ESAI0_FSR_AUD_ESAI0_FSR 558 #define IMX8QM_ESAI0_FSR_AUD_ESAI0_FSR IMX8QM_ESAI0_FSR 0 559 #define IMX8QM_ESAI0_FSR_LSIO_GPIO2_IO22 559 #define IMX8QM_ESAI0_FSR_LSIO_GPIO2_IO22 IMX8QM_ESAI0_FSR 3 560 #define IMX8QM_ESAI0_FST_AUD_ESAI0_FST 560 #define IMX8QM_ESAI0_FST_AUD_ESAI0_FST IMX8QM_ESAI0_FST 0 561 #define IMX8QM_ESAI0_FST_LSIO_GPIO2_IO23 561 #define IMX8QM_ESAI0_FST_LSIO_GPIO2_IO23 IMX8QM_ESAI0_FST 3 562 #define IMX8QM_ESAI0_SCKR_AUD_ESAI0_SCKR 562 #define IMX8QM_ESAI0_SCKR_AUD_ESAI0_SCKR IMX8QM_ESAI0_SCKR 0 563 #define IMX8QM_ESAI0_SCKR_LSIO_GPIO2_IO24 563 #define IMX8QM_ESAI0_SCKR_LSIO_GPIO2_IO24 IMX8QM_ESAI0_SCKR 3 564 #define IMX8QM_ESAI0_SCKT_AUD_ESAI0_SCKT 564 #define IMX8QM_ESAI0_SCKT_AUD_ESAI0_SCKT IMX8QM_ESAI0_SCKT 0 565 #define IMX8QM_ESAI0_SCKT_LSIO_GPIO2_IO25 565 #define IMX8QM_ESAI0_SCKT_LSIO_GPIO2_IO25 IMX8QM_ESAI0_SCKT 3 566 #define IMX8QM_ESAI0_TX0_AUD_ESAI0_TX0 566 #define IMX8QM_ESAI0_TX0_AUD_ESAI0_TX0 IMX8QM_ESAI0_TX0 0 567 #define IMX8QM_ESAI0_TX0_LSIO_GPIO2_IO26 567 #define IMX8QM_ESAI0_TX0_LSIO_GPIO2_IO26 IMX8QM_ESAI0_TX0 3 568 #define IMX8QM_ESAI0_TX1_AUD_ESAI0_TX1 568 #define IMX8QM_ESAI0_TX1_AUD_ESAI0_TX1 IMX8QM_ESAI0_TX1 0 569 #define IMX8QM_ESAI0_TX1_LSIO_GPIO2_IO27 569 #define IMX8QM_ESAI0_TX1_LSIO_GPIO2_IO27 IMX8QM_ESAI0_TX1 3 570 #define IMX8QM_ESAI0_TX2_RX3_AUD_ESAI0_TX2_RX3 570 #define IMX8QM_ESAI0_TX2_RX3_AUD_ESAI0_TX2_RX3 IMX8QM_ESAI0_TX2_RX3 0 571 #define IMX8QM_ESAI0_TX2_RX3_LSIO_GPIO2_IO28 571 #define IMX8QM_ESAI0_TX2_RX3_LSIO_GPIO2_IO28 IMX8QM_ESAI0_TX2_RX3 3 572 #define IMX8QM_ESAI0_TX3_RX2_AUD_ESAI0_TX3_RX2 572 #define IMX8QM_ESAI0_TX3_RX2_AUD_ESAI0_TX3_RX2 IMX8QM_ESAI0_TX3_RX2 0 573 #define IMX8QM_ESAI0_TX3_RX2_LSIO_GPIO2_IO29 573 #define IMX8QM_ESAI0_TX3_RX2_LSIO_GPIO2_IO29 IMX8QM_ESAI0_TX3_RX2 3 574 #define IMX8QM_ESAI0_TX4_RX1_AUD_ESAI0_TX4_RX1 574 #define IMX8QM_ESAI0_TX4_RX1_AUD_ESAI0_TX4_RX1 IMX8QM_ESAI0_TX4_RX1 0 575 #define IMX8QM_ESAI0_TX4_RX1_LSIO_GPIO2_IO30 575 #define IMX8QM_ESAI0_TX4_RX1_LSIO_GPIO2_IO30 IMX8QM_ESAI0_TX4_RX1 3 576 #define IMX8QM_ESAI0_TX5_RX0_AUD_ESAI0_TX5_RX0 576 #define IMX8QM_ESAI0_TX5_RX0_AUD_ESAI0_TX5_RX0 IMX8QM_ESAI0_TX5_RX0 0 577 #define IMX8QM_ESAI0_TX5_RX0_LSIO_GPIO2_IO31 577 #define IMX8QM_ESAI0_TX5_RX0_LSIO_GPIO2_IO31 IMX8QM_ESAI0_TX5_RX0 3 578 #define IMX8QM_MCLK_IN0_AUD_ACM_MCLK_IN0 578 #define IMX8QM_MCLK_IN0_AUD_ACM_MCLK_IN0 IMX8QM_MCLK_IN0 0 579 #define IMX8QM_MCLK_IN0_AUD_ESAI0_RX_HF_CLK 579 #define IMX8QM_MCLK_IN0_AUD_ESAI0_RX_HF_CLK IMX8QM_MCLK_IN0 1 580 #define IMX8QM_MCLK_IN0_AUD_ESAI1_RX_HF_CLK 580 #define IMX8QM_MCLK_IN0_AUD_ESAI1_RX_HF_CLK IMX8QM_MCLK_IN0 2 581 #define IMX8QM_MCLK_IN0_LSIO_GPIO3_IO00 581 #define IMX8QM_MCLK_IN0_LSIO_GPIO3_IO00 IMX8QM_MCLK_IN0 3 582 #define IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0 582 #define IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0 IMX8QM_MCLK_OUT0 0 583 #define IMX8QM_MCLK_OUT0_AUD_ESAI0_TX_HF_CLK 583 #define IMX8QM_MCLK_OUT0_AUD_ESAI0_TX_HF_CLK IMX8QM_MCLK_OUT0 1 584 #define IMX8QM_MCLK_OUT0_AUD_ESAI1_TX_HF_CLK 584 #define IMX8QM_MCLK_OUT0_AUD_ESAI1_TX_HF_CLK IMX8QM_MCLK_OUT0 2 585 #define IMX8QM_MCLK_OUT0_LSIO_GPIO3_IO01 585 #define IMX8QM_MCLK_OUT0_LSIO_GPIO3_IO01 IMX8QM_MCLK_OUT0 3 586 #define IMX8QM_SPI0_SCK_DMA_SPI0_SCK 586 #define IMX8QM_SPI0_SCK_DMA_SPI0_SCK IMX8QM_SPI0_SCK 0 587 #define IMX8QM_SPI0_SCK_AUD_SAI0_RXC 587 #define IMX8QM_SPI0_SCK_AUD_SAI0_RXC IMX8QM_SPI0_SCK 1 588 #define IMX8QM_SPI0_SCK_LSIO_GPIO3_IO02 588 #define IMX8QM_SPI0_SCK_LSIO_GPIO3_IO02 IMX8QM_SPI0_SCK 3 589 #define IMX8QM_SPI0_SDO_DMA_SPI0_SDO 589 #define IMX8QM_SPI0_SDO_DMA_SPI0_SDO IMX8QM_SPI0_SDO 0 590 #define IMX8QM_SPI0_SDO_AUD_SAI0_TXD 590 #define IMX8QM_SPI0_SDO_AUD_SAI0_TXD IMX8QM_SPI0_SDO 1 591 #define IMX8QM_SPI0_SDO_LSIO_GPIO3_IO03 591 #define IMX8QM_SPI0_SDO_LSIO_GPIO3_IO03 IMX8QM_SPI0_SDO 3 592 #define IMX8QM_SPI0_SDI_DMA_SPI0_SDI 592 #define IMX8QM_SPI0_SDI_DMA_SPI0_SDI IMX8QM_SPI0_SDI 0 593 #define IMX8QM_SPI0_SDI_AUD_SAI0_RXD 593 #define IMX8QM_SPI0_SDI_AUD_SAI0_RXD IMX8QM_SPI0_SDI 1 594 #define IMX8QM_SPI0_SDI_LSIO_GPIO3_IO04 594 #define IMX8QM_SPI0_SDI_LSIO_GPIO3_IO04 IMX8QM_SPI0_SDI 3 595 #define IMX8QM_SPI0_CS0_DMA_SPI0_CS0 595 #define IMX8QM_SPI0_CS0_DMA_SPI0_CS0 IMX8QM_SPI0_CS0 0 596 #define IMX8QM_SPI0_CS0_AUD_SAI0_RXFS 596 #define IMX8QM_SPI0_CS0_AUD_SAI0_RXFS IMX8QM_SPI0_CS0 1 597 #define IMX8QM_SPI0_CS0_LSIO_GPIO3_IO05 597 #define IMX8QM_SPI0_CS0_LSIO_GPIO3_IO05 IMX8QM_SPI0_CS0 3 598 #define IMX8QM_SPI0_CS1_DMA_SPI0_CS1 598 #define IMX8QM_SPI0_CS1_DMA_SPI0_CS1 IMX8QM_SPI0_CS1 0 599 #define IMX8QM_SPI0_CS1_AUD_SAI0_TXC 599 #define IMX8QM_SPI0_CS1_AUD_SAI0_TXC IMX8QM_SPI0_CS1 1 600 #define IMX8QM_SPI0_CS1_LSIO_GPIO3_IO06 600 #define IMX8QM_SPI0_CS1_LSIO_GPIO3_IO06 IMX8QM_SPI0_CS1 3 601 #define IMX8QM_SPI2_SCK_DMA_SPI2_SCK 601 #define IMX8QM_SPI2_SCK_DMA_SPI2_SCK IMX8QM_SPI2_SCK 0 602 #define IMX8QM_SPI2_SCK_LSIO_GPIO3_IO07 602 #define IMX8QM_SPI2_SCK_LSIO_GPIO3_IO07 IMX8QM_SPI2_SCK 3 603 #define IMX8QM_SPI2_SDO_DMA_SPI2_SDO 603 #define IMX8QM_SPI2_SDO_DMA_SPI2_SDO IMX8QM_SPI2_SDO 0 604 #define IMX8QM_SPI2_SDO_LSIO_GPIO3_IO08 604 #define IMX8QM_SPI2_SDO_LSIO_GPIO3_IO08 IMX8QM_SPI2_SDO 3 605 #define IMX8QM_SPI2_SDI_DMA_SPI2_SDI 605 #define IMX8QM_SPI2_SDI_DMA_SPI2_SDI IMX8QM_SPI2_SDI 0 606 #define IMX8QM_SPI2_SDI_LSIO_GPIO3_IO09 606 #define IMX8QM_SPI2_SDI_LSIO_GPIO3_IO09 IMX8QM_SPI2_SDI 3 607 #define IMX8QM_SPI2_CS0_DMA_SPI2_CS0 607 #define IMX8QM_SPI2_CS0_DMA_SPI2_CS0 IMX8QM_SPI2_CS0 0 608 #define IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 608 #define IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 IMX8QM_SPI2_CS0 3 609 #define IMX8QM_SPI2_CS1_DMA_SPI2_CS1 609 #define IMX8QM_SPI2_CS1_DMA_SPI2_CS1 IMX8QM_SPI2_CS1 0 610 #define IMX8QM_SPI2_CS1_AUD_SAI0_TXFS 610 #define IMX8QM_SPI2_CS1_AUD_SAI0_TXFS IMX8QM_SPI2_CS1 1 611 #define IMX8QM_SPI2_CS1_LSIO_GPIO3_IO11 611 #define IMX8QM_SPI2_CS1_LSIO_GPIO3_IO11 IMX8QM_SPI2_CS1 3 612 #define IMX8QM_SAI1_RXC_AUD_SAI1_RXC 612 #define IMX8QM_SAI1_RXC_AUD_SAI1_RXC IMX8QM_SAI1_RXC 0 613 #define IMX8QM_SAI1_RXC_AUD_SAI0_TXD 613 #define IMX8QM_SAI1_RXC_AUD_SAI0_TXD IMX8QM_SAI1_RXC 1 614 #define IMX8QM_SAI1_RXC_LSIO_GPIO3_IO12 614 #define IMX8QM_SAI1_RXC_LSIO_GPIO3_IO12 IMX8QM_SAI1_RXC 3 615 #define IMX8QM_SAI1_RXD_AUD_SAI1_RXD 615 #define IMX8QM_SAI1_RXD_AUD_SAI1_RXD IMX8QM_SAI1_RXD 0 616 #define IMX8QM_SAI1_RXD_AUD_SAI0_TXFS 616 #define IMX8QM_SAI1_RXD_AUD_SAI0_TXFS IMX8QM_SAI1_RXD 1 617 #define IMX8QM_SAI1_RXD_LSIO_GPIO3_IO13 617 #define IMX8QM_SAI1_RXD_LSIO_GPIO3_IO13 IMX8QM_SAI1_RXD 3 618 #define IMX8QM_SAI1_RXFS_AUD_SAI1_RXFS 618 #define IMX8QM_SAI1_RXFS_AUD_SAI1_RXFS IMX8QM_SAI1_RXFS 0 619 #define IMX8QM_SAI1_RXFS_AUD_SAI0_RXD 619 #define IMX8QM_SAI1_RXFS_AUD_SAI0_RXD IMX8QM_SAI1_RXFS 1 620 #define IMX8QM_SAI1_RXFS_LSIO_GPIO3_IO14 620 #define IMX8QM_SAI1_RXFS_LSIO_GPIO3_IO14 IMX8QM_SAI1_RXFS 3 621 #define IMX8QM_SAI1_TXC_AUD_SAI1_TXC 621 #define IMX8QM_SAI1_TXC_AUD_SAI1_TXC IMX8QM_SAI1_TXC 0 622 #define IMX8QM_SAI1_TXC_AUD_SAI0_TXC 622 #define IMX8QM_SAI1_TXC_AUD_SAI0_TXC IMX8QM_SAI1_TXC 1 623 #define IMX8QM_SAI1_TXC_LSIO_GPIO3_IO15 623 #define IMX8QM_SAI1_TXC_LSIO_GPIO3_IO15 IMX8QM_SAI1_TXC 3 624 #define IMX8QM_SAI1_TXD_AUD_SAI1_TXD 624 #define IMX8QM_SAI1_TXD_AUD_SAI1_TXD IMX8QM_SAI1_TXD 0 625 #define IMX8QM_SAI1_TXD_AUD_SAI1_RXC 625 #define IMX8QM_SAI1_TXD_AUD_SAI1_RXC IMX8QM_SAI1_TXD 1 626 #define IMX8QM_SAI1_TXD_LSIO_GPIO3_IO16 626 #define IMX8QM_SAI1_TXD_LSIO_GPIO3_IO16 IMX8QM_SAI1_TXD 3 627 #define IMX8QM_SAI1_TXFS_AUD_SAI1_TXFS 627 #define IMX8QM_SAI1_TXFS_AUD_SAI1_TXFS IMX8QM_SAI1_TXFS 0 628 #define IMX8QM_SAI1_TXFS_AUD_SAI1_RXFS 628 #define IMX8QM_SAI1_TXFS_AUD_SAI1_RXFS IMX8QM_SAI1_TXFS 1 629 #define IMX8QM_SAI1_TXFS_LSIO_GPIO3_IO17 629 #define IMX8QM_SAI1_TXFS_LSIO_GPIO3_IO17 IMX8QM_SAI1_TXFS 3 630 #define IMX8QM_ADC_IN7_DMA_ADC1_IN3 630 #define IMX8QM_ADC_IN7_DMA_ADC1_IN3 IMX8QM_ADC_IN7 0 631 #define IMX8QM_ADC_IN7_DMA_SPI1_CS1 631 #define IMX8QM_ADC_IN7_DMA_SPI1_CS1 IMX8QM_ADC_IN7 1 632 #define IMX8QM_ADC_IN7_LSIO_KPP0_ROW3 632 #define IMX8QM_ADC_IN7_LSIO_KPP0_ROW3 IMX8QM_ADC_IN7 2 633 #define IMX8QM_ADC_IN7_LSIO_GPIO3_IO25 633 #define IMX8QM_ADC_IN7_LSIO_GPIO3_IO25 IMX8QM_ADC_IN7 3 634 #define IMX8QM_ADC_IN6_DMA_ADC1_IN2 634 #define IMX8QM_ADC_IN6_DMA_ADC1_IN2 IMX8QM_ADC_IN6 0 635 #define IMX8QM_ADC_IN6_DMA_SPI1_CS0 635 #define IMX8QM_ADC_IN6_DMA_SPI1_CS0 IMX8QM_ADC_IN6 1 636 #define IMX8QM_ADC_IN6_LSIO_KPP0_ROW2 636 #define IMX8QM_ADC_IN6_LSIO_KPP0_ROW2 IMX8QM_ADC_IN6 2 637 #define IMX8QM_ADC_IN6_LSIO_GPIO3_IO24 637 #define IMX8QM_ADC_IN6_LSIO_GPIO3_IO24 IMX8QM_ADC_IN6 3 638 #define IMX8QM_ADC_IN5_DMA_ADC1_IN1 638 #define IMX8QM_ADC_IN5_DMA_ADC1_IN1 IMX8QM_ADC_IN5 0 639 #define IMX8QM_ADC_IN5_DMA_SPI1_SDI 639 #define IMX8QM_ADC_IN5_DMA_SPI1_SDI IMX8QM_ADC_IN5 1 640 #define IMX8QM_ADC_IN5_LSIO_KPP0_ROW1 640 #define IMX8QM_ADC_IN5_LSIO_KPP0_ROW1 IMX8QM_ADC_IN5 2 641 #define IMX8QM_ADC_IN5_LSIO_GPIO3_IO23 641 #define IMX8QM_ADC_IN5_LSIO_GPIO3_IO23 IMX8QM_ADC_IN5 3 642 #define IMX8QM_ADC_IN4_DMA_ADC1_IN0 642 #define IMX8QM_ADC_IN4_DMA_ADC1_IN0 IMX8QM_ADC_IN4 0 643 #define IMX8QM_ADC_IN4_DMA_SPI1_SDO 643 #define IMX8QM_ADC_IN4_DMA_SPI1_SDO IMX8QM_ADC_IN4 1 644 #define IMX8QM_ADC_IN4_LSIO_KPP0_ROW0 644 #define IMX8QM_ADC_IN4_LSIO_KPP0_ROW0 IMX8QM_ADC_IN4 2 645 #define IMX8QM_ADC_IN4_LSIO_GPIO3_IO22 645 #define IMX8QM_ADC_IN4_LSIO_GPIO3_IO22 IMX8QM_ADC_IN4 3 646 #define IMX8QM_ADC_IN3_DMA_ADC0_IN3 646 #define IMX8QM_ADC_IN3_DMA_ADC0_IN3 IMX8QM_ADC_IN3 0 647 #define IMX8QM_ADC_IN3_DMA_SPI1_SCK 647 #define IMX8QM_ADC_IN3_DMA_SPI1_SCK IMX8QM_ADC_IN3 1 648 #define IMX8QM_ADC_IN3_LSIO_KPP0_COL3 648 #define IMX8QM_ADC_IN3_LSIO_KPP0_COL3 IMX8QM_ADC_IN3 2 649 #define IMX8QM_ADC_IN3_LSIO_GPIO3_IO21 649 #define IMX8QM_ADC_IN3_LSIO_GPIO3_IO21 IMX8QM_ADC_IN3 3 650 #define IMX8QM_ADC_IN2_DMA_ADC0_IN2 650 #define IMX8QM_ADC_IN2_DMA_ADC0_IN2 IMX8QM_ADC_IN2 0 651 #define IMX8QM_ADC_IN2_LSIO_KPP0_COL2 651 #define IMX8QM_ADC_IN2_LSIO_KPP0_COL2 IMX8QM_ADC_IN2 2 652 #define IMX8QM_ADC_IN2_LSIO_GPIO3_IO20 652 #define IMX8QM_ADC_IN2_LSIO_GPIO3_IO20 IMX8QM_ADC_IN2 3 653 #define IMX8QM_ADC_IN1_DMA_ADC0_IN1 653 #define IMX8QM_ADC_IN1_DMA_ADC0_IN1 IMX8QM_ADC_IN1 0 654 #define IMX8QM_ADC_IN1_LSIO_KPP0_COL1 654 #define IMX8QM_ADC_IN1_LSIO_KPP0_COL1 IMX8QM_ADC_IN1 2 655 #define IMX8QM_ADC_IN1_LSIO_GPIO3_IO19 655 #define IMX8QM_ADC_IN1_LSIO_GPIO3_IO19 IMX8QM_ADC_IN1 3 656 #define IMX8QM_ADC_IN0_DMA_ADC0_IN0 656 #define IMX8QM_ADC_IN0_DMA_ADC0_IN0 IMX8QM_ADC_IN0 0 657 #define IMX8QM_ADC_IN0_LSIO_KPP0_COL0 657 #define IMX8QM_ADC_IN0_LSIO_KPP0_COL0 IMX8QM_ADC_IN0 2 658 #define IMX8QM_ADC_IN0_LSIO_GPIO3_IO18 658 #define IMX8QM_ADC_IN0_LSIO_GPIO3_IO18 IMX8QM_ADC_IN0 3 659 #define IMX8QM_MLB_SIG_CONN_MLB_SIG 659 #define IMX8QM_MLB_SIG_CONN_MLB_SIG IMX8QM_MLB_SIG 0 660 #define IMX8QM_MLB_SIG_AUD_SAI3_RXC 660 #define IMX8QM_MLB_SIG_AUD_SAI3_RXC IMX8QM_MLB_SIG 1 661 #define IMX8QM_MLB_SIG_LSIO_GPIO3_IO26 661 #define IMX8QM_MLB_SIG_LSIO_GPIO3_IO26 IMX8QM_MLB_SIG 3 662 #define IMX8QM_MLB_CLK_CONN_MLB_CLK 662 #define IMX8QM_MLB_CLK_CONN_MLB_CLK IMX8QM_MLB_CLK 0 663 #define IMX8QM_MLB_CLK_AUD_SAI3_RXFS 663 #define IMX8QM_MLB_CLK_AUD_SAI3_RXFS IMX8QM_MLB_CLK 1 664 #define IMX8QM_MLB_CLK_LSIO_GPIO3_IO27 664 #define IMX8QM_MLB_CLK_LSIO_GPIO3_IO27 IMX8QM_MLB_CLK 3 665 #define IMX8QM_MLB_DATA_CONN_MLB_DATA 665 #define IMX8QM_MLB_DATA_CONN_MLB_DATA IMX8QM_MLB_DATA 0 666 #define IMX8QM_MLB_DATA_AUD_SAI3_RXD 666 #define IMX8QM_MLB_DATA_AUD_SAI3_RXD IMX8QM_MLB_DATA 1 667 #define IMX8QM_MLB_DATA_LSIO_GPIO3_IO28 667 #define IMX8QM_MLB_DATA_LSIO_GPIO3_IO28 IMX8QM_MLB_DATA 3 668 #define IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX 668 #define IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX IMX8QM_FLEXCAN0_RX 0 669 #define IMX8QM_FLEXCAN0_RX_LSIO_GPIO3_IO29 669 #define IMX8QM_FLEXCAN0_RX_LSIO_GPIO3_IO29 IMX8QM_FLEXCAN0_RX 3 670 #define IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX 670 #define IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX IMX8QM_FLEXCAN0_TX 0 671 #define IMX8QM_FLEXCAN0_TX_LSIO_GPIO3_IO30 671 #define IMX8QM_FLEXCAN0_TX_LSIO_GPIO3_IO30 IMX8QM_FLEXCAN0_TX 3 672 #define IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX 672 #define IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX IMX8QM_FLEXCAN1_RX 0 673 #define IMX8QM_FLEXCAN1_RX_LSIO_GPIO3_IO31 673 #define IMX8QM_FLEXCAN1_RX_LSIO_GPIO3_IO31 IMX8QM_FLEXCAN1_RX 3 674 #define IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX 674 #define IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX IMX8QM_FLEXCAN1_TX 0 675 #define IMX8QM_FLEXCAN1_TX_LSIO_GPIO4_IO00 675 #define IMX8QM_FLEXCAN1_TX_LSIO_GPIO4_IO00 IMX8QM_FLEXCAN1_TX 3 676 #define IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX 676 #define IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX IMX8QM_FLEXCAN2_RX 0 677 #define IMX8QM_FLEXCAN2_RX_LSIO_GPIO4_IO01 677 #define IMX8QM_FLEXCAN2_RX_LSIO_GPIO4_IO01 IMX8QM_FLEXCAN2_RX 3 678 #define IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX 678 #define IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX IMX8QM_FLEXCAN2_TX 0 679 #define IMX8QM_FLEXCAN2_TX_LSIO_GPIO4_IO02 679 #define IMX8QM_FLEXCAN2_TX_LSIO_GPIO4_IO02 IMX8QM_FLEXCAN2_TX 3 680 #define IMX8QM_USB_SS3_TC0_DMA_I2C1_SCL 680 #define IMX8QM_USB_SS3_TC0_DMA_I2C1_SCL IMX8QM_USB_SS3_TC0 0 681 #define IMX8QM_USB_SS3_TC0_CONN_USB_OTG1_PWR 681 #define IMX8QM_USB_SS3_TC0_CONN_USB_OTG1_PWR IMX8QM_USB_SS3_TC0 1 682 #define IMX8QM_USB_SS3_TC0_LSIO_GPIO4_IO03 682 #define IMX8QM_USB_SS3_TC0_LSIO_GPIO4_IO03 IMX8QM_USB_SS3_TC0 3 683 #define IMX8QM_USB_SS3_TC1_DMA_I2C1_SCL 683 #define IMX8QM_USB_SS3_TC1_DMA_I2C1_SCL IMX8QM_USB_SS3_TC1 0 684 #define IMX8QM_USB_SS3_TC1_CONN_USB_OTG2_PWR 684 #define IMX8QM_USB_SS3_TC1_CONN_USB_OTG2_PWR IMX8QM_USB_SS3_TC1 1 685 #define IMX8QM_USB_SS3_TC1_LSIO_GPIO4_IO04 685 #define IMX8QM_USB_SS3_TC1_LSIO_GPIO4_IO04 IMX8QM_USB_SS3_TC1 3 686 #define IMX8QM_USB_SS3_TC2_DMA_I2C1_SDA 686 #define IMX8QM_USB_SS3_TC2_DMA_I2C1_SDA IMX8QM_USB_SS3_TC2 0 687 #define IMX8QM_USB_SS3_TC2_CONN_USB_OTG1_OC 687 #define IMX8QM_USB_SS3_TC2_CONN_USB_OTG1_OC IMX8QM_USB_SS3_TC2 1 688 #define IMX8QM_USB_SS3_TC2_LSIO_GPIO4_IO05 688 #define IMX8QM_USB_SS3_TC2_LSIO_GPIO4_IO05 IMX8QM_USB_SS3_TC2 3 689 #define IMX8QM_USB_SS3_TC3_DMA_I2C1_SDA 689 #define IMX8QM_USB_SS3_TC3_DMA_I2C1_SDA IMX8QM_USB_SS3_TC3 0 690 #define IMX8QM_USB_SS3_TC3_CONN_USB_OTG2_OC 690 #define IMX8QM_USB_SS3_TC3_CONN_USB_OTG2_OC IMX8QM_USB_SS3_TC3 1 691 #define IMX8QM_USB_SS3_TC3_LSIO_GPIO4_IO06 691 #define IMX8QM_USB_SS3_TC3_LSIO_GPIO4_IO06 IMX8QM_USB_SS3_TC3 3 692 #define IMX8QM_USDHC1_RESET_B_CONN_USDHC1_RESE 692 #define IMX8QM_USDHC1_RESET_B_CONN_USDHC1_RESET_B IMX8QM_USDHC1_RESET_B 0 693 #define IMX8QM_USDHC1_RESET_B_LSIO_GPIO4_IO07 693 #define IMX8QM_USDHC1_RESET_B_LSIO_GPIO4_IO07 IMX8QM_USDHC1_RESET_B 3 694 #define IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSEL 694 #define IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT IMX8QM_USDHC1_VSELECT 0 695 #define IMX8QM_USDHC1_VSELECT_LSIO_GPIO4_IO08 695 #define IMX8QM_USDHC1_VSELECT_LSIO_GPIO4_IO08 IMX8QM_USDHC1_VSELECT 3 696 #define IMX8QM_USDHC2_RESET_B_CONN_USDHC2_RESE 696 #define IMX8QM_USDHC2_RESET_B_CONN_USDHC2_RESET_B IMX8QM_USDHC2_RESET_B 0 697 #define IMX8QM_USDHC2_RESET_B_LSIO_GPIO4_IO09 697 #define IMX8QM_USDHC2_RESET_B_LSIO_GPIO4_IO09 IMX8QM_USDHC2_RESET_B 3 698 #define IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSEL 698 #define IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT IMX8QM_USDHC2_VSELECT 0 699 #define IMX8QM_USDHC2_VSELECT_LSIO_GPIO4_IO10 699 #define IMX8QM_USDHC2_VSELECT_LSIO_GPIO4_IO10 IMX8QM_USDHC2_VSELECT 3 700 #define IMX8QM_USDHC2_WP_CONN_USDHC2_WP 700 #define IMX8QM_USDHC2_WP_CONN_USDHC2_WP IMX8QM_USDHC2_WP 0 701 #define IMX8QM_USDHC2_WP_LSIO_GPIO4_IO11 701 #define IMX8QM_USDHC2_WP_LSIO_GPIO4_IO11 IMX8QM_USDHC2_WP 3 702 #define IMX8QM_USDHC2_CD_B_CONN_USDHC2_CD_B 702 #define IMX8QM_USDHC2_CD_B_CONN_USDHC2_CD_B IMX8QM_USDHC2_CD_B 0 703 #define IMX8QM_USDHC2_CD_B_LSIO_GPIO4_IO12 703 #define IMX8QM_USDHC2_CD_B_LSIO_GPIO4_IO12 IMX8QM_USDHC2_CD_B 3 704 #define IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO 704 #define IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO IMX8QM_ENET0_MDIO 0 705 #define IMX8QM_ENET0_MDIO_DMA_I2C4_SDA 705 #define IMX8QM_ENET0_MDIO_DMA_I2C4_SDA IMX8QM_ENET0_MDIO 1 706 #define IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 706 #define IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 IMX8QM_ENET0_MDIO 3 707 #define IMX8QM_ENET0_MDC_CONN_ENET0_MDC 707 #define IMX8QM_ENET0_MDC_CONN_ENET0_MDC IMX8QM_ENET0_MDC 0 708 #define IMX8QM_ENET0_MDC_DMA_I2C4_SCL 708 #define IMX8QM_ENET0_MDC_DMA_I2C4_SCL IMX8QM_ENET0_MDC 1 709 #define IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 709 #define IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 IMX8QM_ENET0_MDC 3 710 #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET 710 #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M IMX8QM_ENET0_REFCLK_125M_25M 0 711 #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET 711 #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_PPS IMX8QM_ENET0_REFCLK_125M_25M 1 712 #define IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO 712 #define IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15 IMX8QM_ENET0_REFCLK_125M_25M 3 713 #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET 713 #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET1_REFCLK_125M_25M IMX8QM_ENET1_REFCLK_125M_25M 0 714 #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET 714 #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET1_PPS IMX8QM_ENET1_REFCLK_125M_25M 1 715 #define IMX8QM_ENET1_REFCLK_125M_25M_LSIO_GPIO 715 #define IMX8QM_ENET1_REFCLK_125M_25M_LSIO_GPIO4_IO16 IMX8QM_ENET1_REFCLK_125M_25M 3 716 #define IMX8QM_ENET1_MDIO_CONN_ENET1_MDIO 716 #define IMX8QM_ENET1_MDIO_CONN_ENET1_MDIO IMX8QM_ENET1_MDIO 0 717 #define IMX8QM_ENET1_MDIO_DMA_I2C4_SDA 717 #define IMX8QM_ENET1_MDIO_DMA_I2C4_SDA IMX8QM_ENET1_MDIO 1 718 #define IMX8QM_ENET1_MDIO_LSIO_GPIO4_IO17 718 #define IMX8QM_ENET1_MDIO_LSIO_GPIO4_IO17 IMX8QM_ENET1_MDIO 3 719 #define IMX8QM_ENET1_MDC_CONN_ENET1_MDC 719 #define IMX8QM_ENET1_MDC_CONN_ENET1_MDC IMX8QM_ENET1_MDC 0 720 #define IMX8QM_ENET1_MDC_DMA_I2C4_SCL 720 #define IMX8QM_ENET1_MDC_DMA_I2C4_SCL IMX8QM_ENET1_MDC 1 721 #define IMX8QM_ENET1_MDC_LSIO_GPIO4_IO18 721 #define IMX8QM_ENET1_MDC_LSIO_GPIO4_IO18 IMX8QM_ENET1_MDC 3 722 #define IMX8QM_QSPI1A_SS0_B_LSIO_QSPI1A_SS0_B 722 #define IMX8QM_QSPI1A_SS0_B_LSIO_QSPI1A_SS0_B IMX8QM_QSPI1A_SS0_B 0 723 #define IMX8QM_QSPI1A_SS0_B_LSIO_GPIO4_IO19 723 #define IMX8QM_QSPI1A_SS0_B_LSIO_GPIO4_IO19 IMX8QM_QSPI1A_SS0_B 3 724 #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SS1_B 724 #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SS1_B IMX8QM_QSPI1A_SS1_B 0 725 #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SCLK2 725 #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SCLK2 IMX8QM_QSPI1A_SS1_B 1 726 #define IMX8QM_QSPI1A_SS1_B_LSIO_GPIO4_IO20 726 #define IMX8QM_QSPI1A_SS1_B_LSIO_GPIO4_IO20 IMX8QM_QSPI1A_SS1_B 3 727 #define IMX8QM_QSPI1A_SCLK_LSIO_QSPI1A_SCLK 727 #define IMX8QM_QSPI1A_SCLK_LSIO_QSPI1A_SCLK IMX8QM_QSPI1A_SCLK 0 728 #define IMX8QM_QSPI1A_SCLK_LSIO_GPIO4_IO21 728 #define IMX8QM_QSPI1A_SCLK_LSIO_GPIO4_IO21 IMX8QM_QSPI1A_SCLK 3 729 #define IMX8QM_QSPI1A_DQS_LSIO_QSPI1A_DQS 729 #define IMX8QM_QSPI1A_DQS_LSIO_QSPI1A_DQS IMX8QM_QSPI1A_DQS 0 730 #define IMX8QM_QSPI1A_DQS_LSIO_GPIO4_IO22 730 #define IMX8QM_QSPI1A_DQS_LSIO_GPIO4_IO22 IMX8QM_QSPI1A_DQS 3 731 #define IMX8QM_QSPI1A_DATA3_LSIO_QSPI1A_DATA3 731 #define IMX8QM_QSPI1A_DATA3_LSIO_QSPI1A_DATA3 IMX8QM_QSPI1A_DATA3 0 732 #define IMX8QM_QSPI1A_DATA3_DMA_I2C1_SDA 732 #define IMX8QM_QSPI1A_DATA3_DMA_I2C1_SDA IMX8QM_QSPI1A_DATA3 1 733 #define IMX8QM_QSPI1A_DATA3_CONN_USB_OTG1_OC 733 #define IMX8QM_QSPI1A_DATA3_CONN_USB_OTG1_OC IMX8QM_QSPI1A_DATA3 2 734 #define IMX8QM_QSPI1A_DATA3_LSIO_GPIO4_IO23 734 #define IMX8QM_QSPI1A_DATA3_LSIO_GPIO4_IO23 IMX8QM_QSPI1A_DATA3 3 735 #define IMX8QM_QSPI1A_DATA2_LSIO_QSPI1A_DATA2 735 #define IMX8QM_QSPI1A_DATA2_LSIO_QSPI1A_DATA2 IMX8QM_QSPI1A_DATA2 0 736 #define IMX8QM_QSPI1A_DATA2_DMA_I2C1_SCL 736 #define IMX8QM_QSPI1A_DATA2_DMA_I2C1_SCL IMX8QM_QSPI1A_DATA2 1 737 #define IMX8QM_QSPI1A_DATA2_CONN_USB_OTG2_PWR 737 #define IMX8QM_QSPI1A_DATA2_CONN_USB_OTG2_PWR IMX8QM_QSPI1A_DATA2 2 738 #define IMX8QM_QSPI1A_DATA2_LSIO_GPIO4_IO24 738 #define IMX8QM_QSPI1A_DATA2_LSIO_GPIO4_IO24 IMX8QM_QSPI1A_DATA2 3 739 #define IMX8QM_QSPI1A_DATA1_LSIO_QSPI1A_DATA1 739 #define IMX8QM_QSPI1A_DATA1_LSIO_QSPI1A_DATA1 IMX8QM_QSPI1A_DATA1 0 740 #define IMX8QM_QSPI1A_DATA1_DMA_I2C1_SDA 740 #define IMX8QM_QSPI1A_DATA1_DMA_I2C1_SDA IMX8QM_QSPI1A_DATA1 1 741 #define IMX8QM_QSPI1A_DATA1_CONN_USB_OTG2_OC 741 #define IMX8QM_QSPI1A_DATA1_CONN_USB_OTG2_OC IMX8QM_QSPI1A_DATA1 2 742 #define IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25 742 #define IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25 IMX8QM_QSPI1A_DATA1 3 743 #define IMX8QM_QSPI1A_DATA0_LSIO_QSPI1A_DATA0 743 #define IMX8QM_QSPI1A_DATA0_LSIO_QSPI1A_DATA0 IMX8QM_QSPI1A_DATA0 0 744 #define IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26 744 #define IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26 IMX8QM_QSPI1A_DATA0 3 745 #define IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 745 #define IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 IMX8QM_QSPI0A_DATA0 0 746 #define IMX8QM_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 746 #define IMX8QM_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 IMX8QM_QSPI0A_DATA1 0 747 #define IMX8QM_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 747 #define IMX8QM_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 IMX8QM_QSPI0A_DATA2 0 748 #define IMX8QM_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 748 #define IMX8QM_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 IMX8QM_QSPI0A_DATA3 0 749 #define IMX8QM_QSPI0A_DQS_LSIO_QSPI0A_DQS 749 #define IMX8QM_QSPI0A_DQS_LSIO_QSPI0A_DQS IMX8QM_QSPI0A_DQS 0 750 #define IMX8QM_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B 750 #define IMX8QM_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B IMX8QM_QSPI0A_SS0_B 0 751 #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B 751 #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B IMX8QM_QSPI0A_SS1_B 0 752 #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SCLK2 752 #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SCLK2 IMX8QM_QSPI0A_SS1_B 1 753 #define IMX8QM_QSPI0A_SCLK_LSIO_QSPI0A_SCLK 753 #define IMX8QM_QSPI0A_SCLK_LSIO_QSPI0A_SCLK IMX8QM_QSPI0A_SCLK 0 754 #define IMX8QM_QSPI0B_SCLK_LSIO_QSPI0B_SCLK 754 #define IMX8QM_QSPI0B_SCLK_LSIO_QSPI0B_SCLK IMX8QM_QSPI0B_SCLK 0 755 #define IMX8QM_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 755 #define IMX8QM_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 IMX8QM_QSPI0B_DATA0 0 756 #define IMX8QM_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 756 #define IMX8QM_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 IMX8QM_QSPI0B_DATA1 0 757 #define IMX8QM_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 757 #define IMX8QM_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 IMX8QM_QSPI0B_DATA2 0 758 #define IMX8QM_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 758 #define IMX8QM_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 IMX8QM_QSPI0B_DATA3 0 759 #define IMX8QM_QSPI0B_DQS_LSIO_QSPI0B_DQS 759 #define IMX8QM_QSPI0B_DQS_LSIO_QSPI0B_DQS IMX8QM_QSPI0B_DQS 0 760 #define IMX8QM_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B 760 #define IMX8QM_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B IMX8QM_QSPI0B_SS0_B 0 761 #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B 761 #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B IMX8QM_QSPI0B_SS1_B 0 762 #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SCLK2 762 #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SCLK2 IMX8QM_QSPI0B_SS1_B 1 763 #define IMX8QM_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_ 763 #define IMX8QM_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B IMX8QM_PCIE_CTRL0_CLKREQ_B 0 764 #define IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_ 764 #define IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 IMX8QM_PCIE_CTRL0_CLKREQ_B 3 765 #define IMX8QM_PCIE_CTRL0_WAKE_B_HSIO_PCIE0_WA 765 #define IMX8QM_PCIE_CTRL0_WAKE_B_HSIO_PCIE0_WAKE_B IMX8QM_PCIE_CTRL0_WAKE_B 0 766 #define IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO 766 #define IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 IMX8QM_PCIE_CTRL0_WAKE_B 3 767 #define IMX8QM_PCIE_CTRL0_PERST_B_HSIO_PCIE0_P 767 #define IMX8QM_PCIE_CTRL0_PERST_B_HSIO_PCIE0_PERST_B IMX8QM_PCIE_CTRL0_PERST_B 0 768 #define IMX8QM_PCIE_CTRL0_PERST_B_LSIO_GPIO4_I 768 #define IMX8QM_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 IMX8QM_PCIE_CTRL0_PERST_B 3 769 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_HSIO_PCIE1_ 769 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_HSIO_PCIE1_CLKREQ_B IMX8QM_PCIE_CTRL1_CLKREQ_B 0 770 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_DMA_I2C1_SD 770 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_DMA_I2C1_SDA IMX8QM_PCIE_CTRL1_CLKREQ_B 1 771 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_CONN_USB_OT 771 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_CONN_USB_OTG2_OC IMX8QM_PCIE_CTRL1_CLKREQ_B 2 772 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_ 772 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_IO30 IMX8QM_PCIE_CTRL1_CLKREQ_B 3 773 #define IMX8QM_PCIE_CTRL1_WAKE_B_HSIO_PCIE1_WA 773 #define IMX8QM_PCIE_CTRL1_WAKE_B_HSIO_PCIE1_WAKE_B IMX8QM_PCIE_CTRL1_WAKE_B 0 774 #define IMX8QM_PCIE_CTRL1_WAKE_B_DMA_I2C1_SCL 774 #define IMX8QM_PCIE_CTRL1_WAKE_B_DMA_I2C1_SCL IMX8QM_PCIE_CTRL1_WAKE_B 1 775 #define IMX8QM_PCIE_CTRL1_WAKE_B_CONN_USB_OTG2 775 #define IMX8QM_PCIE_CTRL1_WAKE_B_CONN_USB_OTG2_PWR IMX8QM_PCIE_CTRL1_WAKE_B 2 776 #define IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO 776 #define IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31 IMX8QM_PCIE_CTRL1_WAKE_B 3 777 #define IMX8QM_PCIE_CTRL1_PERST_B_HSIO_PCIE1_P 777 #define IMX8QM_PCIE_CTRL1_PERST_B_HSIO_PCIE1_PERST_B IMX8QM_PCIE_CTRL1_PERST_B 0 778 #define IMX8QM_PCIE_CTRL1_PERST_B_DMA_I2C1_SCL 778 #define IMX8QM_PCIE_CTRL1_PERST_B_DMA_I2C1_SCL IMX8QM_PCIE_CTRL1_PERST_B 1 779 #define IMX8QM_PCIE_CTRL1_PERST_B_CONN_USB_OTG 779 #define IMX8QM_PCIE_CTRL1_PERST_B_CONN_USB_OTG1_PWR IMX8QM_PCIE_CTRL1_PERST_B 2 780 #define IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_I 780 #define IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00 IMX8QM_PCIE_CTRL1_PERST_B 3 781 #define IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_D 781 #define IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA IMX8QM_USB_HSIC0_DATA 0 782 #define IMX8QM_USB_HSIC0_DATA_DMA_I2C1_SDA 782 #define IMX8QM_USB_HSIC0_DATA_DMA_I2C1_SDA IMX8QM_USB_HSIC0_DATA 1 783 #define IMX8QM_USB_HSIC0_DATA_LSIO_GPIO5_IO01 783 #define IMX8QM_USB_HSIC0_DATA_LSIO_GPIO5_IO01 IMX8QM_USB_HSIC0_DATA 3 784 #define IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0 784 #define IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE IMX8QM_USB_HSIC0_STROBE 0 785 #define IMX8QM_USB_HSIC0_STROBE_DMA_I2C1_SCL 785 #define IMX8QM_USB_HSIC0_STROBE_DMA_I2C1_SCL IMX8QM_USB_HSIC0_STROBE 1 786 #define IMX8QM_USB_HSIC0_STROBE_LSIO_GPIO5_IO0 786 #define IMX8QM_USB_HSIC0_STROBE_LSIO_GPIO5_IO02 IMX8QM_USB_HSIC0_STROBE 3 787 #define IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 787 #define IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK IMX8QM_EMMC0_CLK 0 788 #define IMX8QM_EMMC0_CLK_CONN_NAND_READY_B 788 #define IMX8QM_EMMC0_CLK_CONN_NAND_READY_B IMX8QM_EMMC0_CLK 1 789 #define IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 789 #define IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD IMX8QM_EMMC0_CMD 0 790 #define IMX8QM_EMMC0_CMD_CONN_NAND_DQS 790 #define IMX8QM_EMMC0_CMD_CONN_NAND_DQS IMX8QM_EMMC0_CMD 1 791 #define IMX8QM_EMMC0_CMD_AUD_MQS_R 791 #define IMX8QM_EMMC0_CMD_AUD_MQS_R IMX8QM_EMMC0_CMD 2 792 #define IMX8QM_EMMC0_CMD_LSIO_GPIO5_IO03 792 #define IMX8QM_EMMC0_CMD_LSIO_GPIO5_IO03 IMX8QM_EMMC0_CMD 3 793 #define IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 793 #define IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 IMX8QM_EMMC0_DATA0 0 794 #define IMX8QM_EMMC0_DATA0_CONN_NAND_DATA00 794 #define IMX8QM_EMMC0_DATA0_CONN_NAND_DATA00 IMX8QM_EMMC0_DATA0 1 795 #define IMX8QM_EMMC0_DATA0_LSIO_GPIO5_IO04 795 #define IMX8QM_EMMC0_DATA0_LSIO_GPIO5_IO04 IMX8QM_EMMC0_DATA0 3 796 #define IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 796 #define IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 IMX8QM_EMMC0_DATA1 0 797 #define IMX8QM_EMMC0_DATA1_CONN_NAND_DATA01 797 #define IMX8QM_EMMC0_DATA1_CONN_NAND_DATA01 IMX8QM_EMMC0_DATA1 1 798 #define IMX8QM_EMMC0_DATA1_LSIO_GPIO5_IO05 798 #define IMX8QM_EMMC0_DATA1_LSIO_GPIO5_IO05 IMX8QM_EMMC0_DATA1 3 799 #define IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 799 #define IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 IMX8QM_EMMC0_DATA2 0 800 #define IMX8QM_EMMC0_DATA2_CONN_NAND_DATA02 800 #define IMX8QM_EMMC0_DATA2_CONN_NAND_DATA02 IMX8QM_EMMC0_DATA2 1 801 #define IMX8QM_EMMC0_DATA2_LSIO_GPIO5_IO06 801 #define IMX8QM_EMMC0_DATA2_LSIO_GPIO5_IO06 IMX8QM_EMMC0_DATA2 3 802 #define IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 802 #define IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 IMX8QM_EMMC0_DATA3 0 803 #define IMX8QM_EMMC0_DATA3_CONN_NAND_DATA03 803 #define IMX8QM_EMMC0_DATA3_CONN_NAND_DATA03 IMX8QM_EMMC0_DATA3 1 804 #define IMX8QM_EMMC0_DATA3_LSIO_GPIO5_IO07 804 #define IMX8QM_EMMC0_DATA3_LSIO_GPIO5_IO07 IMX8QM_EMMC0_DATA3 3 805 #define IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 805 #define IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 IMX8QM_EMMC0_DATA4 0 806 #define IMX8QM_EMMC0_DATA4_CONN_NAND_DATA04 806 #define IMX8QM_EMMC0_DATA4_CONN_NAND_DATA04 IMX8QM_EMMC0_DATA4 1 807 #define IMX8QM_EMMC0_DATA4_LSIO_GPIO5_IO08 807 #define IMX8QM_EMMC0_DATA4_LSIO_GPIO5_IO08 IMX8QM_EMMC0_DATA4 3 808 #define IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 808 #define IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 IMX8QM_EMMC0_DATA5 0 809 #define IMX8QM_EMMC0_DATA5_CONN_NAND_DATA05 809 #define IMX8QM_EMMC0_DATA5_CONN_NAND_DATA05 IMX8QM_EMMC0_DATA5 1 810 #define IMX8QM_EMMC0_DATA5_LSIO_GPIO5_IO09 810 #define IMX8QM_EMMC0_DATA5_LSIO_GPIO5_IO09 IMX8QM_EMMC0_DATA5 3 811 #define IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 811 #define IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 IMX8QM_EMMC0_DATA6 0 812 #define IMX8QM_EMMC0_DATA6_CONN_NAND_DATA06 812 #define IMX8QM_EMMC0_DATA6_CONN_NAND_DATA06 IMX8QM_EMMC0_DATA6 1 813 #define IMX8QM_EMMC0_DATA6_LSIO_GPIO5_IO10 813 #define IMX8QM_EMMC0_DATA6_LSIO_GPIO5_IO10 IMX8QM_EMMC0_DATA6 3 814 #define IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 814 #define IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 IMX8QM_EMMC0_DATA7 0 815 #define IMX8QM_EMMC0_DATA7_CONN_NAND_DATA07 815 #define IMX8QM_EMMC0_DATA7_CONN_NAND_DATA07 IMX8QM_EMMC0_DATA7 1 816 #define IMX8QM_EMMC0_DATA7_LSIO_GPIO5_IO11 816 #define IMX8QM_EMMC0_DATA7_LSIO_GPIO5_IO11 IMX8QM_EMMC0_DATA7 3 817 #define IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 817 #define IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE IMX8QM_EMMC0_STROBE 0 818 #define IMX8QM_EMMC0_STROBE_CONN_NAND_CLE 818 #define IMX8QM_EMMC0_STROBE_CONN_NAND_CLE IMX8QM_EMMC0_STROBE 1 819 #define IMX8QM_EMMC0_STROBE_LSIO_GPIO5_IO12 819 #define IMX8QM_EMMC0_STROBE_LSIO_GPIO5_IO12 IMX8QM_EMMC0_STROBE 3 820 #define IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_ 820 #define IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B IMX8QM_EMMC0_RESET_B 0 821 #define IMX8QM_EMMC0_RESET_B_CONN_NAND_WP_B 821 #define IMX8QM_EMMC0_RESET_B_CONN_NAND_WP_B IMX8QM_EMMC0_RESET_B 1 822 #define IMX8QM_EMMC0_RESET_B_CONN_USDHC1_VSELE 822 #define IMX8QM_EMMC0_RESET_B_CONN_USDHC1_VSELECT IMX8QM_EMMC0_RESET_B 2 823 #define IMX8QM_EMMC0_RESET_B_LSIO_GPIO5_IO13 823 #define IMX8QM_EMMC0_RESET_B_LSIO_GPIO5_IO13 IMX8QM_EMMC0_RESET_B 3 824 #define IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 824 #define IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK IMX8QM_USDHC1_CLK 0 825 #define IMX8QM_USDHC1_CLK_AUD_MQS_R 825 #define IMX8QM_USDHC1_CLK_AUD_MQS_R IMX8QM_USDHC1_CLK 1 826 #define IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 826 #define IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD IMX8QM_USDHC1_CMD 0 827 #define IMX8QM_USDHC1_CMD_AUD_MQS_L 827 #define IMX8QM_USDHC1_CMD_AUD_MQS_L IMX8QM_USDHC1_CMD 1 828 #define IMX8QM_USDHC1_CMD_LSIO_GPIO5_IO14 828 #define IMX8QM_USDHC1_CMD_LSIO_GPIO5_IO14 IMX8QM_USDHC1_CMD 3 829 #define IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 829 #define IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 IMX8QM_USDHC1_DATA0 0 830 #define IMX8QM_USDHC1_DATA0_CONN_NAND_RE_N 830 #define IMX8QM_USDHC1_DATA0_CONN_NAND_RE_N IMX8QM_USDHC1_DATA0 1 831 #define IMX8QM_USDHC1_DATA0_LSIO_GPIO5_IO15 831 #define IMX8QM_USDHC1_DATA0_LSIO_GPIO5_IO15 IMX8QM_USDHC1_DATA0 3 832 #define IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 832 #define IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 IMX8QM_USDHC1_DATA1 0 833 #define IMX8QM_USDHC1_DATA1_CONN_NAND_RE_P 833 #define IMX8QM_USDHC1_DATA1_CONN_NAND_RE_P IMX8QM_USDHC1_DATA1 1 834 #define IMX8QM_USDHC1_DATA1_LSIO_GPIO5_IO16 834 #define IMX8QM_USDHC1_DATA1_LSIO_GPIO5_IO16 IMX8QM_USDHC1_DATA1 3 835 #define IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 835 #define IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 IMX8QM_USDHC1_DATA2 0 836 #define IMX8QM_USDHC1_DATA2_CONN_NAND_DQS_N 836 #define IMX8QM_USDHC1_DATA2_CONN_NAND_DQS_N IMX8QM_USDHC1_DATA2 1 837 #define IMX8QM_USDHC1_DATA2_LSIO_GPIO5_IO17 837 #define IMX8QM_USDHC1_DATA2_LSIO_GPIO5_IO17 IMX8QM_USDHC1_DATA2 3 838 #define IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 838 #define IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 IMX8QM_USDHC1_DATA3 0 839 #define IMX8QM_USDHC1_DATA3_CONN_NAND_DQS_P 839 #define IMX8QM_USDHC1_DATA3_CONN_NAND_DQS_P IMX8QM_USDHC1_DATA3 1 840 #define IMX8QM_USDHC1_DATA3_LSIO_GPIO5_IO18 840 #define IMX8QM_USDHC1_DATA3_LSIO_GPIO5_IO18 IMX8QM_USDHC1_DATA3 3 841 #define IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 841 #define IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 IMX8QM_USDHC1_DATA4 0 842 #define IMX8QM_USDHC1_DATA4_CONN_NAND_CE0_B 842 #define IMX8QM_USDHC1_DATA4_CONN_NAND_CE0_B IMX8QM_USDHC1_DATA4 1 843 #define IMX8QM_USDHC1_DATA4_AUD_MQS_R 843 #define IMX8QM_USDHC1_DATA4_AUD_MQS_R IMX8QM_USDHC1_DATA4 2 844 #define IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19 844 #define IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19 IMX8QM_USDHC1_DATA4 3 845 #define IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 845 #define IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 IMX8QM_USDHC1_DATA5 0 846 #define IMX8QM_USDHC1_DATA5_CONN_NAND_RE_B 846 #define IMX8QM_USDHC1_DATA5_CONN_NAND_RE_B IMX8QM_USDHC1_DATA5 1 847 #define IMX8QM_USDHC1_DATA5_AUD_MQS_L 847 #define IMX8QM_USDHC1_DATA5_AUD_MQS_L IMX8QM_USDHC1_DATA5 2 848 #define IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 848 #define IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 IMX8QM_USDHC1_DATA5 3 849 #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 849 #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 IMX8QM_USDHC1_DATA6 0 850 #define IMX8QM_USDHC1_DATA6_CONN_NAND_WE_B 850 #define IMX8QM_USDHC1_DATA6_CONN_NAND_WE_B IMX8QM_USDHC1_DATA6 1 851 #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_WP 851 #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_WP IMX8QM_USDHC1_DATA6 2 852 #define IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 852 #define IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 IMX8QM_USDHC1_DATA6 3 853 #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 853 #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 IMX8QM_USDHC1_DATA7 0 854 #define IMX8QM_USDHC1_DATA7_CONN_NAND_ALE 854 #define IMX8QM_USDHC1_DATA7_CONN_NAND_ALE IMX8QM_USDHC1_DATA7 1 855 #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_CD_B 855 #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_CD_B IMX8QM_USDHC1_DATA7 2 856 #define IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22 856 #define IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22 IMX8QM_USDHC1_DATA7 3 857 #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_STROB 857 #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_STROBE IMX8QM_USDHC1_STROBE 0 858 #define IMX8QM_USDHC1_STROBE_CONN_NAND_CE1_B 858 #define IMX8QM_USDHC1_STROBE_CONN_NAND_CE1_B IMX8QM_USDHC1_STROBE 1 859 #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_RESET 859 #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_RESET_B IMX8QM_USDHC1_STROBE 2 860 #define IMX8QM_USDHC1_STROBE_LSIO_GPIO5_IO23 860 #define IMX8QM_USDHC1_STROBE_LSIO_GPIO5_IO23 IMX8QM_USDHC1_STROBE 3 861 #define IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 861 #define IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK IMX8QM_USDHC2_CLK 0 862 #define IMX8QM_USDHC2_CLK_AUD_MQS_R 862 #define IMX8QM_USDHC2_CLK_AUD_MQS_R IMX8QM_USDHC2_CLK 1 863 #define IMX8QM_USDHC2_CLK_LSIO_GPIO5_IO24 863 #define IMX8QM_USDHC2_CLK_LSIO_GPIO5_IO24 IMX8QM_USDHC2_CLK 3 864 #define IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 864 #define IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD IMX8QM_USDHC2_CMD 0 865 #define IMX8QM_USDHC2_CMD_AUD_MQS_L 865 #define IMX8QM_USDHC2_CMD_AUD_MQS_L IMX8QM_USDHC2_CMD 1 866 #define IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 866 #define IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 IMX8QM_USDHC2_CMD 3 867 #define IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 867 #define IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 IMX8QM_USDHC2_DATA0 0 868 #define IMX8QM_USDHC2_DATA0_DMA_UART4_RX 868 #define IMX8QM_USDHC2_DATA0_DMA_UART4_RX IMX8QM_USDHC2_DATA0 1 869 #define IMX8QM_USDHC2_DATA0_LSIO_GPIO5_IO26 869 #define IMX8QM_USDHC2_DATA0_LSIO_GPIO5_IO26 IMX8QM_USDHC2_DATA0 3 870 #define IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 870 #define IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 IMX8QM_USDHC2_DATA1 0 871 #define IMX8QM_USDHC2_DATA1_DMA_UART4_TX 871 #define IMX8QM_USDHC2_DATA1_DMA_UART4_TX IMX8QM_USDHC2_DATA1 1 872 #define IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 872 #define IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 IMX8QM_USDHC2_DATA1 3 873 #define IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 873 #define IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 IMX8QM_USDHC2_DATA2 0 874 #define IMX8QM_USDHC2_DATA2_DMA_UART4_CTS_B 874 #define IMX8QM_USDHC2_DATA2_DMA_UART4_CTS_B IMX8QM_USDHC2_DATA2 1 875 #define IMX8QM_USDHC2_DATA2_LSIO_GPIO5_IO28 875 #define IMX8QM_USDHC2_DATA2_LSIO_GPIO5_IO28 IMX8QM_USDHC2_DATA2 3 876 #define IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 876 #define IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 IMX8QM_USDHC2_DATA3 0 877 #define IMX8QM_USDHC2_DATA3_DMA_UART4_RTS_B 877 #define IMX8QM_USDHC2_DATA3_DMA_UART4_RTS_B IMX8QM_USDHC2_DATA3 1 878 #define IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 878 #define IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 IMX8QM_USDHC2_DATA3 3 879 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMI 879 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC IMX8QM_ENET0_RGMII_TXC 0 880 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK 880 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT IMX8QM_ENET0_RGMII_TXC 1 881 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK 881 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_IN IMX8QM_ENET0_RGMII_TXC 2 882 #define IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 882 #define IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 IMX8QM_ENET0_RGMII_TXC 3 883 #define IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_R 883 #define IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL IMX8QM_ENET0_RGMII_TX_CTL 0 884 #define IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_I 884 #define IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31 IMX8QM_ENET0_RGMII_TX_CTL 3 885 #define IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGM 885 #define IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 IMX8QM_ENET0_RGMII_TXD0 0 886 #define IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO0 886 #define IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00 IMX8QM_ENET0_RGMII_TXD0 3 887 #define IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGM 887 #define IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 IMX8QM_ENET0_RGMII_TXD1 0 888 #define IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO0 888 #define IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01 IMX8QM_ENET0_RGMII_TXD1 3 889 #define IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGM 889 #define IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 IMX8QM_ENET0_RGMII_TXD2 0 890 #define IMX8QM_ENET0_RGMII_TXD2_DMA_UART3_TX 890 #define IMX8QM_ENET0_RGMII_TXD2_DMA_UART3_TX IMX8QM_ENET0_RGMII_TXD2 1 891 #define IMX8QM_ENET0_RGMII_TXD2_VPU_TSI_S1_VID 891 #define IMX8QM_ENET0_RGMII_TXD2_VPU_TSI_S1_VID IMX8QM_ENET0_RGMII_TXD2 2 892 #define IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO0 892 #define IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02 IMX8QM_ENET0_RGMII_TXD2 3 893 #define IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGM 893 #define IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 IMX8QM_ENET0_RGMII_TXD3 0 894 #define IMX8QM_ENET0_RGMII_TXD3_DMA_UART3_RTS_ 894 #define IMX8QM_ENET0_RGMII_TXD3_DMA_UART3_RTS_B IMX8QM_ENET0_RGMII_TXD3 1 895 #define IMX8QM_ENET0_RGMII_TXD3_VPU_TSI_S1_SYN 895 #define IMX8QM_ENET0_RGMII_TXD3_VPU_TSI_S1_SYNC IMX8QM_ENET0_RGMII_TXD3 2 896 #define IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO0 896 #define IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03 IMX8QM_ENET0_RGMII_TXD3 3 897 #define IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMI 897 #define IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC IMX8QM_ENET0_RGMII_RXC 0 898 #define IMX8QM_ENET0_RGMII_RXC_DMA_UART3_CTS_B 898 #define IMX8QM_ENET0_RGMII_RXC_DMA_UART3_CTS_B IMX8QM_ENET0_RGMII_RXC 1 899 #define IMX8QM_ENET0_RGMII_RXC_VPU_TSI_S1_DATA 899 #define IMX8QM_ENET0_RGMII_RXC_VPU_TSI_S1_DATA IMX8QM_ENET0_RGMII_RXC 2 900 #define IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 900 #define IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 IMX8QM_ENET0_RGMII_RXC 3 901 #define IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_R 901 #define IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL IMX8QM_ENET0_RGMII_RX_CTL 0 902 #define IMX8QM_ENET0_RGMII_RX_CTL_VPU_TSI_S0_V 902 #define IMX8QM_ENET0_RGMII_RX_CTL_VPU_TSI_S0_VID IMX8QM_ENET0_RGMII_RX_CTL 2 903 #define IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_I 903 #define IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05 IMX8QM_ENET0_RGMII_RX_CTL 3 904 #define IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGM 904 #define IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 IMX8QM_ENET0_RGMII_RXD0 0 905 #define IMX8QM_ENET0_RGMII_RXD0_VPU_TSI_S0_SYN 905 #define IMX8QM_ENET0_RGMII_RXD0_VPU_TSI_S0_SYNC IMX8QM_ENET0_RGMII_RXD0 2 906 #define IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO0 906 #define IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06 IMX8QM_ENET0_RGMII_RXD0 3 907 #define IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGM 907 #define IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 IMX8QM_ENET0_RGMII_RXD1 0 908 #define IMX8QM_ENET0_RGMII_RXD1_VPU_TSI_S0_DAT 908 #define IMX8QM_ENET0_RGMII_RXD1_VPU_TSI_S0_DATA IMX8QM_ENET0_RGMII_RXD1 2 909 #define IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO0 909 #define IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07 IMX8QM_ENET0_RGMII_RXD1 3 910 #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGM 910 #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 IMX8QM_ENET0_RGMII_RXD2 0 911 #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RMI 911 #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER IMX8QM_ENET0_RGMII_RXD2 1 912 #define IMX8QM_ENET0_RGMII_RXD2_VPU_TSI_S0_CLK 912 #define IMX8QM_ENET0_RGMII_RXD2_VPU_TSI_S0_CLK IMX8QM_ENET0_RGMII_RXD2 2 913 #define IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO0 913 #define IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08 IMX8QM_ENET0_RGMII_RXD2 3 914 #define IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGM 914 #define IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 IMX8QM_ENET0_RGMII_RXD3 0 915 #define IMX8QM_ENET0_RGMII_RXD3_DMA_UART3_RX 915 #define IMX8QM_ENET0_RGMII_RXD3_DMA_UART3_RX IMX8QM_ENET0_RGMII_RXD3 1 916 #define IMX8QM_ENET0_RGMII_RXD3_VPU_TSI_S1_CLK 916 #define IMX8QM_ENET0_RGMII_RXD3_VPU_TSI_S1_CLK IMX8QM_ENET0_RGMII_RXD3 2 917 #define IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO0 917 #define IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09 IMX8QM_ENET0_RGMII_RXD3 3 918 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RGMI 918 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RGMII_TXC IMX8QM_ENET1_RGMII_TXC 0 919 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK 919 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK50M_OUT IMX8QM_ENET1_RGMII_TXC 1 920 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK 920 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK50M_IN IMX8QM_ENET1_RGMII_TXC 2 921 #define IMX8QM_ENET1_RGMII_TXC_LSIO_GPIO6_IO10 921 #define IMX8QM_ENET1_RGMII_TXC_LSIO_GPIO6_IO10 IMX8QM_ENET1_RGMII_TXC 3 922 #define IMX8QM_ENET1_RGMII_TX_CTL_CONN_ENET1_R 922 #define IMX8QM_ENET1_RGMII_TX_CTL_CONN_ENET1_RGMII_TX_CTL IMX8QM_ENET1_RGMII_TX_CTL 0 923 #define IMX8QM_ENET1_RGMII_TX_CTL_LSIO_GPIO6_I 923 #define IMX8QM_ENET1_RGMII_TX_CTL_LSIO_GPIO6_IO11 IMX8QM_ENET1_RGMII_TX_CTL 3 924 #define IMX8QM_ENET1_RGMII_TXD0_CONN_ENET1_RGM 924 #define IMX8QM_ENET1_RGMII_TXD0_CONN_ENET1_RGMII_TXD0 IMX8QM_ENET1_RGMII_TXD0 0 925 #define IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO1 925 #define IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO12 IMX8QM_ENET1_RGMII_TXD0 3 926 #define IMX8QM_ENET1_RGMII_TXD1_CONN_ENET1_RGM 926 #define IMX8QM_ENET1_RGMII_TXD1_CONN_ENET1_RGMII_TXD1 IMX8QM_ENET1_RGMII_TXD1 0 927 #define IMX8QM_ENET1_RGMII_TXD1_LSIO_GPIO6_IO1 927 #define IMX8QM_ENET1_RGMII_TXD1_LSIO_GPIO6_IO13 IMX8QM_ENET1_RGMII_TXD1 3 928 #define IMX8QM_ENET1_RGMII_TXD2_CONN_ENET1_RGM 928 #define IMX8QM_ENET1_RGMII_TXD2_CONN_ENET1_RGMII_TXD2 IMX8QM_ENET1_RGMII_TXD2 0 929 #define IMX8QM_ENET1_RGMII_TXD2_DMA_UART3_TX 929 #define IMX8QM_ENET1_RGMII_TXD2_DMA_UART3_TX IMX8QM_ENET1_RGMII_TXD2 1 930 #define IMX8QM_ENET1_RGMII_TXD2_VPU_TSI_S1_VID 930 #define IMX8QM_ENET1_RGMII_TXD2_VPU_TSI_S1_VID IMX8QM_ENET1_RGMII_TXD2 2 931 #define IMX8QM_ENET1_RGMII_TXD2_LSIO_GPIO6_IO1 931 #define IMX8QM_ENET1_RGMII_TXD2_LSIO_GPIO6_IO14 IMX8QM_ENET1_RGMII_TXD2 3 932 #define IMX8QM_ENET1_RGMII_TXD3_CONN_ENET1_RGM 932 #define IMX8QM_ENET1_RGMII_TXD3_CONN_ENET1_RGMII_TXD3 IMX8QM_ENET1_RGMII_TXD3 0 933 #define IMX8QM_ENET1_RGMII_TXD3_DMA_UART3_RTS_ 933 #define IMX8QM_ENET1_RGMII_TXD3_DMA_UART3_RTS_B IMX8QM_ENET1_RGMII_TXD3 1 934 #define IMX8QM_ENET1_RGMII_TXD3_VPU_TSI_S1_SYN 934 #define IMX8QM_ENET1_RGMII_TXD3_VPU_TSI_S1_SYNC IMX8QM_ENET1_RGMII_TXD3 2 935 #define IMX8QM_ENET1_RGMII_TXD3_LSIO_GPIO6_IO1 935 #define IMX8QM_ENET1_RGMII_TXD3_LSIO_GPIO6_IO15 IMX8QM_ENET1_RGMII_TXD3 3 936 #define IMX8QM_ENET1_RGMII_RXC_CONN_ENET1_RGMI 936 #define IMX8QM_ENET1_RGMII_RXC_CONN_ENET1_RGMII_RXC IMX8QM_ENET1_RGMII_RXC 0 937 #define IMX8QM_ENET1_RGMII_RXC_DMA_UART3_CTS_B 937 #define IMX8QM_ENET1_RGMII_RXC_DMA_UART3_CTS_B IMX8QM_ENET1_RGMII_RXC 1 938 #define IMX8QM_ENET1_RGMII_RXC_VPU_TSI_S1_DATA 938 #define IMX8QM_ENET1_RGMII_RXC_VPU_TSI_S1_DATA IMX8QM_ENET1_RGMII_RXC 2 939 #define IMX8QM_ENET1_RGMII_RXC_LSIO_GPIO6_IO16 939 #define IMX8QM_ENET1_RGMII_RXC_LSIO_GPIO6_IO16 IMX8QM_ENET1_RGMII_RXC 3 940 #define IMX8QM_ENET1_RGMII_RX_CTL_CONN_ENET1_R 940 #define IMX8QM_ENET1_RGMII_RX_CTL_CONN_ENET1_RGMII_RX_CTL IMX8QM_ENET1_RGMII_RX_CTL 0 941 #define IMX8QM_ENET1_RGMII_RX_CTL_VPU_TSI_S0_V 941 #define IMX8QM_ENET1_RGMII_RX_CTL_VPU_TSI_S0_VID IMX8QM_ENET1_RGMII_RX_CTL 2 942 #define IMX8QM_ENET1_RGMII_RX_CTL_LSIO_GPIO6_I 942 #define IMX8QM_ENET1_RGMII_RX_CTL_LSIO_GPIO6_IO17 IMX8QM_ENET1_RGMII_RX_CTL 3 943 #define IMX8QM_ENET1_RGMII_RXD0_CONN_ENET1_RGM 943 #define IMX8QM_ENET1_RGMII_RXD0_CONN_ENET1_RGMII_RXD0 IMX8QM_ENET1_RGMII_RXD0 0 944 #define IMX8QM_ENET1_RGMII_RXD0_VPU_TSI_S0_SYN 944 #define IMX8QM_ENET1_RGMII_RXD0_VPU_TSI_S0_SYNC IMX8QM_ENET1_RGMII_RXD0 2 945 #define IMX8QM_ENET1_RGMII_RXD0_LSIO_GPIO6_IO1 945 #define IMX8QM_ENET1_RGMII_RXD0_LSIO_GPIO6_IO18 IMX8QM_ENET1_RGMII_RXD0 3 946 #define IMX8QM_ENET1_RGMII_RXD1_CONN_ENET1_RGM 946 #define IMX8QM_ENET1_RGMII_RXD1_CONN_ENET1_RGMII_RXD1 IMX8QM_ENET1_RGMII_RXD1 0 947 #define IMX8QM_ENET1_RGMII_RXD1_VPU_TSI_S0_DAT 947 #define IMX8QM_ENET1_RGMII_RXD1_VPU_TSI_S0_DATA IMX8QM_ENET1_RGMII_RXD1 2 948 #define IMX8QM_ENET1_RGMII_RXD1_LSIO_GPIO6_IO1 948 #define IMX8QM_ENET1_RGMII_RXD1_LSIO_GPIO6_IO19 IMX8QM_ENET1_RGMII_RXD1 3 949 #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RGM 949 #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RGMII_RXD2 IMX8QM_ENET1_RGMII_RXD2 0 950 #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RMI 950 #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RMII_RX_ER IMX8QM_ENET1_RGMII_RXD2 1 951 #define IMX8QM_ENET1_RGMII_RXD2_VPU_TSI_S0_CLK 951 #define IMX8QM_ENET1_RGMII_RXD2_VPU_TSI_S0_CLK IMX8QM_ENET1_RGMII_RXD2 2 952 #define IMX8QM_ENET1_RGMII_RXD2_LSIO_GPIO6_IO2 952 #define IMX8QM_ENET1_RGMII_RXD2_LSIO_GPIO6_IO20 IMX8QM_ENET1_RGMII_RXD2 3 953 #define IMX8QM_ENET1_RGMII_RXD3_CONN_ENET1_RGM 953 #define IMX8QM_ENET1_RGMII_RXD3_CONN_ENET1_RGMII_RXD3 IMX8QM_ENET1_RGMII_RXD3 0 954 #define IMX8QM_ENET1_RGMII_RXD3_DMA_UART3_RX 954 #define IMX8QM_ENET1_RGMII_RXD3_DMA_UART3_RX IMX8QM_ENET1_RGMII_RXD3 1 955 #define IMX8QM_ENET1_RGMII_RXD3_VPU_TSI_S1_CLK 955 #define IMX8QM_ENET1_RGMII_RXD3_VPU_TSI_S1_CLK IMX8QM_ENET1_RGMII_RXD3 2 956 #define IMX8QM_ENET1_RGMII_RXD3_LSIO_GPIO6_IO2 956 #define IMX8QM_ENET1_RGMII_RXD3_LSIO_GPIO6_IO21 IMX8QM_ENET1_RGMII_RXD3 3 957 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENET 957 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB 0 958 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENET 958 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA 0 959 959 960 #endif /* _IMX8QM_PADS_H */ 960 #endif /* _IMX8QM_PADS_H */ 961 961
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