1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) !! 1 /* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ 2 /* 2 /* 3 * Copyright (c) 2019 Amlogic, Inc. 3 * Copyright (c) 2019 Amlogic, Inc. 4 * Author: Jianxin Pan <jianxin.pan@amlogic.co 4 * Author: Jianxin Pan <jianxin.pan@amlogic.com> 5 */ 5 */ 6 6 7 #ifndef _DT_BINDINGS_MESON_A1_POWER_H 7 #ifndef _DT_BINDINGS_MESON_A1_POWER_H 8 #define _DT_BINDINGS_MESON_A1_POWER_H 8 #define _DT_BINDINGS_MESON_A1_POWER_H 9 9 10 #define PWRC_DSPA_ID 8 10 #define PWRC_DSPA_ID 8 11 #define PWRC_DSPB_ID 9 11 #define PWRC_DSPB_ID 9 12 #define PWRC_UART_ID 10 12 #define PWRC_UART_ID 10 13 #define PWRC_DMC_ID 11 13 #define PWRC_DMC_ID 11 14 #define PWRC_I2C_ID 12 14 #define PWRC_I2C_ID 12 15 #define PWRC_PSRAM_ID 13 15 #define PWRC_PSRAM_ID 13 16 #define PWRC_ACODEC_ID 14 16 #define PWRC_ACODEC_ID 14 17 #define PWRC_AUDIO_ID 15 17 #define PWRC_AUDIO_ID 15 18 #define PWRC_OTP_ID 16 18 #define PWRC_OTP_ID 16 19 #define PWRC_DMA_ID 17 19 #define PWRC_DMA_ID 17 20 #define PWRC_SD_EMMC_ID 18 20 #define PWRC_SD_EMMC_ID 18 21 #define PWRC_RAMA_ID 19 21 #define PWRC_RAMA_ID 19 22 #define PWRC_RAMB_ID 20 22 #define PWRC_RAMB_ID 20 23 #define PWRC_IR_ID 21 23 #define PWRC_IR_ID 21 24 #define PWRC_SPICC_ID 22 24 #define PWRC_SPICC_ID 22 25 #define PWRC_SPIFC_ID 23 25 #define PWRC_SPIFC_ID 23 26 #define PWRC_USB_ID 24 26 #define PWRC_USB_ID 24 27 #define PWRC_NIC_ID 25 27 #define PWRC_NIC_ID 25 28 #define PWRC_PDMIN_ID 26 28 #define PWRC_PDMIN_ID 26 29 #define PWRC_RSA_ID 27 29 #define PWRC_RSA_ID 27 30 #define PWRC_MAX_ID 28 30 #define PWRC_MAX_ID 28 31 31 32 #endif 32 #endif 33 33
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