1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 2 /* 3 * Copyright (c) 2017 MediaTek Inc. 3 * Copyright (c) 2017 MediaTek Inc. 4 * Author: Mars.C <mars.cheng@mediatek.com> 4 * Author: Mars.C <mars.cheng@mediatek.com> 5 */ 5 */ 6 6 7 #ifndef _DT_BINDINGS_POWER_MT6797_POWER_H 7 #ifndef _DT_BINDINGS_POWER_MT6797_POWER_H 8 #define _DT_BINDINGS_POWER_MT6797_POWER_H 8 #define _DT_BINDINGS_POWER_MT6797_POWER_H 9 9 10 #define MT6797_POWER_DOMAIN_VDEC 10 #define MT6797_POWER_DOMAIN_VDEC 0 11 #define MT6797_POWER_DOMAIN_VENC 11 #define MT6797_POWER_DOMAIN_VENC 1 12 #define MT6797_POWER_DOMAIN_ISP 2 12 #define MT6797_POWER_DOMAIN_ISP 2 13 #define MT6797_POWER_DOMAIN_MM 13 #define MT6797_POWER_DOMAIN_MM 3 14 #define MT6797_POWER_DOMAIN_AUDIO 14 #define MT6797_POWER_DOMAIN_AUDIO 4 15 #define MT6797_POWER_DOMAIN_MFG_ASYNC 15 #define MT6797_POWER_DOMAIN_MFG_ASYNC 5 16 #define MT6797_POWER_DOMAIN_MFG 6 16 #define MT6797_POWER_DOMAIN_MFG 6 17 #define MT6797_POWER_DOMAIN_MFG_CORE0 17 #define MT6797_POWER_DOMAIN_MFG_CORE0 7 18 #define MT6797_POWER_DOMAIN_MFG_CORE1 18 #define MT6797_POWER_DOMAIN_MFG_CORE1 8 19 #define MT6797_POWER_DOMAIN_MFG_CORE2 19 #define MT6797_POWER_DOMAIN_MFG_CORE2 9 20 #define MT6797_POWER_DOMAIN_MFG_CORE3 20 #define MT6797_POWER_DOMAIN_MFG_CORE3 10 21 #define MT6797_POWER_DOMAIN_MJC 11 21 #define MT6797_POWER_DOMAIN_MJC 11 22 22 23 #endif /* _DT_BINDINGS_POWER_MT6797_POWER_H */ 23 #endif /* _DT_BINDINGS_POWER_MT6797_POWER_H */ 24 24
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