1 /* SPDX-License-Identifier: GPL-2.0 1 /* SPDX-License-Identifier: GPL-2.0 2 * 2 * 3 * Copyright (C) 2020 Renesas Electronics Corp 3 * Copyright (C) 2020 Renesas Electronics Corp. 4 */ 4 */ 5 #ifndef __DT_BINDINGS_POWER_R8A7742_SYSC_H__ 5 #ifndef __DT_BINDINGS_POWER_R8A7742_SYSC_H__ 6 #define __DT_BINDINGS_POWER_R8A7742_SYSC_H__ 6 #define __DT_BINDINGS_POWER_R8A7742_SYSC_H__ 7 7 8 /* 8 /* 9 * These power domain indices match the number 9 * These power domain indices match the numbers of the interrupt bits 10 * representing the power areas in the various 10 * representing the power areas in the various Interrupt Registers 11 * (e.g. SYSCISR, Interrupt Status Register) 11 * (e.g. SYSCISR, Interrupt Status Register) 12 */ 12 */ 13 13 14 #define R8A7742_PD_CA15_CPU0 0 14 #define R8A7742_PD_CA15_CPU0 0 15 #define R8A7742_PD_CA15_CPU1 1 15 #define R8A7742_PD_CA15_CPU1 1 16 #define R8A7742_PD_CA15_CPU2 2 16 #define R8A7742_PD_CA15_CPU2 2 17 #define R8A7742_PD_CA15_CPU3 3 17 #define R8A7742_PD_CA15_CPU3 3 18 #define R8A7742_PD_CA7_CPU0 5 18 #define R8A7742_PD_CA7_CPU0 5 19 #define R8A7742_PD_CA7_CPU1 6 19 #define R8A7742_PD_CA7_CPU1 6 20 #define R8A7742_PD_CA7_CPU2 7 20 #define R8A7742_PD_CA7_CPU2 7 21 #define R8A7742_PD_CA7_CPU3 8 21 #define R8A7742_PD_CA7_CPU3 8 22 #define R8A7742_PD_CA15_SCU 12 22 #define R8A7742_PD_CA15_SCU 12 23 #define R8A7742_PD_RGX 20 23 #define R8A7742_PD_RGX 20 24 #define R8A7742_PD_CA7_SCU 21 24 #define R8A7742_PD_CA7_SCU 21 25 25 26 /* Always-on power area */ 26 /* Always-on power area */ 27 #define R8A7742_PD_ALWAYS_ON 32 27 #define R8A7742_PD_ALWAYS_ON 32 28 28 29 #endif /* __DT_BINDINGS_POWER_R8A7742_SYSC_H__ 29 #endif /* __DT_BINDINGS_POWER_R8A7742_SYSC_H__ */ 30 30
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