1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * Copyright (C) 2016 Glider bvba 2 * Copyright (C) 2016 Glider bvba
>> 3 *
>> 4 * This program is free software; you can redistribute it and/or modify
>> 5 * it under the terms of the GNU General Public License as published by
>> 6 * the Free Software Foundation; version 2 of the License.
4 */ 7 */
5 #ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__ 8 #ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__
6 #define __DT_BINDINGS_POWER_R8A7795_SYSC_H__ 9 #define __DT_BINDINGS_POWER_R8A7795_SYSC_H__
7 10
8 /* 11 /*
9 * These power domain indices match the number 12 * These power domain indices match the numbers of the interrupt bits
10 * representing the power areas in the various 13 * representing the power areas in the various Interrupt Registers
11 * (e.g. SYSCISR, Interrupt Status Register) 14 * (e.g. SYSCISR, Interrupt Status Register)
12 */ 15 */
13 16
14 #define R8A7795_PD_CA57_CPU0 0 17 #define R8A7795_PD_CA57_CPU0 0
15 #define R8A7795_PD_CA57_CPU1 1 18 #define R8A7795_PD_CA57_CPU1 1
16 #define R8A7795_PD_CA57_CPU2 2 19 #define R8A7795_PD_CA57_CPU2 2
17 #define R8A7795_PD_CA57_CPU3 3 20 #define R8A7795_PD_CA57_CPU3 3
18 #define R8A7795_PD_CA53_CPU0 5 21 #define R8A7795_PD_CA53_CPU0 5
19 #define R8A7795_PD_CA53_CPU1 6 22 #define R8A7795_PD_CA53_CPU1 6
20 #define R8A7795_PD_CA53_CPU2 7 23 #define R8A7795_PD_CA53_CPU2 7
21 #define R8A7795_PD_CA53_CPU3 8 24 #define R8A7795_PD_CA53_CPU3 8
22 #define R8A7795_PD_A3VP 9 25 #define R8A7795_PD_A3VP 9
23 #define R8A7795_PD_CA57_SCU 12 26 #define R8A7795_PD_CA57_SCU 12
24 #define R8A7795_PD_CR7 13 27 #define R8A7795_PD_CR7 13
25 #define R8A7795_PD_A3VC 14 28 #define R8A7795_PD_A3VC 14
26 #define R8A7795_PD_3DG_A 17 29 #define R8A7795_PD_3DG_A 17
27 #define R8A7795_PD_3DG_B 18 30 #define R8A7795_PD_3DG_B 18
28 #define R8A7795_PD_3DG_C 19 31 #define R8A7795_PD_3DG_C 19
29 #define R8A7795_PD_3DG_D 20 32 #define R8A7795_PD_3DG_D 20
30 #define R8A7795_PD_CA53_SCU 21 33 #define R8A7795_PD_CA53_SCU 21
31 #define R8A7795_PD_3DG_E 22 34 #define R8A7795_PD_3DG_E 22
32 #define R8A7795_PD_A3IR 24 35 #define R8A7795_PD_A3IR 24
>> 36 #define R8A7795_PD_A2VC0 25 /* ES1.x only */
33 #define R8A7795_PD_A2VC1 26 37 #define R8A7795_PD_A2VC1 26
34 38
35 /* Always-on power area */ 39 /* Always-on power area */
36 #define R8A7795_PD_ALWAYS_ON 32 40 #define R8A7795_PD_ALWAYS_ON 32
37 41
38 #endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ 42 #endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ */
39 43
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