1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* 2 /*
3 * Copyright (C) 2018 Jacopo Mondi <jacopo+ren 3 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
4 * Copyright (C) 2016 Glider bvba 4 * Copyright (C) 2016 Glider bvba
5 */ 5 */
6 6
7 #ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__ 7 #ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__
8 #define __DT_BINDINGS_POWER_R8A77965_SYSC_H__ 8 #define __DT_BINDINGS_POWER_R8A77965_SYSC_H__
9 9
10 /* 10 /*
11 * These power domain indices match the number 11 * These power domain indices match the numbers of the interrupt bits
12 * representing the power areas in the various 12 * representing the power areas in the various Interrupt Registers
13 * (e.g. SYSCISR, Interrupt Status Register) 13 * (e.g. SYSCISR, Interrupt Status Register)
14 */ 14 */
15 15
16 #define R8A77965_PD_CA57_CPU0 0 16 #define R8A77965_PD_CA57_CPU0 0
17 #define R8A77965_PD_CA57_CPU1 1 17 #define R8A77965_PD_CA57_CPU1 1
18 #define R8A77965_PD_A3VP 9 18 #define R8A77965_PD_A3VP 9
19 #define R8A77965_PD_CA57_SCU 12 19 #define R8A77965_PD_CA57_SCU 12
20 #define R8A77965_PD_CR7 13 20 #define R8A77965_PD_CR7 13
21 #define R8A77965_PD_A3VC 14 21 #define R8A77965_PD_A3VC 14
22 #define R8A77965_PD_3DG_A 17 22 #define R8A77965_PD_3DG_A 17
23 #define R8A77965_PD_3DG_B 18 23 #define R8A77965_PD_3DG_B 18
>> 24 #define R8A77965_PD_A3IR 24
24 #define R8A77965_PD_A2VC1 26 25 #define R8A77965_PD_A2VC1 26
25 26
26 /* Always-on power area */ 27 /* Always-on power area */
27 #define R8A77965_PD_ALWAYS_ON 32 28 #define R8A77965_PD_ALWAYS_ON 32
28 29
29 #endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H_ 30 #endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */
30 31
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