1 /* SPDX-License-Identifier: (GPL-2.0-only OR B 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 2 /* 3 * Copyright (C) 2023 Renesas Electronics Corp 3 * Copyright (C) 2023 Renesas Electronics Corp. 4 */ 4 */ 5 #ifndef __DT_BINDINGS_POWER_RENESAS_R8A779H0_S 5 #ifndef __DT_BINDINGS_POWER_RENESAS_R8A779H0_SYSC_H__ 6 #define __DT_BINDINGS_POWER_RENESAS_R8A779H0_S 6 #define __DT_BINDINGS_POWER_RENESAS_R8A779H0_SYSC_H__ 7 7 8 /* 8 /* 9 * These power domain indices match the Power 9 * These power domain indices match the Power Domain Register Numbers (PDR) 10 */ 10 */ 11 11 12 #define R8A779H0_PD_A1E0D0C0 0 12 #define R8A779H0_PD_A1E0D0C0 0 13 #define R8A779H0_PD_A1E0D0C1 1 13 #define R8A779H0_PD_A1E0D0C1 1 14 #define R8A779H0_PD_A1E0D0C2 2 14 #define R8A779H0_PD_A1E0D0C2 2 15 #define R8A779H0_PD_A1E0D0C3 3 15 #define R8A779H0_PD_A1E0D0C3 3 16 #define R8A779H0_PD_A2E0D0 16 16 #define R8A779H0_PD_A2E0D0 16 17 #define R8A779H0_PD_A3CR0 21 17 #define R8A779H0_PD_A3CR0 21 18 #define R8A779H0_PD_A3CR1 22 18 #define R8A779H0_PD_A3CR1 22 19 #define R8A779H0_PD_A3CR2 23 19 #define R8A779H0_PD_A3CR2 23 20 #define R8A779H0_PD_A33DGA 24 20 #define R8A779H0_PD_A33DGA 24 21 #define R8A779H0_PD_A23DGB 25 21 #define R8A779H0_PD_A23DGB 25 22 #define R8A779H0_PD_C4 31 22 #define R8A779H0_PD_C4 31 23 #define R8A779H0_PD_A1DSP0 33 23 #define R8A779H0_PD_A1DSP0 33 24 #define R8A779H0_PD_A2IMP01 34 24 #define R8A779H0_PD_A2IMP01 34 25 #define R8A779H0_PD_A2PSC 35 25 #define R8A779H0_PD_A2PSC 35 26 #define R8A779H0_PD_A2CV0 36 26 #define R8A779H0_PD_A2CV0 36 27 #define R8A779H0_PD_A2CV1 37 27 #define R8A779H0_PD_A2CV1 37 28 #define R8A779H0_PD_A3IMR0 38 28 #define R8A779H0_PD_A3IMR0 38 29 #define R8A779H0_PD_A3IMR1 39 29 #define R8A779H0_PD_A3IMR1 39 30 #define R8A779H0_PD_A3VC 40 30 #define R8A779H0_PD_A3VC 40 31 #define R8A779H0_PD_A2CN0 42 31 #define R8A779H0_PD_A2CN0 42 32 #define R8A779H0_PD_A1CN0 44 32 #define R8A779H0_PD_A1CN0 44 33 #define R8A779H0_PD_A1DSP1 45 33 #define R8A779H0_PD_A1DSP1 45 34 #define R8A779H0_PD_A2DMA 47 34 #define R8A779H0_PD_A2DMA 47 35 #define R8A779H0_PD_A2CV2 48 35 #define R8A779H0_PD_A2CV2 48 36 #define R8A779H0_PD_A2CV3 49 36 #define R8A779H0_PD_A2CV3 49 37 #define R8A779H0_PD_A3IMR2 50 37 #define R8A779H0_PD_A3IMR2 50 38 #define R8A779H0_PD_A3IMR3 51 38 #define R8A779H0_PD_A3IMR3 51 39 #define R8A779H0_PD_A3PCI 52 39 #define R8A779H0_PD_A3PCI 52 40 #define R8A779H0_PD_A2PCIPHY 53 40 #define R8A779H0_PD_A2PCIPHY 53 41 #define R8A779H0_PD_A3VIP0 56 41 #define R8A779H0_PD_A3VIP0 56 42 #define R8A779H0_PD_A3VIP2 58 42 #define R8A779H0_PD_A3VIP2 58 43 #define R8A779H0_PD_A3ISP0 60 43 #define R8A779H0_PD_A3ISP0 60 44 #define R8A779H0_PD_A3DUL 62 44 #define R8A779H0_PD_A3DUL 62 45 45 46 /* Always-on power area */ 46 /* Always-on power area */ 47 #define R8A779H0_PD_ALWAYS_ON 64 47 #define R8A779H0_PD_ALWAYS_ON 64 48 48 49 #endif /* __DT_BINDINGS_POWER_RENESAS_R8A779H0 49 #endif /* __DT_BINDINGS_POWER_RENESAS_R8A779H0_SYSC_H__ */ 50 50
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