1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * Copyright (c) 2015-2016, NVIDIA CORPORATION 2 * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
>> 3 *
>> 4 * This program is free software; you can redistribute it and/or modify it
>> 5 * under the terms and conditions of the GNU General Public License,
>> 6 * version 2, as published by the Free Software Foundation.
>> 7 *
>> 8 * This program is distributed in the hope it will be useful, but WITHOUT
>> 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
>> 11 * more details.
>> 12 *
>> 13 * You should have received a copy of the GNU General Public License
>> 14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
4 */ 15 */
5 16
6 #ifndef _DT_BINDINGS_POWER_TEGRA186_POWERGATE_ 17 #ifndef _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
7 #define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_ 18 #define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
8 19
9 #define TEGRA186_POWER_DOMAIN_AUD 0 20 #define TEGRA186_POWER_DOMAIN_AUD 0
10 #define TEGRA186_POWER_DOMAIN_DFD 1 21 #define TEGRA186_POWER_DOMAIN_DFD 1
11 #define TEGRA186_POWER_DOMAIN_DISP 2 22 #define TEGRA186_POWER_DOMAIN_DISP 2
12 #define TEGRA186_POWER_DOMAIN_DISPB 3 23 #define TEGRA186_POWER_DOMAIN_DISPB 3
13 #define TEGRA186_POWER_DOMAIN_DISPC 4 24 #define TEGRA186_POWER_DOMAIN_DISPC 4
14 #define TEGRA186_POWER_DOMAIN_ISPA 5 25 #define TEGRA186_POWER_DOMAIN_ISPA 5
15 #define TEGRA186_POWER_DOMAIN_NVDEC 6 26 #define TEGRA186_POWER_DOMAIN_NVDEC 6
16 #define TEGRA186_POWER_DOMAIN_NVJPG 7 27 #define TEGRA186_POWER_DOMAIN_NVJPG 7
17 #define TEGRA186_POWER_DOMAIN_MPE 8 28 #define TEGRA186_POWER_DOMAIN_MPE 8
18 #define TEGRA186_POWER_DOMAIN_PCX 9 29 #define TEGRA186_POWER_DOMAIN_PCX 9
19 #define TEGRA186_POWER_DOMAIN_SAX 10 30 #define TEGRA186_POWER_DOMAIN_SAX 10
20 #define TEGRA186_POWER_DOMAIN_VE 11 31 #define TEGRA186_POWER_DOMAIN_VE 11
21 #define TEGRA186_POWER_DOMAIN_VIC 12 32 #define TEGRA186_POWER_DOMAIN_VIC 12
22 #define TEGRA186_POWER_DOMAIN_XUSBA 13 33 #define TEGRA186_POWER_DOMAIN_XUSBA 13
23 #define TEGRA186_POWER_DOMAIN_XUSBB 14 34 #define TEGRA186_POWER_DOMAIN_XUSBB 14
24 #define TEGRA186_POWER_DOMAIN_XUSBC 15 35 #define TEGRA186_POWER_DOMAIN_XUSBC 15
25 #define TEGRA186_POWER_DOMAIN_GPU 43 36 #define TEGRA186_POWER_DOMAIN_GPU 43
26 #define TEGRA186_POWER_DOMAIN_MAX 44 37 #define TEGRA186_POWER_DOMAIN_MAX 44
27 38
28 #endif 39 #endif
29 40
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