1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, NVIDIA CORPORATION. All 2 /* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. */ 3 3 4 #ifndef __ABI_MACH_T194_POWERGATE_T194_H_ 4 #ifndef __ABI_MACH_T194_POWERGATE_T194_H_ 5 #define __ABI_MACH_T194_POWERGATE_T194_H_ 5 #define __ABI_MACH_T194_POWERGATE_T194_H_ 6 6 7 #define TEGRA194_POWER_DOMAIN_AUD 1 7 #define TEGRA194_POWER_DOMAIN_AUD 1 8 #define TEGRA194_POWER_DOMAIN_DISP 2 8 #define TEGRA194_POWER_DOMAIN_DISP 2 9 #define TEGRA194_POWER_DOMAIN_DISPB 3 9 #define TEGRA194_POWER_DOMAIN_DISPB 3 10 #define TEGRA194_POWER_DOMAIN_DISPC 4 10 #define TEGRA194_POWER_DOMAIN_DISPC 4 11 #define TEGRA194_POWER_DOMAIN_ISPA 5 11 #define TEGRA194_POWER_DOMAIN_ISPA 5 12 #define TEGRA194_POWER_DOMAIN_NVDECA 6 12 #define TEGRA194_POWER_DOMAIN_NVDECA 6 13 #define TEGRA194_POWER_DOMAIN_NVJPG 7 13 #define TEGRA194_POWER_DOMAIN_NVJPG 7 14 #define TEGRA194_POWER_DOMAIN_NVENCA 8 14 #define TEGRA194_POWER_DOMAIN_NVENCA 8 15 #define TEGRA194_POWER_DOMAIN_NVENCB 9 15 #define TEGRA194_POWER_DOMAIN_NVENCB 9 16 #define TEGRA194_POWER_DOMAIN_NVDECB 10 16 #define TEGRA194_POWER_DOMAIN_NVDECB 10 17 #define TEGRA194_POWER_DOMAIN_SAX 11 17 #define TEGRA194_POWER_DOMAIN_SAX 11 18 #define TEGRA194_POWER_DOMAIN_VE 12 18 #define TEGRA194_POWER_DOMAIN_VE 12 19 #define TEGRA194_POWER_DOMAIN_VIC 13 19 #define TEGRA194_POWER_DOMAIN_VIC 13 20 #define TEGRA194_POWER_DOMAIN_XUSBA 14 20 #define TEGRA194_POWER_DOMAIN_XUSBA 14 21 #define TEGRA194_POWER_DOMAIN_XUSBB 15 21 #define TEGRA194_POWER_DOMAIN_XUSBB 15 22 #define TEGRA194_POWER_DOMAIN_XUSBC 16 22 #define TEGRA194_POWER_DOMAIN_XUSBC 16 23 #define TEGRA194_POWER_DOMAIN_PCIEX8A 17 23 #define TEGRA194_POWER_DOMAIN_PCIEX8A 17 24 #define TEGRA194_POWER_DOMAIN_PCIEX4A 18 24 #define TEGRA194_POWER_DOMAIN_PCIEX4A 18 25 #define TEGRA194_POWER_DOMAIN_PCIEX1A 19 25 #define TEGRA194_POWER_DOMAIN_PCIEX1A 19 26 #define TEGRA194_POWER_DOMAIN_PCIEX8B 21 26 #define TEGRA194_POWER_DOMAIN_PCIEX8B 21 27 #define TEGRA194_POWER_DOMAIN_PVAA 22 27 #define TEGRA194_POWER_DOMAIN_PVAA 22 28 #define TEGRA194_POWER_DOMAIN_PVAB 23 28 #define TEGRA194_POWER_DOMAIN_PVAB 23 29 #define TEGRA194_POWER_DOMAIN_DLAA 24 29 #define TEGRA194_POWER_DOMAIN_DLAA 24 30 #define TEGRA194_POWER_DOMAIN_DLAB 25 30 #define TEGRA194_POWER_DOMAIN_DLAB 25 31 #define TEGRA194_POWER_DOMAIN_CV 26 31 #define TEGRA194_POWER_DOMAIN_CV 26 32 #define TEGRA194_POWER_DOMAIN_GPU 27 32 #define TEGRA194_POWER_DOMAIN_GPU 27 33 #define TEGRA194_POWER_DOMAIN_MAX 27 33 #define TEGRA194_POWER_DOMAIN_MAX 27 34 34 35 #endif 35 #endif 36 36
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