1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 2 /* 3 * Copyright Intel Corporation (C) 2017. All 3 * Copyright Intel Corporation (C) 2017. All Rights Reserved 4 * 4 * 5 * Reset binding definitions for Altera Arria1 5 * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip 6 * 6 * 7 * Adapted from altr,rst-mgr-a10.h 7 * Adapted from altr,rst-mgr-a10.h 8 */ 8 */ 9 9 10 #ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_ 10 #ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H 11 #define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_ 11 #define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H 12 12 13 /* Peripheral PHY resets */ 13 /* Peripheral PHY resets */ 14 #define A10SR_RESET_ENET_HPS 0 14 #define A10SR_RESET_ENET_HPS 0 15 #define A10SR_RESET_PCIE 1 15 #define A10SR_RESET_PCIE 1 16 #define A10SR_RESET_FILE 2 16 #define A10SR_RESET_FILE 2 17 #define A10SR_RESET_BQSPI 3 17 #define A10SR_RESET_BQSPI 3 18 #define A10SR_RESET_USB 4 18 #define A10SR_RESET_USB 4 19 19 20 #define A10SR_RESET_NUM 5 20 #define A10SR_RESET_NUM 5 21 21 22 #endif 22 #endif 23 23
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