1 /* 1 2 * Copyright (c) 2017 Martin Blumenstingl <mar 3 * 4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 */ 6 7 #ifndef _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESE 8 #define _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESE 9 10 #define CLKC_RESET_L2_CACHE_SOFT_RESET 11 #define CLKC_RESET_AXI_64_TO_128_BRIDGE_A5_SOF 12 #define CLKC_RESET_SCU_SOFT_RESET 13 #define CLKC_RESET_CPU0_SOFT_RESET 14 #define CLKC_RESET_CPU1_SOFT_RESET 15 #define CLKC_RESET_CPU2_SOFT_RESET 16 #define CLKC_RESET_CPU3_SOFT_RESET 17 #define CLKC_RESET_A5_GLOBAL_RESET 18 #define CLKC_RESET_A5_AXI_SOFT_RESET 19 #define CLKC_RESET_A5_ABP_SOFT_RESET 20 #define CLKC_RESET_AXI_64_TO_128_BRIDGE_MMC_SO 21 #define CLKC_RESET_VID_CLK_CNTL_SOFT_RESET 22 #define CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET 23 #define CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET 24 #define CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_PO 25 #define CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_PR 26 27 #endif /* _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RE 28
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