1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 2 /* 3 * Copyright (C) 2016 Neil Armstrong <narmstro 3 * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com> 4 */ 4 */ 5 5 6 #ifndef DT_RESET_OXSEMI_OX810SE_H 6 #ifndef DT_RESET_OXSEMI_OX810SE_H 7 #define DT_RESET_OXSEMI_OX810SE_H 7 #define DT_RESET_OXSEMI_OX810SE_H 8 8 9 #define RESET_ARM 0 9 #define RESET_ARM 0 10 #define RESET_COPRO 1 10 #define RESET_COPRO 1 11 /* Reserved 2 */ 11 /* Reserved 2 */ 12 /* Reserved 3 */ 12 /* Reserved 3 */ 13 #define RESET_USBHS 4 13 #define RESET_USBHS 4 14 #define RESET_USBHSPHY 5 14 #define RESET_USBHSPHY 5 15 #define RESET_MAC 6 15 #define RESET_MAC 6 16 #define RESET_PCI 7 16 #define RESET_PCI 7 17 #define RESET_DMA 8 17 #define RESET_DMA 8 18 #define RESET_DPE 9 18 #define RESET_DPE 9 19 #define RESET_DDR 10 19 #define RESET_DDR 10 20 #define RESET_SATA 11 20 #define RESET_SATA 11 21 #define RESET_SATA_LINK 12 21 #define RESET_SATA_LINK 12 22 #define RESET_SATA_PHY 13 22 #define RESET_SATA_PHY 13 23 /* Reserved 14 */ 23 /* Reserved 14 */ 24 #define RESET_NAND 15 24 #define RESET_NAND 15 25 #define RESET_GPIO 16 25 #define RESET_GPIO 16 26 #define RESET_UART1 17 26 #define RESET_UART1 17 27 #define RESET_UART2 18 27 #define RESET_UART2 18 28 #define RESET_MISC 19 28 #define RESET_MISC 19 29 #define RESET_I2S 20 29 #define RESET_I2S 20 30 #define RESET_AHB_MON 21 30 #define RESET_AHB_MON 21 31 #define RESET_UART3 22 31 #define RESET_UART3 22 32 #define RESET_UART4 23 32 #define RESET_UART4 23 33 #define RESET_SGDMA 24 33 #define RESET_SGDMA 24 34 /* Reserved 25 */ 34 /* Reserved 25 */ 35 /* Reserved 26 */ 35 /* Reserved 26 */ 36 /* Reserved 27 */ 36 /* Reserved 27 */ 37 /* Reserved 28 */ 37 /* Reserved 28 */ 38 /* Reserved 29 */ 38 /* Reserved 29 */ 39 /* Reserved 30 */ 39 /* Reserved 30 */ 40 #define RESET_BUS 31 40 #define RESET_BUS 31 41 41 42 #endif /* DT_RESET_OXSEMI_OX810SE_H */ 42 #endif /* DT_RESET_OXSEMI_OX810SE_H */ 43 43
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