1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * Copyright (C) 2016 Neil Armstrong <narmstro 2 * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
>> 3 *
>> 4 * This program is free software; you can redistribute it and/or modify it
>> 5 * under the terms and conditions of the GNU General Public License,
>> 6 * version 2, as published by the Free Software Foundation.
>> 7 *
>> 8 * This program is distributed in the hope it will be useful, but WITHOUT
>> 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
>> 11 * more details.
>> 12 *
>> 13 * You should have received a copy of the GNU General Public License
>> 14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
4 */ 15 */
5 16
6 #ifndef DT_RESET_OXSEMI_OX820_H 17 #ifndef DT_RESET_OXSEMI_OX820_H
7 #define DT_RESET_OXSEMI_OX820_H 18 #define DT_RESET_OXSEMI_OX820_H
8 19
9 #define RESET_SCU 0 20 #define RESET_SCU 0
10 #define RESET_LEON 1 21 #define RESET_LEON 1
11 #define RESET_ARM0 2 22 #define RESET_ARM0 2
12 #define RESET_ARM1 3 23 #define RESET_ARM1 3
13 #define RESET_USBHS 4 24 #define RESET_USBHS 4
14 #define RESET_USBPHYA 5 25 #define RESET_USBPHYA 5
15 #define RESET_MAC 6 26 #define RESET_MAC 6
16 #define RESET_PCIEA 7 27 #define RESET_PCIEA 7
17 #define RESET_SGDMA 8 28 #define RESET_SGDMA 8
18 #define RESET_CIPHER 9 29 #define RESET_CIPHER 9
19 #define RESET_DDR 10 30 #define RESET_DDR 10
20 #define RESET_SATA 11 31 #define RESET_SATA 11
21 #define RESET_SATA_LINK 12 32 #define RESET_SATA_LINK 12
22 #define RESET_SATA_PHY 13 33 #define RESET_SATA_PHY 13
23 #define RESET_PCIEPHY 14 34 #define RESET_PCIEPHY 14
24 #define RESET_NAND 15 35 #define RESET_NAND 15
25 #define RESET_GPIO 16 36 #define RESET_GPIO 16
26 #define RESET_UART1 17 37 #define RESET_UART1 17
27 #define RESET_UART2 18 38 #define RESET_UART2 18
28 #define RESET_MISC 19 39 #define RESET_MISC 19
29 #define RESET_I2S 20 40 #define RESET_I2S 20
30 #define RESET_SD 21 41 #define RESET_SD 21
31 #define RESET_MAC_2 22 42 #define RESET_MAC_2 22
32 #define RESET_PCIEB 23 43 #define RESET_PCIEB 23
33 #define RESET_VIDEO 24 44 #define RESET_VIDEO 24
34 #define RESET_DDR_PHY 25 45 #define RESET_DDR_PHY 25
35 #define RESET_USBPHYB 26 46 #define RESET_USBPHYB 26
36 #define RESET_USBDEV 27 47 #define RESET_USBDEV 27
37 /* Reserved 29 */ 48 /* Reserved 29 */
38 #define RESET_ARMDBG 29 49 #define RESET_ARMDBG 29
39 #define RESET_PLLA 30 50 #define RESET_PLLA 30
40 #define RESET_PLLB 31 51 #define RESET_PLLB 31
41 52
42 #endif /* DT_RESET_OXSEMI_OX820_H */ 53 #endif /* DT_RESET_OXSEMI_OX820_H */
43 54
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