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TOMOYO Linux Cross Reference
Linux/include/dt-bindings/reset/qcom,gcc-msm8974.h

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Diff markup

Differences between /include/dt-bindings/reset/qcom,gcc-msm8974.h (Version linux-6.12-rc7) and /include/dt-bindings/reset/qcom,gcc-msm8974.h (Version linux-4.12.14)


  1 /* SPDX-License-Identifier: GPL-2.0-only */    << 
  2 /*                                                  1 /*
  3  * Copyright (c) 2013, The Linux Foundation. A      2  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
                                                   >>   3  *
                                                   >>   4  * This software is licensed under the terms of the GNU General Public
                                                   >>   5  * License version 2, as published by the Free Software Foundation, and
                                                   >>   6  * may be copied, distributed, and modified under those terms.
                                                   >>   7  *
                                                   >>   8  * This program is distributed in the hope that it will be useful,
                                                   >>   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
                                                   >>  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                                                   >>  11  * GNU General Public License for more details.
  4  */                                                12  */
  5                                                    13 
  6 #ifndef _DT_BINDINGS_RESET_MSM_GCC_8974_H          14 #ifndef _DT_BINDINGS_RESET_MSM_GCC_8974_H
  7 #define _DT_BINDINGS_RESET_MSM_GCC_8974_H          15 #define _DT_BINDINGS_RESET_MSM_GCC_8974_H
  8                                                    16 
  9 #define GCC_SYSTEM_NOC_BCR                         17 #define GCC_SYSTEM_NOC_BCR                      0
 10 #define GCC_CONFIG_NOC_BCR                         18 #define GCC_CONFIG_NOC_BCR                      1
 11 #define GCC_PERIPH_NOC_BCR                         19 #define GCC_PERIPH_NOC_BCR                      2
 12 #define GCC_IMEM_BCR                               20 #define GCC_IMEM_BCR                            3
 13 #define GCC_MMSS_BCR                               21 #define GCC_MMSS_BCR                            4
 14 #define GCC_QDSS_BCR                               22 #define GCC_QDSS_BCR                            5
 15 #define GCC_USB_30_BCR                             23 #define GCC_USB_30_BCR                          6
 16 #define GCC_USB3_PHY_BCR                           24 #define GCC_USB3_PHY_BCR                        7
 17 #define GCC_USB_HS_HSIC_BCR                        25 #define GCC_USB_HS_HSIC_BCR                     8
 18 #define GCC_USB_HS_BCR                             26 #define GCC_USB_HS_BCR                          9
 19 #define GCC_USB2A_PHY_BCR                          27 #define GCC_USB2A_PHY_BCR                       10
 20 #define GCC_USB2B_PHY_BCR                          28 #define GCC_USB2B_PHY_BCR                       11
 21 #define GCC_SDCC1_BCR                              29 #define GCC_SDCC1_BCR                           12
 22 #define GCC_SDCC2_BCR                              30 #define GCC_SDCC2_BCR                           13
 23 #define GCC_SDCC3_BCR                              31 #define GCC_SDCC3_BCR                           14
 24 #define GCC_SDCC4_BCR                              32 #define GCC_SDCC4_BCR                           15
 25 #define GCC_BLSP1_BCR                              33 #define GCC_BLSP1_BCR                           16
 26 #define GCC_BLSP1_QUP1_BCR                         34 #define GCC_BLSP1_QUP1_BCR                      17
 27 #define GCC_BLSP1_UART1_BCR                        35 #define GCC_BLSP1_UART1_BCR                     18
 28 #define GCC_BLSP1_QUP2_BCR                         36 #define GCC_BLSP1_QUP2_BCR                      19
 29 #define GCC_BLSP1_UART2_BCR                        37 #define GCC_BLSP1_UART2_BCR                     20
 30 #define GCC_BLSP1_QUP3_BCR                         38 #define GCC_BLSP1_QUP3_BCR                      21
 31 #define GCC_BLSP1_UART3_BCR                        39 #define GCC_BLSP1_UART3_BCR                     22
 32 #define GCC_BLSP1_QUP4_BCR                         40 #define GCC_BLSP1_QUP4_BCR                      23
 33 #define GCC_BLSP1_UART4_BCR                        41 #define GCC_BLSP1_UART4_BCR                     24
 34 #define GCC_BLSP1_QUP5_BCR                         42 #define GCC_BLSP1_QUP5_BCR                      25
 35 #define GCC_BLSP1_UART5_BCR                        43 #define GCC_BLSP1_UART5_BCR                     26
 36 #define GCC_BLSP1_QUP6_BCR                         44 #define GCC_BLSP1_QUP6_BCR                      27
 37 #define GCC_BLSP1_UART6_BCR                        45 #define GCC_BLSP1_UART6_BCR                     28
 38 #define GCC_BLSP2_BCR                              46 #define GCC_BLSP2_BCR                           29
 39 #define GCC_BLSP2_QUP1_BCR                         47 #define GCC_BLSP2_QUP1_BCR                      30
 40 #define GCC_BLSP2_UART1_BCR                        48 #define GCC_BLSP2_UART1_BCR                     31
 41 #define GCC_BLSP2_QUP2_BCR                         49 #define GCC_BLSP2_QUP2_BCR                      32
 42 #define GCC_BLSP2_UART2_BCR                        50 #define GCC_BLSP2_UART2_BCR                     33
 43 #define GCC_BLSP2_QUP3_BCR                         51 #define GCC_BLSP2_QUP3_BCR                      34
 44 #define GCC_BLSP2_UART3_BCR                        52 #define GCC_BLSP2_UART3_BCR                     35
 45 #define GCC_BLSP2_QUP4_BCR                         53 #define GCC_BLSP2_QUP4_BCR                      36
 46 #define GCC_BLSP2_UART4_BCR                        54 #define GCC_BLSP2_UART4_BCR                     37
 47 #define GCC_BLSP2_QUP5_BCR                         55 #define GCC_BLSP2_QUP5_BCR                      38
 48 #define GCC_BLSP2_UART5_BCR                        56 #define GCC_BLSP2_UART5_BCR                     39
 49 #define GCC_BLSP2_QUP6_BCR                         57 #define GCC_BLSP2_QUP6_BCR                      40
 50 #define GCC_BLSP2_UART6_BCR                        58 #define GCC_BLSP2_UART6_BCR                     41
 51 #define GCC_PDM_BCR                                59 #define GCC_PDM_BCR                             42
 52 #define GCC_BAM_DMA_BCR                            60 #define GCC_BAM_DMA_BCR                         43
 53 #define GCC_TSIF_BCR                               61 #define GCC_TSIF_BCR                            44
 54 #define GCC_TCSR_BCR                               62 #define GCC_TCSR_BCR                            45
 55 #define GCC_BOOT_ROM_BCR                           63 #define GCC_BOOT_ROM_BCR                        46
 56 #define GCC_MSG_RAM_BCR                            64 #define GCC_MSG_RAM_BCR                         47
 57 #define GCC_TLMM_BCR                               65 #define GCC_TLMM_BCR                            48
 58 #define GCC_MPM_BCR                                66 #define GCC_MPM_BCR                             49
 59 #define GCC_SEC_CTRL_BCR                           67 #define GCC_SEC_CTRL_BCR                        50
 60 #define GCC_SPMI_BCR                               68 #define GCC_SPMI_BCR                            51
 61 #define GCC_SPDM_BCR                               69 #define GCC_SPDM_BCR                            52
 62 #define GCC_CE1_BCR                                70 #define GCC_CE1_BCR                             53
 63 #define GCC_CE2_BCR                                71 #define GCC_CE2_BCR                             54
 64 #define GCC_BIMC_BCR                               72 #define GCC_BIMC_BCR                            55
 65 #define GCC_MPM_NON_AHB_RESET                      73 #define GCC_MPM_NON_AHB_RESET                   56
 66 #define GCC_MPM_AHB_RESET                          74 #define GCC_MPM_AHB_RESET                       57
 67 #define GCC_SNOC_BUS_TIMEOUT0_BCR                  75 #define GCC_SNOC_BUS_TIMEOUT0_BCR               58
 68 #define GCC_SNOC_BUS_TIMEOUT2_BCR                  76 #define GCC_SNOC_BUS_TIMEOUT2_BCR               59
 69 #define GCC_PNOC_BUS_TIMEOUT0_BCR                  77 #define GCC_PNOC_BUS_TIMEOUT0_BCR               60
 70 #define GCC_PNOC_BUS_TIMEOUT1_BCR                  78 #define GCC_PNOC_BUS_TIMEOUT1_BCR               61
 71 #define GCC_PNOC_BUS_TIMEOUT2_BCR                  79 #define GCC_PNOC_BUS_TIMEOUT2_BCR               62
 72 #define GCC_PNOC_BUS_TIMEOUT3_BCR                  80 #define GCC_PNOC_BUS_TIMEOUT3_BCR               63
 73 #define GCC_PNOC_BUS_TIMEOUT4_BCR                  81 #define GCC_PNOC_BUS_TIMEOUT4_BCR               64
 74 #define GCC_CNOC_BUS_TIMEOUT0_BCR                  82 #define GCC_CNOC_BUS_TIMEOUT0_BCR               65
 75 #define GCC_CNOC_BUS_TIMEOUT1_BCR                  83 #define GCC_CNOC_BUS_TIMEOUT1_BCR               66
 76 #define GCC_CNOC_BUS_TIMEOUT2_BCR                  84 #define GCC_CNOC_BUS_TIMEOUT2_BCR               67
 77 #define GCC_CNOC_BUS_TIMEOUT3_BCR                  85 #define GCC_CNOC_BUS_TIMEOUT3_BCR               68
 78 #define GCC_CNOC_BUS_TIMEOUT4_BCR                  86 #define GCC_CNOC_BUS_TIMEOUT4_BCR               69
 79 #define GCC_CNOC_BUS_TIMEOUT5_BCR                  87 #define GCC_CNOC_BUS_TIMEOUT5_BCR               70
 80 #define GCC_CNOC_BUS_TIMEOUT6_BCR                  88 #define GCC_CNOC_BUS_TIMEOUT6_BCR               71
 81 #define GCC_DEHR_BCR                               89 #define GCC_DEHR_BCR                            72
 82 #define GCC_RBCPR_BCR                              90 #define GCC_RBCPR_BCR                           73
 83 #define GCC_MSS_RESTART                            91 #define GCC_MSS_RESTART                         74
 84 #define GCC_LPASS_RESTART                          92 #define GCC_LPASS_RESTART                       75
 85 #define GCC_WCSS_RESTART                           93 #define GCC_WCSS_RESTART                        76
 86 #define GCC_VENUS_RESTART                          94 #define GCC_VENUS_RESTART                       77
 87                                                    95 
 88 #endif                                             96 #endif
 89                                                    97 

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