1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-C 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ 2 /* 2 /* 3 * Copyright (C) 2023 Sophgo Technology Inc. A 3 * Copyright (C) 2023 Sophgo Technology Inc. All rights reserved. 4 */ 4 */ 5 5 6 #ifndef __DT_BINDINGS_RESET_SOPHGO_SG2042_H_ 6 #ifndef __DT_BINDINGS_RESET_SOPHGO_SG2042_H_ 7 #define __DT_BINDINGS_RESET_SOPHGO_SG2042_H_ 7 #define __DT_BINDINGS_RESET_SOPHGO_SG2042_H_ 8 8 9 #define RST_MAIN_AP 0 9 #define RST_MAIN_AP 0 10 #define RST_RISCV_CPU 1 10 #define RST_RISCV_CPU 1 11 #define RST_RISCV_LOW_SPEED_LOGIC 2 11 #define RST_RISCV_LOW_SPEED_LOGIC 2 12 #define RST_RISCV_CMN 3 12 #define RST_RISCV_CMN 3 13 #define RST_HSDMA 4 13 #define RST_HSDMA 4 14 #define RST_SYSDMA 5 14 #define RST_SYSDMA 5 15 #define RST_EFUSE0 6 15 #define RST_EFUSE0 6 16 #define RST_EFUSE1 7 16 #define RST_EFUSE1 7 17 #define RST_RTC 8 17 #define RST_RTC 8 18 #define RST_TIMER 9 18 #define RST_TIMER 9 19 #define RST_WDT 10 19 #define RST_WDT 10 20 #define RST_AHB_ROM0 11 20 #define RST_AHB_ROM0 11 21 #define RST_AHB_ROM1 12 21 #define RST_AHB_ROM1 12 22 #define RST_I2C0 13 22 #define RST_I2C0 13 23 #define RST_I2C1 14 23 #define RST_I2C1 14 24 #define RST_I2C2 15 24 #define RST_I2C2 15 25 #define RST_I2C3 16 25 #define RST_I2C3 16 26 #define RST_GPIO0 17 26 #define RST_GPIO0 17 27 #define RST_GPIO1 18 27 #define RST_GPIO1 18 28 #define RST_GPIO2 19 28 #define RST_GPIO2 19 29 #define RST_PWM 20 29 #define RST_PWM 20 30 #define RST_AXI_SRAM0 21 30 #define RST_AXI_SRAM0 21 31 #define RST_AXI_SRAM1 22 31 #define RST_AXI_SRAM1 22 32 #define RST_SF0 23 32 #define RST_SF0 23 33 #define RST_SF1 24 33 #define RST_SF1 24 34 #define RST_LPC 25 34 #define RST_LPC 25 35 #define RST_ETH0 26 35 #define RST_ETH0 26 36 #define RST_EMMC 27 36 #define RST_EMMC 27 37 #define RST_SD 28 37 #define RST_SD 28 38 #define RST_UART0 29 38 #define RST_UART0 29 39 #define RST_UART1 30 39 #define RST_UART1 30 40 #define RST_UART2 31 40 #define RST_UART2 31 41 #define RST_UART3 32 41 #define RST_UART3 32 42 #define RST_SPI0 33 42 #define RST_SPI0 33 43 #define RST_SPI1 34 43 #define RST_SPI1 34 44 #define RST_DBG_I2C 35 44 #define RST_DBG_I2C 35 45 #define RST_PCIE0 36 45 #define RST_PCIE0 36 46 #define RST_PCIE1 37 46 #define RST_PCIE1 37 47 #define RST_DDR0 38 47 #define RST_DDR0 38 48 #define RST_DDR1 39 48 #define RST_DDR1 39 49 #define RST_DDR2 40 49 #define RST_DDR2 40 50 #define RST_DDR3 41 50 #define RST_DDR3 41 51 #define RST_FAU0 42 51 #define RST_FAU0 42 52 #define RST_FAU1 43 52 #define RST_FAU1 43 53 #define RST_FAU2 44 53 #define RST_FAU2 44 54 #define RST_RXU0 45 54 #define RST_RXU0 45 55 #define RST_RXU1 46 55 #define RST_RXU1 46 56 #define RST_RXU2 47 56 #define RST_RXU2 47 57 #define RST_RXU3 48 57 #define RST_RXU3 48 58 #define RST_RXU4 49 58 #define RST_RXU4 49 59 #define RST_RXU5 50 59 #define RST_RXU5 50 60 #define RST_RXU6 51 60 #define RST_RXU6 51 61 #define RST_RXU7 52 61 #define RST_RXU7 52 62 #define RST_RXU8 53 62 #define RST_RXU8 53 63 #define RST_RXU9 54 63 #define RST_RXU9 54 64 #define RST_RXU10 55 64 #define RST_RXU10 55 65 #define RST_RXU11 56 65 #define RST_RXU11 56 66 #define RST_RXU12 57 66 #define RST_RXU12 57 67 #define RST_RXU13 58 67 #define RST_RXU13 58 68 #define RST_RXU14 59 68 #define RST_RXU14 59 69 #define RST_RXU15 60 69 #define RST_RXU15 60 70 #define RST_RXU16 61 70 #define RST_RXU16 61 71 #define RST_RXU17 62 71 #define RST_RXU17 62 72 #define RST_RXU18 63 72 #define RST_RXU18 63 73 #define RST_RXU19 64 73 #define RST_RXU19 64 74 #define RST_RXU20 65 74 #define RST_RXU20 65 75 #define RST_RXU21 66 75 #define RST_RXU21 66 76 #define RST_RXU22 67 76 #define RST_RXU22 67 77 #define RST_RXU23 68 77 #define RST_RXU23 68 78 #define RST_RXU24 69 78 #define RST_RXU24 69 79 #define RST_RXU25 70 79 #define RST_RXU25 70 80 #define RST_RXU26 71 80 #define RST_RXU26 71 81 #define RST_RXU27 72 81 #define RST_RXU27 72 82 #define RST_RXU28 73 82 #define RST_RXU28 73 83 #define RST_RXU29 74 83 #define RST_RXU29 74 84 #define RST_RXU30 75 84 #define RST_RXU30 75 85 #define RST_RXU31 76 85 #define RST_RXU31 76 86 86 87 #endif /* __DT_BINDINGS_RESET_SOPHGO_SG2042_H_ 87 #endif /* __DT_BINDINGS_RESET_SOPHGO_SG2042_H_ */ 88 88
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