1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-C !! 1 /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */ 2 /* 2 /* 3 * Copyright (C) STMicroelectronics 2018 - All 3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved 4 * Author: Gabriel Fernandez <gabriel.fernande 4 * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics. 5 */ 5 */ 6 6 7 #ifndef _DT_BINDINGS_STM32MP1_RESET_H_ 7 #ifndef _DT_BINDINGS_STM32MP1_RESET_H_ 8 #define _DT_BINDINGS_STM32MP1_RESET_H_ 8 #define _DT_BINDINGS_STM32MP1_RESET_H_ 9 9 10 #define MCU_HOLD_BOOT_R 2144 10 #define MCU_HOLD_BOOT_R 2144 11 #define LTDC_R 3072 11 #define LTDC_R 3072 12 #define DSI_R 3076 12 #define DSI_R 3076 13 #define DDRPERFM_R 3080 13 #define DDRPERFM_R 3080 14 #define USBPHY_R 3088 14 #define USBPHY_R 3088 15 #define SPI6_R 3136 15 #define SPI6_R 3136 16 #define I2C4_R 3138 16 #define I2C4_R 3138 17 #define I2C6_R 3139 17 #define I2C6_R 3139 18 #define USART1_R 3140 18 #define USART1_R 3140 19 #define STGEN_R 3156 19 #define STGEN_R 3156 20 #define GPIOZ_R 3200 20 #define GPIOZ_R 3200 21 #define CRYP1_R 3204 21 #define CRYP1_R 3204 22 #define HASH1_R 3205 22 #define HASH1_R 3205 23 #define RNG1_R 3206 23 #define RNG1_R 3206 24 #define AXIM_R 3216 24 #define AXIM_R 3216 25 #define GPU_R 3269 25 #define GPU_R 3269 26 #define ETHMAC_R 3274 26 #define ETHMAC_R 3274 27 #define FMC_R 3276 27 #define FMC_R 3276 28 #define QSPI_R 3278 28 #define QSPI_R 3278 29 #define SDMMC1_R 3280 29 #define SDMMC1_R 3280 30 #define SDMMC2_R 3281 30 #define SDMMC2_R 3281 31 #define CRC1_R 3284 31 #define CRC1_R 3284 32 #define USBH_R 3288 32 #define USBH_R 3288 33 #define MDMA_R 3328 33 #define MDMA_R 3328 34 #define MCU_R 8225 34 #define MCU_R 8225 35 #define TIM2_R 19456 35 #define TIM2_R 19456 36 #define TIM3_R 19457 36 #define TIM3_R 19457 37 #define TIM4_R 19458 37 #define TIM4_R 19458 38 #define TIM5_R 19459 38 #define TIM5_R 19459 39 #define TIM6_R 19460 39 #define TIM6_R 19460 40 #define TIM7_R 19461 40 #define TIM7_R 19461 41 #define TIM12_R 16462 41 #define TIM12_R 16462 42 #define TIM13_R 16463 42 #define TIM13_R 16463 43 #define TIM14_R 16464 43 #define TIM14_R 16464 44 #define LPTIM1_R 19465 44 #define LPTIM1_R 19465 45 #define SPI2_R 19467 45 #define SPI2_R 19467 46 #define SPI3_R 19468 46 #define SPI3_R 19468 47 #define USART2_R 19470 47 #define USART2_R 19470 48 #define USART3_R 19471 48 #define USART3_R 19471 49 #define UART4_R 19472 49 #define UART4_R 19472 50 #define UART5_R 19473 50 #define UART5_R 19473 51 #define UART7_R 19474 51 #define UART7_R 19474 52 #define UART8_R 19475 52 #define UART8_R 19475 53 #define I2C1_R 19477 53 #define I2C1_R 19477 54 #define I2C2_R 19478 54 #define I2C2_R 19478 55 #define I2C3_R 19479 55 #define I2C3_R 19479 56 #define I2C5_R 19480 56 #define I2C5_R 19480 57 #define SPDIF_R 19482 57 #define SPDIF_R 19482 58 #define CEC_R 19483 58 #define CEC_R 19483 59 #define DAC12_R 19485 59 #define DAC12_R 19485 60 #define MDIO_R 19847 60 #define MDIO_R 19847 61 #define TIM1_R 19520 61 #define TIM1_R 19520 62 #define TIM8_R 19521 62 #define TIM8_R 19521 63 #define TIM15_R 19522 63 #define TIM15_R 19522 64 #define TIM16_R 19523 64 #define TIM16_R 19523 65 #define TIM17_R 19524 65 #define TIM17_R 19524 66 #define SPI1_R 19528 66 #define SPI1_R 19528 67 #define SPI4_R 19529 67 #define SPI4_R 19529 68 #define SPI5_R 19530 68 #define SPI5_R 19530 69 #define USART6_R 19533 69 #define USART6_R 19533 70 #define SAI1_R 19536 70 #define SAI1_R 19536 71 #define SAI2_R 19537 71 #define SAI2_R 19537 72 #define SAI3_R 19538 72 #define SAI3_R 19538 73 #define DFSDM_R 19540 73 #define DFSDM_R 19540 74 #define FDCAN_R 19544 74 #define FDCAN_R 19544 75 #define LPTIM2_R 19584 75 #define LPTIM2_R 19584 76 #define LPTIM3_R 19585 76 #define LPTIM3_R 19585 77 #define LPTIM4_R 19586 77 #define LPTIM4_R 19586 78 #define LPTIM5_R 19587 78 #define LPTIM5_R 19587 79 #define SAI4_R 19592 79 #define SAI4_R 19592 80 #define SYSCFG_R 19595 80 #define SYSCFG_R 19595 81 #define VREF_R 19597 81 #define VREF_R 19597 82 #define TMPSENS_R 19600 82 #define TMPSENS_R 19600 83 #define PMBCTRL_R 19601 83 #define PMBCTRL_R 19601 84 #define DMA1_R 19648 84 #define DMA1_R 19648 85 #define DMA2_R 19649 85 #define DMA2_R 19649 86 #define DMAMUX_R 19650 86 #define DMAMUX_R 19650 87 #define ADC12_R 19653 87 #define ADC12_R 19653 88 #define USBO_R 19656 88 #define USBO_R 19656 89 #define SDMMC3_R 19664 89 #define SDMMC3_R 19664 90 #define CAMITF_R 19712 90 #define CAMITF_R 19712 91 #define CRYP2_R 19716 91 #define CRYP2_R 19716 92 #define HASH2_R 19717 92 #define HASH2_R 19717 93 #define RNG2_R 19718 93 #define RNG2_R 19718 94 #define CRC2_R 19719 94 #define CRC2_R 19719 95 #define HSEM_R 19723 95 #define HSEM_R 19723 96 #define MBOX_R 19724 96 #define MBOX_R 19724 97 #define GPIOA_R 19776 97 #define GPIOA_R 19776 98 #define GPIOB_R 19777 98 #define GPIOB_R 19777 99 #define GPIOC_R 19778 99 #define GPIOC_R 19778 100 #define GPIOD_R 19779 100 #define GPIOD_R 19779 101 #define GPIOE_R 19780 101 #define GPIOE_R 19780 102 #define GPIOF_R 19781 102 #define GPIOF_R 19781 103 #define GPIOG_R 19782 103 #define GPIOG_R 19782 104 #define GPIOH_R 19783 104 #define GPIOH_R 19783 105 #define GPIOI_R 19784 105 #define GPIOI_R 19784 106 #define GPIOJ_R 19785 106 #define GPIOJ_R 19785 107 #define GPIOK_R 19786 107 #define GPIOK_R 19786 108 108 109 /* SCMI reset domain identifiers */ 109 /* SCMI reset domain identifiers */ 110 #define RST_SCMI_SPI6 0 110 #define RST_SCMI_SPI6 0 111 #define RST_SCMI_I2C4 1 111 #define RST_SCMI_I2C4 1 112 #define RST_SCMI_I2C6 2 112 #define RST_SCMI_I2C6 2 113 #define RST_SCMI_USART1 3 113 #define RST_SCMI_USART1 3 114 #define RST_SCMI_STGEN 4 114 #define RST_SCMI_STGEN 4 115 #define RST_SCMI_GPIOZ 5 115 #define RST_SCMI_GPIOZ 5 116 #define RST_SCMI_CRYP1 6 116 #define RST_SCMI_CRYP1 6 117 #define RST_SCMI_HASH1 7 117 #define RST_SCMI_HASH1 7 118 #define RST_SCMI_RNG1 8 118 #define RST_SCMI_RNG1 8 119 #define RST_SCMI_MDMA 9 119 #define RST_SCMI_MDMA 9 120 #define RST_SCMI_MCU 10 120 #define RST_SCMI_MCU 10 121 #define RST_SCMI_MCU_HOLD_BOOT 11 121 #define RST_SCMI_MCU_HOLD_BOOT 11 122 122 123 #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */ 123 #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */ 124 124
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