1 /* 1 2 * Copyright (C) 2017 Chen-Yu Tsai <wens@csie. 3 * 4 * This file is dual-licensed: you can use it 5 * of the GPL or the X11 license, at your opti 6 * licensing only applies to this file, and no 7 * whole. 8 * 9 * a) This file is free software; you can red 10 * modify it under the terms of the GNU Ge 11 * published by the Free Software Foundati 12 * License, or (at your option) any later 13 * 14 * This file is distributed in the hope th 15 * but WITHOUT ANY WARRANTY; without even 16 * MERCHANTABILITY or FITNESS FOR A PARTIC 17 * GNU General Public License for more det 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of c 22 * obtaining a copy of this software and a 23 * files (the "Software"), to deal in the 24 * restriction, including without limitati 25 * copy, modify, merge, publish, distribut 26 * sell copies of the Software, and to per 27 * Software is furnished to do so, subject 28 * conditions: 29 * 30 * The above copyright notice and this per 31 * included in all copies or substantial p 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHO 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L 35 * OF MERCHANTABILITY, FITNESS FOR A PARTI 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE 38 * WHETHER IN AN ACTION OF CONTRACT, TORT 39 * FROM, OUT OF OR IN CONNECTION WITH THE 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43 #ifndef _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ 44 #define _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ 45 46 #define RST_USB_PHY0 0 47 #define RST_USB_PHY1 1 48 #define RST_USB_HSIC 2 49 50 #define RST_DRAM 3 51 #define RST_MBUS 4 52 53 #define RST_BUS_MIPI_DSI 5 54 #define RST_BUS_SS 6 55 #define RST_BUS_DMA 7 56 #define RST_BUS_MMC0 8 57 #define RST_BUS_MMC1 9 58 #define RST_BUS_MMC2 10 59 #define RST_BUS_NAND 11 60 #define RST_BUS_DRAM 12 61 #define RST_BUS_EMAC 13 62 #define RST_BUS_HSTIMER 14 63 #define RST_BUS_SPI0 15 64 #define RST_BUS_SPI1 16 65 #define RST_BUS_OTG 17 66 #define RST_BUS_EHCI0 18 67 #define RST_BUS_EHCI1 19 68 #define RST_BUS_OHCI0 20 69 70 #define RST_BUS_VE 21 71 #define RST_BUS_TCON0 22 72 #define RST_BUS_TCON1 23 73 #define RST_BUS_CSI 24 74 #define RST_BUS_HDMI0 25 75 #define RST_BUS_HDMI1 26 76 #define RST_BUS_DE 27 77 #define RST_BUS_GPU 28 78 #define RST_BUS_MSGBOX 29 79 #define RST_BUS_SPINLOCK 30 80 81 #define RST_BUS_LVDS 31 82 83 #define RST_BUS_SPDIF 32 84 #define RST_BUS_I2S0 33 85 #define RST_BUS_I2S1 34 86 #define RST_BUS_I2S2 35 87 #define RST_BUS_TDM 36 88 89 #define RST_BUS_I2C0 37 90 #define RST_BUS_I2C1 38 91 #define RST_BUS_I2C2 39 92 #define RST_BUS_UART0 40 93 #define RST_BUS_UART1 41 94 #define RST_BUS_UART2 42 95 #define RST_BUS_UART3 43 96 #define RST_BUS_UART4 44 97 98 #endif /* _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ 99
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