1 /* 1 2 * Copyright (C) 2017 Icenowy Zheng <icenowy@a 3 * 4 * This file is dual-licensed: you can use it 5 * of the GPL or the X11 license, at your opti 6 * licensing only applies to this file, and no 7 * whole. 8 * 9 * a) This file is free software; you can red 10 * modify it under the terms of the GNU Ge 11 * published by the Free Software Foundati 12 * License, or (at your option) any later 13 * 14 * This file is distributed in the hope th 15 * but WITHOUT ANY WARRANTY; without even 16 * MERCHANTABILITY or FITNESS FOR A PARTIC 17 * GNU General Public License for more det 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of c 22 * obtaining a copy of this software and a 23 * files (the "Software"), to deal in the 24 * restriction, including without limitati 25 * copy, modify, merge, publish, distribut 26 * sell copies of the Software, and to per 27 * Software is furnished to do so, subject 28 * conditions: 29 * 30 * The above copyright notice and this per 31 * included in all copies or substantial p 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHO 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L 35 * OF MERCHANTABILITY, FITNESS FOR A PARTI 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE 38 * WHETHER IN AN ACTION OF CONTRACT, TORT 39 * FROM, OUT OF OR IN CONNECTION WITH THE 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43 #ifndef _DT_BINDINGS_RST_SUN8I_R40_H_ 44 #define _DT_BINDINGS_RST_SUN8I_R40_H_ 45 46 #define RST_USB_PHY0 0 47 #define RST_USB_PHY1 1 48 #define RST_USB_PHY2 2 49 50 #define RST_DRAM 3 51 #define RST_MBUS 4 52 53 #define RST_BUS_MIPI_DSI 5 54 #define RST_BUS_CE 6 55 #define RST_BUS_DMA 7 56 #define RST_BUS_MMC0 8 57 #define RST_BUS_MMC1 9 58 #define RST_BUS_MMC2 10 59 #define RST_BUS_MMC3 11 60 #define RST_BUS_NAND 12 61 #define RST_BUS_DRAM 13 62 #define RST_BUS_EMAC 14 63 #define RST_BUS_TS 15 64 #define RST_BUS_HSTIMER 16 65 #define RST_BUS_SPI0 17 66 #define RST_BUS_SPI1 18 67 #define RST_BUS_SPI2 19 68 #define RST_BUS_SPI3 20 69 #define RST_BUS_SATA 21 70 #define RST_BUS_OTG 22 71 #define RST_BUS_EHCI0 23 72 #define RST_BUS_EHCI1 24 73 #define RST_BUS_EHCI2 25 74 #define RST_BUS_OHCI0 26 75 #define RST_BUS_OHCI1 27 76 #define RST_BUS_OHCI2 28 77 #define RST_BUS_VE 29 78 #define RST_BUS_MP 30 79 #define RST_BUS_DEINTERLACE 31 80 #define RST_BUS_CSI0 32 81 #define RST_BUS_CSI1 33 82 #define RST_BUS_HDMI0 34 83 #define RST_BUS_HDMI1 35 84 #define RST_BUS_DE 36 85 #define RST_BUS_TVE0 37 86 #define RST_BUS_TVE1 38 87 #define RST_BUS_TVE_TOP 39 88 #define RST_BUS_GMAC 40 89 #define RST_BUS_GPU 41 90 #define RST_BUS_TVD0 42 91 #define RST_BUS_TVD1 43 92 #define RST_BUS_TVD2 44 93 #define RST_BUS_TVD3 45 94 #define RST_BUS_TVD_TOP 46 95 #define RST_BUS_TCON_LCD0 47 96 #define RST_BUS_TCON_LCD1 48 97 #define RST_BUS_TCON_TV0 49 98 #define RST_BUS_TCON_TV1 50 99 #define RST_BUS_TCON_TOP 51 100 #define RST_BUS_DBG 52 101 #define RST_BUS_LVDS 53 102 #define RST_BUS_CODEC 54 103 #define RST_BUS_SPDIF 55 104 #define RST_BUS_AC97 56 105 #define RST_BUS_IR0 57 106 #define RST_BUS_IR1 58 107 #define RST_BUS_THS 59 108 #define RST_BUS_KEYPAD 60 109 #define RST_BUS_I2S0 61 110 #define RST_BUS_I2S1 62 111 #define RST_BUS_I2S2 63 112 #define RST_BUS_I2C0 64 113 #define RST_BUS_I2C1 65 114 #define RST_BUS_I2C2 66 115 #define RST_BUS_I2C3 67 116 #define RST_BUS_CAN 68 117 #define RST_BUS_SCR 69 118 #define RST_BUS_PS20 70 119 #define RST_BUS_PS21 71 120 #define RST_BUS_I2C4 72 121 #define RST_BUS_UART0 73 122 #define RST_BUS_UART1 74 123 #define RST_BUS_UART2 75 124 #define RST_BUS_UART3 76 125 #define RST_BUS_UART4 77 126 #define RST_BUS_UART5 78 127 #define RST_BUS_UART6 79 128 #define RST_BUS_UART7 80 129 130 #endif /* _DT_BINDINGS_RST_SUN8I_R40_H_ */ 131
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