1 /* 1 2 * Copyright (C) 2016 Chen-Yu Tsai <wens@csie. 3 * 4 * This file is dual-licensed: you can use it 5 * of the GPL or the X11 license, at your opti 6 * licensing only applies to this file, and no 7 * whole. 8 * 9 * a) This file is free software; you can red 10 * modify it under the terms of the GNU Ge 11 * published by the Free Software Foundati 12 * License, or (at your option) any later 13 * 14 * This file is distributed in the hope th 15 * but WITHOUT ANY WARRANTY; without even 16 * MERCHANTABILITY or FITNESS FOR A PARTIC 17 * GNU General Public License for more det 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of c 22 * obtaining a copy of this software and a 23 * files (the "Software"), to deal in the 24 * restriction, including without limitati 25 * copy, modify, merge, publish, distribut 26 * sell copies of the Software, and to per 27 * Software is furnished to do so, subject 28 * conditions: 29 * 30 * The above copyright notice and this per 31 * included in all copies or substantial p 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHO 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L 35 * OF MERCHANTABILITY, FITNESS FOR A PARTI 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE 38 * WHETHER IN AN ACTION OF CONTRACT, TORT 39 * FROM, OUT OF OR IN CONNECTION WITH THE 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43 #ifndef _DT_BINDINGS_RESET_SUN9I_A80_CCU_H_ 44 #define _DT_BINDINGS_RESET_SUN9I_A80_CCU_H_ 45 46 #define RST_BUS_FD 0 47 #define RST_BUS_VE 1 48 #define RST_BUS_GPU_CTRL 2 49 #define RST_BUS_SS 3 50 #define RST_BUS_MMC 4 51 #define RST_BUS_NAND0 5 52 #define RST_BUS_NAND1 6 53 #define RST_BUS_SDRAM 7 54 #define RST_BUS_SATA 8 55 #define RST_BUS_TS 9 56 #define RST_BUS_SPI0 10 57 #define RST_BUS_SPI1 11 58 #define RST_BUS_SPI2 12 59 #define RST_BUS_SPI3 13 60 61 #define RST_BUS_OTG 14 62 #define RST_BUS_OTG_PHY 15 63 #define RST_BUS_MIPI_HSI 16 64 #define RST_BUS_GMAC 17 65 #define RST_BUS_MSGBOX 18 66 #define RST_BUS_SPINLOCK 19 67 #define RST_BUS_HSTIMER 20 68 #define RST_BUS_DMA 21 69 70 #define RST_BUS_LCD0 22 71 #define RST_BUS_LCD1 23 72 #define RST_BUS_EDP 24 73 #define RST_BUS_LVDS 25 74 #define RST_BUS_CSI 26 75 #define RST_BUS_HDMI0 27 76 #define RST_BUS_HDMI1 28 77 #define RST_BUS_DE 29 78 #define RST_BUS_MP 30 79 #define RST_BUS_GPU 31 80 #define RST_BUS_MIPI_DSI 32 81 82 #define RST_BUS_SPDIF 33 83 #define RST_BUS_AC97 34 84 #define RST_BUS_I2S0 35 85 #define RST_BUS_I2S1 36 86 #define RST_BUS_LRADC 37 87 #define RST_BUS_GPADC 38 88 #define RST_BUS_CIR_TX 39 89 90 #define RST_BUS_I2C0 40 91 #define RST_BUS_I2C1 41 92 #define RST_BUS_I2C2 42 93 #define RST_BUS_I2C3 43 94 #define RST_BUS_I2C4 44 95 #define RST_BUS_UART0 45 96 #define RST_BUS_UART1 46 97 #define RST_BUS_UART2 47 98 #define RST_BUS_UART3 48 99 #define RST_BUS_UART4 49 100 #define RST_BUS_UART5 50 101 102 #endif /* _DT_BINDINGS_RESET_SUN9I_A80_CCU_H_ 103
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