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TOMOYO Linux Cross Reference
Linux/include/dt-bindings/reset/xlnx-zynqmp-resets.h

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Diff markup

Differences between /include/dt-bindings/reset/xlnx-zynqmp-resets.h (Version linux-6.12-rc7) and /include/dt-bindings/reset/xlnx-zynqmp-resets.h (Version linux-4.20.17)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 
  2 /*                                                
  3  *  Copyright (C) 2018 Xilinx, Inc.               
  4  */                                               
  5                                                   
  6 #ifndef _DT_BINDINGS_ZYNQMP_RESETS_H              
  7 #define _DT_BINDINGS_ZYNQMP_RESETS_H              
  8                                                   
  9 #define         ZYNQMP_RESET_PCIE_CFG             
 10 #define         ZYNQMP_RESET_PCIE_BRIDGE          
 11 #define         ZYNQMP_RESET_PCIE_CTRL            
 12 #define         ZYNQMP_RESET_DP                   
 13 #define         ZYNQMP_RESET_SWDT_CRF             
 14 #define         ZYNQMP_RESET_AFI_FM5              
 15 #define         ZYNQMP_RESET_AFI_FM4              
 16 #define         ZYNQMP_RESET_AFI_FM3              
 17 #define         ZYNQMP_RESET_AFI_FM2              
 18 #define         ZYNQMP_RESET_AFI_FM1              
 19 #define         ZYNQMP_RESET_AFI_FM0              
 20 #define         ZYNQMP_RESET_GDMA                 
 21 #define         ZYNQMP_RESET_GPU_PP1              
 22 #define         ZYNQMP_RESET_GPU_PP0              
 23 #define         ZYNQMP_RESET_GPU                  
 24 #define         ZYNQMP_RESET_GT                   
 25 #define         ZYNQMP_RESET_SATA                 
 26 #define         ZYNQMP_RESET_ACPU3_PWRON          
 27 #define         ZYNQMP_RESET_ACPU2_PWRON          
 28 #define         ZYNQMP_RESET_ACPU1_PWRON          
 29 #define         ZYNQMP_RESET_ACPU0_PWRON          
 30 #define         ZYNQMP_RESET_APU_L2               
 31 #define         ZYNQMP_RESET_ACPU3                
 32 #define         ZYNQMP_RESET_ACPU2                
 33 #define         ZYNQMP_RESET_ACPU1                
 34 #define         ZYNQMP_RESET_ACPU0                
 35 #define         ZYNQMP_RESET_DDR                  
 36 #define         ZYNQMP_RESET_APM_FPD              
 37 #define         ZYNQMP_RESET_SOFT                 
 38 #define         ZYNQMP_RESET_GEM0                 
 39 #define         ZYNQMP_RESET_GEM1                 
 40 #define         ZYNQMP_RESET_GEM2                 
 41 #define         ZYNQMP_RESET_GEM3                 
 42 #define         ZYNQMP_RESET_QSPI                 
 43 #define         ZYNQMP_RESET_UART0                
 44 #define         ZYNQMP_RESET_UART1                
 45 #define         ZYNQMP_RESET_SPI0                 
 46 #define         ZYNQMP_RESET_SPI1                 
 47 #define         ZYNQMP_RESET_SDIO0                
 48 #define         ZYNQMP_RESET_SDIO1                
 49 #define         ZYNQMP_RESET_CAN0                 
 50 #define         ZYNQMP_RESET_CAN1                 
 51 #define         ZYNQMP_RESET_I2C0                 
 52 #define         ZYNQMP_RESET_I2C1                 
 53 #define         ZYNQMP_RESET_TTC0                 
 54 #define         ZYNQMP_RESET_TTC1                 
 55 #define         ZYNQMP_RESET_TTC2                 
 56 #define         ZYNQMP_RESET_TTC3                 
 57 #define         ZYNQMP_RESET_SWDT_CRL             
 58 #define         ZYNQMP_RESET_NAND                 
 59 #define         ZYNQMP_RESET_ADMA                 
 60 #define         ZYNQMP_RESET_GPIO                 
 61 #define         ZYNQMP_RESET_IOU_CC               
 62 #define         ZYNQMP_RESET_TIMESTAMP            
 63 #define         ZYNQMP_RESET_RPU_R50              
 64 #define         ZYNQMP_RESET_RPU_R51              
 65 #define         ZYNQMP_RESET_RPU_AMBA             
 66 #define         ZYNQMP_RESET_OCM                  
 67 #define         ZYNQMP_RESET_RPU_PGE              
 68 #define         ZYNQMP_RESET_USB0_CORERESET       
 69 #define         ZYNQMP_RESET_USB1_CORERESET       
 70 #define         ZYNQMP_RESET_USB0_HIBERRESET      
 71 #define         ZYNQMP_RESET_USB1_HIBERRESET      
 72 #define         ZYNQMP_RESET_USB0_APB             
 73 #define         ZYNQMP_RESET_USB1_APB             
 74 #define         ZYNQMP_RESET_IPI                  
 75 #define         ZYNQMP_RESET_APM_LPD              
 76 #define         ZYNQMP_RESET_RTC                  
 77 #define         ZYNQMP_RESET_SYSMON               
 78 #define         ZYNQMP_RESET_AFI_FM6              
 79 #define         ZYNQMP_RESET_LPD_SWDT             
 80 #define         ZYNQMP_RESET_FPD                  
 81 #define         ZYNQMP_RESET_RPU_DBG1             
 82 #define         ZYNQMP_RESET_RPU_DBG0             
 83 #define         ZYNQMP_RESET_DBG_LPD              
 84 #define         ZYNQMP_RESET_DBG_FPD              
 85 #define         ZYNQMP_RESET_APLL                 
 86 #define         ZYNQMP_RESET_DPLL                 
 87 #define         ZYNQMP_RESET_VPLL                 
 88 #define         ZYNQMP_RESET_IOPLL                
 89 #define         ZYNQMP_RESET_RPLL                 
 90 #define         ZYNQMP_RESET_GPO3_PL_0            
 91 #define         ZYNQMP_RESET_GPO3_PL_1            
 92 #define         ZYNQMP_RESET_GPO3_PL_2            
 93 #define         ZYNQMP_RESET_GPO3_PL_3            
 94 #define         ZYNQMP_RESET_GPO3_PL_4            
 95 #define         ZYNQMP_RESET_GPO3_PL_5            
 96 #define         ZYNQMP_RESET_GPO3_PL_6            
 97 #define         ZYNQMP_RESET_GPO3_PL_7            
 98 #define         ZYNQMP_RESET_GPO3_PL_8            
 99 #define         ZYNQMP_RESET_GPO3_PL_9            
100 #define         ZYNQMP_RESET_GPO3_PL_10           
101 #define         ZYNQMP_RESET_GPO3_PL_11           
102 #define         ZYNQMP_RESET_GPO3_PL_12           
103 #define         ZYNQMP_RESET_GPO3_PL_13           
104 #define         ZYNQMP_RESET_GPO3_PL_14           
105 #define         ZYNQMP_RESET_GPO3_PL_15           
106 #define         ZYNQMP_RESET_GPO3_PL_16           
107 #define         ZYNQMP_RESET_GPO3_PL_17           
108 #define         ZYNQMP_RESET_GPO3_PL_18           
109 #define         ZYNQMP_RESET_GPO3_PL_19           
110 #define         ZYNQMP_RESET_GPO3_PL_20           
111 #define         ZYNQMP_RESET_GPO3_PL_21           
112 #define         ZYNQMP_RESET_GPO3_PL_22           
113 #define         ZYNQMP_RESET_GPO3_PL_23           
114 #define         ZYNQMP_RESET_GPO3_PL_24           
115 #define         ZYNQMP_RESET_GPO3_PL_25           
116 #define         ZYNQMP_RESET_GPO3_PL_26           
117 #define         ZYNQMP_RESET_GPO3_PL_27           
118 #define         ZYNQMP_RESET_GPO3_PL_28           
119 #define         ZYNQMP_RESET_GPO3_PL_29           
120 #define         ZYNQMP_RESET_GPO3_PL_30           
121 #define         ZYNQMP_RESET_GPO3_PL_31           
122 #define         ZYNQMP_RESET_RPU_LS               
123 #define         ZYNQMP_RESET_PS_ONLY              
124 #define         ZYNQMP_RESET_PL                   
125 #define         ZYNQMP_RESET_PS_PL0               
126 #define         ZYNQMP_RESET_PS_PL1               
127 #define         ZYNQMP_RESET_PS_PL2               
128 #define         ZYNQMP_RESET_PS_PL3               
129                                                   
130 #endif                                            
131                                                   

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