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TOMOYO Linux Cross Reference
Linux/include/dt-bindings/watchdog/aspeed-wdt.h

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Diff markup

Differences between /include/dt-bindings/watchdog/aspeed-wdt.h (Version linux-6.12-rc7) and /include/dt-bindings/watchdog/aspeed-wdt.h (Version linux-4.18.20)


  1 /* SPDX-License-Identifier: (GPL-2.0-only OR B      1 
  2                                                   
  3 #ifndef DT_BINDINGS_ASPEED_WDT_H                  
  4 #define DT_BINDINGS_ASPEED_WDT_H                  
  5                                                   
  6 #define AST2500_WDT_RESET_CPU           (1 <<     
  7 #define AST2500_WDT_RESET_COPROC        (1 <<     
  8 #define AST2500_WDT_RESET_SDRAM         (1 <<     
  9 #define AST2500_WDT_RESET_AHB           (1 <<     
 10 #define AST2500_WDT_RESET_I2C           (1 <<     
 11 #define AST2500_WDT_RESET_MAC0          (1 <<     
 12 #define AST2500_WDT_RESET_MAC1          (1 <<     
 13 #define AST2500_WDT_RESET_GRAPHICS      (1 <<     
 14 #define AST2500_WDT_RESET_USB2_HOST_HUB (1 <<     
 15 #define AST2500_WDT_RESET_USB_HOST      (1 <<     
 16 #define AST2500_WDT_RESET_HID_EHCI      (1 <<     
 17 #define AST2500_WDT_RESET_VIDEO         (1 <<     
 18 #define AST2500_WDT_RESET_HAC           (1 <<     
 19 #define AST2500_WDT_RESET_LPC           (1 <<     
 20 #define AST2500_WDT_RESET_SDIO          (1 <<     
 21 #define AST2500_WDT_RESET_MIC           (1 <<     
 22 #define AST2500_WDT_RESET_CRT           (1 <<     
 23 #define AST2500_WDT_RESET_PWM           (1 <<     
 24 #define AST2500_WDT_RESET_PECI          (1 <<     
 25 #define AST2500_WDT_RESET_JTAG          (1 <<     
 26 #define AST2500_WDT_RESET_ADC           (1 <<     
 27 #define AST2500_WDT_RESET_GPIO          (1 <<     
 28 #define AST2500_WDT_RESET_MCTP          (1 <<     
 29 #define AST2500_WDT_RESET_XDMA          (1 <<     
 30 #define AST2500_WDT_RESET_SPI           (1 <<     
 31 #define AST2500_WDT_RESET_SOC_MISC      (1 <<     
 32                                                   
 33 #define AST2500_WDT_RESET_DEFAULT 0x023ffff3      
 34                                                   
 35 #define AST2600_WDT_RESET1_CPU          (1 <<     
 36 #define AST2600_WDT_RESET1_SDRAM        (1 <<     
 37 #define AST2600_WDT_RESET1_AHB          (1 <<     
 38 #define AST2600_WDT_RESET1_SLI          (1 <<     
 39 #define AST2600_WDT_RESET1_SOC_MISC0    (1 <<     
 40 #define AST2600_WDT_RESET1_COPROC       (1 <<     
 41 #define AST2600_WDT_RESET1_USB_A        (1 <<     
 42 #define AST2600_WDT_RESET1_USB_B        (1 <<     
 43 #define AST2600_WDT_RESET1_UHCI         (1 <<     
 44 #define AST2600_WDT_RESET1_GRAPHICS     (1 <<     
 45 #define AST2600_WDT_RESET1_CRT          (1 <<     
 46 #define AST2600_WDT_RESET1_VIDEO        (1 <<     
 47 #define AST2600_WDT_RESET1_HAC          (1 <<     
 48 #define AST2600_WDT_RESET1_DP           (1 <<     
 49 #define AST2600_WDT_RESET1_DP_MCU       (1 <<     
 50 #define AST2600_WDT_RESET1_GP_MCU       (1 <<     
 51 #define AST2600_WDT_RESET1_MAC0         (1 <<     
 52 #define AST2600_WDT_RESET1_MAC1         (1 <<     
 53 #define AST2600_WDT_RESET1_SDIO0        (1 <<     
 54 #define AST2600_WDT_RESET1_JTAG0        (1 <<     
 55 #define AST2600_WDT_RESET1_MCTP0        (1 <<     
 56 #define AST2600_WDT_RESET1_MCTP1        (1 <<     
 57 #define AST2600_WDT_RESET1_XDMA0        (1 <<     
 58 #define AST2600_WDT_RESET1_XDMA1        (1 <<     
 59 #define AST2600_WDT_RESET1_GPIO0        (1 <<     
 60 #define AST2600_WDT_RESET1_RVAS         (1 <<     
 61                                                   
 62 #define AST2600_WDT_RESET1_DEFAULT 0x030f1ff1     
 63                                                   
 64 #define AST2600_WDT_RESET2_CPU          (1 <<     
 65 #define AST2600_WDT_RESET2_SPI          (1 <<     
 66 #define AST2600_WDT_RESET2_AHB2         (1 <<     
 67 #define AST2600_WDT_RESET2_SLI2         (1 <<     
 68 #define AST2600_WDT_RESET2_SOC_MISC1    (1 <<     
 69 #define AST2600_WDT_RESET2_MAC2         (1 <<     
 70 #define AST2600_WDT_RESET2_MAC3         (1 <<     
 71 #define AST2600_WDT_RESET2_SDIO1        (1 <<     
 72 #define AST2600_WDT_RESET2_JTAG1        (1 <<     
 73 #define AST2600_WDT_RESET2_GPIO1        (1 <<     
 74 #define AST2600_WDT_RESET2_MDIO         (1 <<     
 75 #define AST2600_WDT_RESET2_LPC          (1 <<     
 76 #define AST2600_WDT_RESET2_PECI         (1 <<     
 77 #define AST2600_WDT_RESET2_PWM          (1 <<     
 78 #define AST2600_WDT_RESET2_ADC          (1 <<     
 79 #define AST2600_WDT_RESET2_FSI          (1 <<     
 80 #define AST2600_WDT_RESET2_I2C          (1 <<     
 81 #define AST2600_WDT_RESET2_I3C_GLOBAL   (1 <<     
 82 #define AST2600_WDT_RESET2_I3C0         (1 <<     
 83 #define AST2600_WDT_RESET2_I3C1         (1 <<     
 84 #define AST2600_WDT_RESET2_I3C2         (1 <<     
 85 #define AST2600_WDT_RESET2_I3C3         (1 <<     
 86 #define AST2600_WDT_RESET2_I3C4         (1 <<     
 87 #define AST2600_WDT_RESET2_I3C5         (1 <<     
 88 #define AST2600_WDT_RESET2_ESPI         (1 <<     
 89                                                   
 90 #define AST2600_WDT_RESET2_DEFAULT 0x03fffff1     
 91                                                   
 92 #endif                                            
 93                                                   

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