1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * linux/amba/pl08x.h - ARM PrimeCell DMA Cont 2 * linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver
4 * 3 *
5 * Copyright (C) 2005 ARM Ltd 4 * Copyright (C) 2005 ARM Ltd
6 * Copyright (C) 2010 ST-Ericsson SA 5 * Copyright (C) 2010 ST-Ericsson SA
>> 6 *
>> 7 * This program is free software; you can redistribute it and/or modify
>> 8 * it under the terms of the GNU General Public License version 2 as
>> 9 * published by the Free Software Foundation.
7 * 10 *
8 * pl08x information required by platform code 11 * pl08x information required by platform code
9 * 12 *
10 * Please credit ARM.com 13 * Please credit ARM.com
11 * Documentation: ARM DDI 0196D 14 * Documentation: ARM DDI 0196D
12 */ 15 */
13 16
14 #ifndef AMBA_PL08X_H 17 #ifndef AMBA_PL08X_H
15 #define AMBA_PL08X_H 18 #define AMBA_PL08X_H
16 19
17 /* We need sizes of structs from this header * 20 /* We need sizes of structs from this header */
18 #include <linux/dmaengine.h> 21 #include <linux/dmaengine.h>
19 #include <linux/interrupt.h> 22 #include <linux/interrupt.h>
20 23
21 struct pl08x_driver_data; 24 struct pl08x_driver_data;
22 struct pl08x_phy_chan; 25 struct pl08x_phy_chan;
23 struct pl08x_txd; 26 struct pl08x_txd;
24 27
25 /* Bitmasks for selecting AHB ports for DMA tr 28 /* Bitmasks for selecting AHB ports for DMA transfers */
26 enum { 29 enum {
27 PL08X_AHB1 = (1 << 0), 30 PL08X_AHB1 = (1 << 0),
28 PL08X_AHB2 = (1 << 1) 31 PL08X_AHB2 = (1 << 1)
29 }; 32 };
30 33
31 /** 34 /**
32 * struct pl08x_channel_data - data structure 35 * struct pl08x_channel_data - data structure to pass info between
33 * platform and PL08x driver regarding channel 36 * platform and PL08x driver regarding channel configuration
34 * @bus_id: name of this device channel, not j 37 * @bus_id: name of this device channel, not just a device name since
35 * devices may have more than one channel e.g. 38 * devices may have more than one channel e.g. "foo_tx"
36 * @min_signal: the minimum DMA signal number 39 * @min_signal: the minimum DMA signal number to be muxed in for this
37 * channel (for platforms supporting muxed sig 40 * channel (for platforms supporting muxed signals). If you have
38 * static assignments, make sure this is set t 41 * static assignments, make sure this is set to the assigned signal
39 * number, PL08x have 16 possible signals in n 42 * number, PL08x have 16 possible signals in number 0 thru 15 so
40 * when these are not enough they often get mu 43 * when these are not enough they often get muxed (in hardware)
41 * disabling simultaneous use of the same chan 44 * disabling simultaneous use of the same channel for two devices.
42 * @max_signal: the maximum DMA signal number 45 * @max_signal: the maximum DMA signal number to be muxed in for
43 * the channel. Set to the same as min_signal 46 * the channel. Set to the same as min_signal for
44 * devices with static assignments 47 * devices with static assignments
45 * @muxval: a number usually used to poke into 48 * @muxval: a number usually used to poke into some mux regiser to
46 * mux in the signal to this channel 49 * mux in the signal to this channel
47 * @addr: source/target address in physical me 50 * @addr: source/target address in physical memory for this DMA channel,
48 * can be the address of a FIFO register for b 51 * can be the address of a FIFO register for burst requests for example.
49 * This can be left undefined if the PrimeCell 52 * This can be left undefined if the PrimeCell API is used for configuring
50 * this. 53 * this.
51 * @single: the device connected to this chann 54 * @single: the device connected to this channel will request single DMA
52 * transfers, not bursts. (Bursts are default. 55 * transfers, not bursts. (Bursts are default.)
53 * @periph_buses: the device connected to this 56 * @periph_buses: the device connected to this channel is accessible via
54 * these buses (use PL08X_AHB1 | PL08X_AHB2). 57 * these buses (use PL08X_AHB1 | PL08X_AHB2).
55 */ 58 */
56 struct pl08x_channel_data { 59 struct pl08x_channel_data {
57 const char *bus_id; 60 const char *bus_id;
58 int min_signal; 61 int min_signal;
59 int max_signal; 62 int max_signal;
60 u32 muxval; 63 u32 muxval;
61 dma_addr_t addr; 64 dma_addr_t addr;
62 bool single; 65 bool single;
63 u8 periph_buses; 66 u8 periph_buses;
64 }; 67 };
65 68
66 enum pl08x_burst_size { 69 enum pl08x_burst_size {
67 PL08X_BURST_SZ_1, 70 PL08X_BURST_SZ_1,
68 PL08X_BURST_SZ_4, 71 PL08X_BURST_SZ_4,
69 PL08X_BURST_SZ_8, 72 PL08X_BURST_SZ_8,
70 PL08X_BURST_SZ_16, 73 PL08X_BURST_SZ_16,
71 PL08X_BURST_SZ_32, 74 PL08X_BURST_SZ_32,
72 PL08X_BURST_SZ_64, 75 PL08X_BURST_SZ_64,
73 PL08X_BURST_SZ_128, 76 PL08X_BURST_SZ_128,
74 PL08X_BURST_SZ_256, 77 PL08X_BURST_SZ_256,
75 }; 78 };
76 79
77 enum pl08x_bus_width { 80 enum pl08x_bus_width {
78 PL08X_BUS_WIDTH_8_BITS, 81 PL08X_BUS_WIDTH_8_BITS,
79 PL08X_BUS_WIDTH_16_BITS, 82 PL08X_BUS_WIDTH_16_BITS,
80 PL08X_BUS_WIDTH_32_BITS, 83 PL08X_BUS_WIDTH_32_BITS,
81 }; 84 };
82 85
83 /** 86 /**
84 * struct pl08x_platform_data - the platform c 87 * struct pl08x_platform_data - the platform configuration for the PL08x
85 * PrimeCells. 88 * PrimeCells.
86 * @slave_channels: the channels defined for t 89 * @slave_channels: the channels defined for the different devices on the
87 * platform, all inclusive, including multiple 90 * platform, all inclusive, including multiplexed channels. The available
88 * physical channels will be multiplexed aroun 91 * physical channels will be multiplexed around these signals as they are
89 * requested, just enumerate all possible chan 92 * requested, just enumerate all possible channels.
90 * @num_slave_channels: number of elements in 93 * @num_slave_channels: number of elements in the slave channel array
91 * @memcpy_burst_size: the appropriate burst s 94 * @memcpy_burst_size: the appropriate burst size for memcpy operations
92 * @memcpy_bus_width: memory bus width 95 * @memcpy_bus_width: memory bus width
93 * @memcpy_prot_buff: whether memcpy DMA is bu 96 * @memcpy_prot_buff: whether memcpy DMA is bufferable
94 * @memcpy_prot_cache: whether memcpy DMA is c 97 * @memcpy_prot_cache: whether memcpy DMA is cacheable
95 * @get_xfer_signal: request a physical signal 98 * @get_xfer_signal: request a physical signal to be used for a DMA transfer
96 * immediately: if there is some multiplexing 99 * immediately: if there is some multiplexing or similar blocking the use
97 * of the channel the transfer can be denied b 100 * of the channel the transfer can be denied by returning less than zero,
98 * else it returns the allocated signal number 101 * else it returns the allocated signal number
99 * @put_xfer_signal: indicate to the platform 102 * @put_xfer_signal: indicate to the platform that this physical signal is not
100 * running any DMA transfer and multiplexing c 103 * running any DMA transfer and multiplexing can be recycled
101 * @lli_buses: buses which LLIs can be fetched 104 * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2
102 * @mem_buses: buses which memory can be acces 105 * @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2
103 * @slave_map: DMA slave matching table 106 * @slave_map: DMA slave matching table
104 * @slave_map_len: number of elements in @slav 107 * @slave_map_len: number of elements in @slave_map
105 */ 108 */
106 struct pl08x_platform_data { 109 struct pl08x_platform_data {
107 struct pl08x_channel_data *slave_chann 110 struct pl08x_channel_data *slave_channels;
108 unsigned int num_slave_channels; 111 unsigned int num_slave_channels;
109 enum pl08x_burst_size memcpy_burst_siz 112 enum pl08x_burst_size memcpy_burst_size;
110 enum pl08x_bus_width memcpy_bus_width; 113 enum pl08x_bus_width memcpy_bus_width;
111 bool memcpy_prot_buff; 114 bool memcpy_prot_buff;
112 bool memcpy_prot_cache; 115 bool memcpy_prot_cache;
113 int (*get_xfer_signal)(const struct pl 116 int (*get_xfer_signal)(const struct pl08x_channel_data *);
114 void (*put_xfer_signal)(const struct p 117 void (*put_xfer_signal)(const struct pl08x_channel_data *, int);
115 u8 lli_buses; 118 u8 lli_buses;
116 u8 mem_buses; 119 u8 mem_buses;
117 const struct dma_slave_map *slave_map; 120 const struct dma_slave_map *slave_map;
118 int slave_map_len; 121 int slave_map_len;
119 }; 122 };
120 123
121 #ifdef CONFIG_AMBA_PL08X 124 #ifdef CONFIG_AMBA_PL08X
122 bool pl08x_filter_id(struct dma_chan *chan, vo 125 bool pl08x_filter_id(struct dma_chan *chan, void *chan_id);
123 #else 126 #else
124 static inline bool pl08x_filter_id(struct dma_ 127 static inline bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
125 { 128 {
126 return false; 129 return false;
127 } 130 }
128 #endif 131 #endif
129 132
130 #endif /* AMBA_PL08X_H */ 133 #endif /* AMBA_PL08X_H */
131 134
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