1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * linux/amba/pl08x.h - ARM PrimeCell DMA Cont 2 * linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver
4 * 3 *
5 * Copyright (C) 2005 ARM Ltd 4 * Copyright (C) 2005 ARM Ltd
6 * Copyright (C) 2010 ST-Ericsson SA 5 * Copyright (C) 2010 ST-Ericsson SA
7 * 6 *
>> 7 * This program is free software; you can redistribute it and/or modify
>> 8 * it under the terms of the GNU General Public License version 2 as
>> 9 * published by the Free Software Foundation.
>> 10 *
8 * pl08x information required by platform code 11 * pl08x information required by platform code
9 * 12 *
10 * Please credit ARM.com 13 * Please credit ARM.com
11 * Documentation: ARM DDI 0196D 14 * Documentation: ARM DDI 0196D
12 */ 15 */
13 16
14 #ifndef AMBA_PL08X_H 17 #ifndef AMBA_PL08X_H
15 #define AMBA_PL08X_H 18 #define AMBA_PL08X_H
16 19
17 /* We need sizes of structs from this header * 20 /* We need sizes of structs from this header */
18 #include <linux/dmaengine.h> 21 #include <linux/dmaengine.h>
19 #include <linux/interrupt.h> 22 #include <linux/interrupt.h>
20 23
21 struct pl08x_driver_data; 24 struct pl08x_driver_data;
22 struct pl08x_phy_chan; 25 struct pl08x_phy_chan;
23 struct pl08x_txd; 26 struct pl08x_txd;
24 27
25 /* Bitmasks for selecting AHB ports for DMA tr 28 /* Bitmasks for selecting AHB ports for DMA transfers */
26 enum { 29 enum {
27 PL08X_AHB1 = (1 << 0), 30 PL08X_AHB1 = (1 << 0),
28 PL08X_AHB2 = (1 << 1) 31 PL08X_AHB2 = (1 << 1)
29 }; 32 };
30 33
31 /** 34 /**
32 * struct pl08x_channel_data - data structure 35 * struct pl08x_channel_data - data structure to pass info between
33 * platform and PL08x driver regarding channel 36 * platform and PL08x driver regarding channel configuration
34 * @bus_id: name of this device channel, not j 37 * @bus_id: name of this device channel, not just a device name since
35 * devices may have more than one channel e.g. 38 * devices may have more than one channel e.g. "foo_tx"
36 * @min_signal: the minimum DMA signal number 39 * @min_signal: the minimum DMA signal number to be muxed in for this
37 * channel (for platforms supporting muxed sig 40 * channel (for platforms supporting muxed signals). If you have
38 * static assignments, make sure this is set t 41 * static assignments, make sure this is set to the assigned signal
39 * number, PL08x have 16 possible signals in n 42 * number, PL08x have 16 possible signals in number 0 thru 15 so
40 * when these are not enough they often get mu 43 * when these are not enough they often get muxed (in hardware)
41 * disabling simultaneous use of the same chan 44 * disabling simultaneous use of the same channel for two devices.
42 * @max_signal: the maximum DMA signal number 45 * @max_signal: the maximum DMA signal number to be muxed in for
43 * the channel. Set to the same as min_signal 46 * the channel. Set to the same as min_signal for
44 * devices with static assignments 47 * devices with static assignments
45 * @muxval: a number usually used to poke into 48 * @muxval: a number usually used to poke into some mux regiser to
46 * mux in the signal to this channel 49 * mux in the signal to this channel
>> 50 * @cctl_memcpy: options for the channel control register for memcpy
>> 51 * *** not used for slave channels ***
47 * @addr: source/target address in physical me 52 * @addr: source/target address in physical memory for this DMA channel,
48 * can be the address of a FIFO register for b 53 * can be the address of a FIFO register for burst requests for example.
49 * This can be left undefined if the PrimeCell 54 * This can be left undefined if the PrimeCell API is used for configuring
50 * this. 55 * this.
51 * @single: the device connected to this chann 56 * @single: the device connected to this channel will request single DMA
52 * transfers, not bursts. (Bursts are default. 57 * transfers, not bursts. (Bursts are default.)
53 * @periph_buses: the device connected to this 58 * @periph_buses: the device connected to this channel is accessible via
54 * these buses (use PL08X_AHB1 | PL08X_AHB2). 59 * these buses (use PL08X_AHB1 | PL08X_AHB2).
55 */ 60 */
56 struct pl08x_channel_data { 61 struct pl08x_channel_data {
57 const char *bus_id; 62 const char *bus_id;
58 int min_signal; 63 int min_signal;
59 int max_signal; 64 int max_signal;
60 u32 muxval; 65 u32 muxval;
>> 66 u32 cctl_memcpy;
61 dma_addr_t addr; 67 dma_addr_t addr;
62 bool single; 68 bool single;
63 u8 periph_buses; 69 u8 periph_buses;
64 }; 70 };
65 71
66 enum pl08x_burst_size { <<
67 PL08X_BURST_SZ_1, <<
68 PL08X_BURST_SZ_4, <<
69 PL08X_BURST_SZ_8, <<
70 PL08X_BURST_SZ_16, <<
71 PL08X_BURST_SZ_32, <<
72 PL08X_BURST_SZ_64, <<
73 PL08X_BURST_SZ_128, <<
74 PL08X_BURST_SZ_256, <<
75 }; <<
76 <<
77 enum pl08x_bus_width { <<
78 PL08X_BUS_WIDTH_8_BITS, <<
79 PL08X_BUS_WIDTH_16_BITS, <<
80 PL08X_BUS_WIDTH_32_BITS, <<
81 }; <<
82 <<
83 /** 72 /**
84 * struct pl08x_platform_data - the platform c 73 * struct pl08x_platform_data - the platform configuration for the PL08x
85 * PrimeCells. 74 * PrimeCells.
86 * @slave_channels: the channels defined for t 75 * @slave_channels: the channels defined for the different devices on the
87 * platform, all inclusive, including multiple 76 * platform, all inclusive, including multiplexed channels. The available
88 * physical channels will be multiplexed aroun 77 * physical channels will be multiplexed around these signals as they are
89 * requested, just enumerate all possible chan 78 * requested, just enumerate all possible channels.
90 * @num_slave_channels: number of elements in <<
91 * @memcpy_burst_size: the appropriate burst s <<
92 * @memcpy_bus_width: memory bus width <<
93 * @memcpy_prot_buff: whether memcpy DMA is bu <<
94 * @memcpy_prot_cache: whether memcpy DMA is c <<
95 * @get_xfer_signal: request a physical signal 79 * @get_xfer_signal: request a physical signal to be used for a DMA transfer
96 * immediately: if there is some multiplexing 80 * immediately: if there is some multiplexing or similar blocking the use
97 * of the channel the transfer can be denied b 81 * of the channel the transfer can be denied by returning less than zero,
98 * else it returns the allocated signal number 82 * else it returns the allocated signal number
99 * @put_xfer_signal: indicate to the platform 83 * @put_xfer_signal: indicate to the platform that this physical signal is not
100 * running any DMA transfer and multiplexing c 84 * running any DMA transfer and multiplexing can be recycled
101 * @lli_buses: buses which LLIs can be fetched 85 * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2
102 * @mem_buses: buses which memory can be acces 86 * @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2
103 * @slave_map: DMA slave matching table 87 * @slave_map: DMA slave matching table
104 * @slave_map_len: number of elements in @slav 88 * @slave_map_len: number of elements in @slave_map
105 */ 89 */
106 struct pl08x_platform_data { 90 struct pl08x_platform_data {
107 struct pl08x_channel_data *slave_chann 91 struct pl08x_channel_data *slave_channels;
108 unsigned int num_slave_channels; 92 unsigned int num_slave_channels;
109 enum pl08x_burst_size memcpy_burst_siz !! 93 struct pl08x_channel_data memcpy_channel;
110 enum pl08x_bus_width memcpy_bus_width; <<
111 bool memcpy_prot_buff; <<
112 bool memcpy_prot_cache; <<
113 int (*get_xfer_signal)(const struct pl 94 int (*get_xfer_signal)(const struct pl08x_channel_data *);
114 void (*put_xfer_signal)(const struct p 95 void (*put_xfer_signal)(const struct pl08x_channel_data *, int);
115 u8 lli_buses; 96 u8 lli_buses;
116 u8 mem_buses; 97 u8 mem_buses;
117 const struct dma_slave_map *slave_map; 98 const struct dma_slave_map *slave_map;
118 int slave_map_len; 99 int slave_map_len;
119 }; 100 };
120 101
121 #ifdef CONFIG_AMBA_PL08X 102 #ifdef CONFIG_AMBA_PL08X
122 bool pl08x_filter_id(struct dma_chan *chan, vo 103 bool pl08x_filter_id(struct dma_chan *chan, void *chan_id);
123 #else 104 #else
124 static inline bool pl08x_filter_id(struct dma_ 105 static inline bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
125 { 106 {
126 return false; 107 return false;
127 } 108 }
128 #endif 109 #endif
129 110
130 #endif /* AMBA_PL08X_H */ 111 #endif /* AMBA_PL08X_H */
131 112
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