1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * Copyright © 2006, Intel Corporation. 2 * Copyright © 2006, Intel Corporation.
>> 3 *
>> 4 * This program is free software; you can redistribute it and/or modify it
>> 5 * under the terms and conditions of the GNU General Public License,
>> 6 * version 2, as published by the Free Software Foundation.
>> 7 *
>> 8 * This program is distributed in the hope it will be useful, but WITHOUT
>> 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
>> 11 * more details.
>> 12 *
>> 13 * You should have received a copy of the GNU General Public License along with
>> 14 * this program; if not, write to the Free Software Foundation, Inc.,
>> 15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
>> 16 *
4 */ 17 */
5 #ifndef _ASYNC_TX_H_ 18 #ifndef _ASYNC_TX_H_
6 #define _ASYNC_TX_H_ 19 #define _ASYNC_TX_H_
7 #include <linux/dmaengine.h> 20 #include <linux/dmaengine.h>
8 #include <linux/spinlock.h> 21 #include <linux/spinlock.h>
9 #include <linux/interrupt.h> 22 #include <linux/interrupt.h>
10 23
11 /* on architectures without dma-mapping capabi 24 /* on architectures without dma-mapping capabilities we need to ensure
12 * that the asynchronous path compiles away 25 * that the asynchronous path compiles away
13 */ 26 */
14 #ifdef CONFIG_HAS_DMA 27 #ifdef CONFIG_HAS_DMA
15 #define __async_inline 28 #define __async_inline
16 #else 29 #else
17 #define __async_inline __always_inline 30 #define __async_inline __always_inline
18 #endif 31 #endif
19 32
20 /** 33 /**
21 * dma_chan_ref - object used to manage dma ch 34 * dma_chan_ref - object used to manage dma channels received from the
22 * dmaengine core. 35 * dmaengine core.
23 * @chan - the channel being tracked 36 * @chan - the channel being tracked
24 * @node - node for the channel to be placed o 37 * @node - node for the channel to be placed on async_tx_master_list
25 * @rcu - for list_del_rcu 38 * @rcu - for list_del_rcu
26 * @count - number of times this channel is li 39 * @count - number of times this channel is listed in the pool
27 * (for channels with multiple capabiitie 40 * (for channels with multiple capabiities)
28 */ 41 */
29 struct dma_chan_ref { 42 struct dma_chan_ref {
30 struct dma_chan *chan; 43 struct dma_chan *chan;
31 struct list_head node; 44 struct list_head node;
32 struct rcu_head rcu; 45 struct rcu_head rcu;
33 atomic_t count; 46 atomic_t count;
34 }; 47 };
35 48
36 /** 49 /**
37 * async_tx_flags - modifiers for the async_* 50 * async_tx_flags - modifiers for the async_* calls
38 * @ASYNC_TX_XOR_ZERO_DST: this flag must be u 51 * @ASYNC_TX_XOR_ZERO_DST: this flag must be used for xor operations where the
39 * destination address is not a source. The a !! 52 * the destination address is not a source. The asynchronous case handles this
40 * implicitly, the synchronous case needs to z 53 * implicitly, the synchronous case needs to zero the destination block.
41 * @ASYNC_TX_XOR_DROP_DST: this flag must be u 54 * @ASYNC_TX_XOR_DROP_DST: this flag must be used if the destination address is
42 * also one of the source addresses. In the s 55 * also one of the source addresses. In the synchronous case the destination
43 * address is an implied source, whereas the a 56 * address is an implied source, whereas the asynchronous case it must be listed
44 * as a source. The destination address must 57 * as a source. The destination address must be the first address in the source
45 * array. 58 * array.
46 * @ASYNC_TX_ACK: immediately ack the descript 59 * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a
47 * dependency chain 60 * dependency chain
48 * @ASYNC_TX_FENCE: specify that the next oper 61 * @ASYNC_TX_FENCE: specify that the next operation in the dependency
49 * chain uses this operation's result as an in 62 * chain uses this operation's result as an input
50 * @ASYNC_TX_PQ_XOR_DST: do not overwrite the 63 * @ASYNC_TX_PQ_XOR_DST: do not overwrite the syndrome but XOR it with the
51 * input data. Required for rmw case. 64 * input data. Required for rmw case.
52 */ 65 */
53 enum async_tx_flags { 66 enum async_tx_flags {
54 ASYNC_TX_XOR_ZERO_DST = (1 << 0), 67 ASYNC_TX_XOR_ZERO_DST = (1 << 0),
55 ASYNC_TX_XOR_DROP_DST = (1 << 1), 68 ASYNC_TX_XOR_DROP_DST = (1 << 1),
56 ASYNC_TX_ACK = (1 << 2), 69 ASYNC_TX_ACK = (1 << 2),
57 ASYNC_TX_FENCE = (1 << 3), 70 ASYNC_TX_FENCE = (1 << 3),
58 ASYNC_TX_PQ_XOR_DST = (1 << 4), 71 ASYNC_TX_PQ_XOR_DST = (1 << 4),
59 }; 72 };
60 73
61 /** 74 /**
62 * struct async_submit_ctl - async_tx submissi 75 * struct async_submit_ctl - async_tx submission/completion modifiers
63 * @flags: submission modifiers 76 * @flags: submission modifiers
64 * @depend_tx: parent dependency of the curren 77 * @depend_tx: parent dependency of the current operation being submitted
65 * @cb_fn: callback routine to run at operatio 78 * @cb_fn: callback routine to run at operation completion
66 * @cb_param: parameter for the callback routi 79 * @cb_param: parameter for the callback routine
67 * @scribble: caller provided space for dma/pa 80 * @scribble: caller provided space for dma/page address conversions
68 */ 81 */
69 struct async_submit_ctl { 82 struct async_submit_ctl {
70 enum async_tx_flags flags; 83 enum async_tx_flags flags;
71 struct dma_async_tx_descriptor *depend 84 struct dma_async_tx_descriptor *depend_tx;
72 dma_async_tx_callback cb_fn; 85 dma_async_tx_callback cb_fn;
73 void *cb_param; 86 void *cb_param;
74 void *scribble; 87 void *scribble;
75 }; 88 };
76 89
77 #if defined(CONFIG_DMA_ENGINE) && !defined(CON !! 90 #ifdef CONFIG_DMA_ENGINE
78 #define async_tx_issue_pending_all dma_issue_p 91 #define async_tx_issue_pending_all dma_issue_pending_all
79 92
80 /** 93 /**
81 * async_tx_issue_pending - send pending descr 94 * async_tx_issue_pending - send pending descriptor to the hardware channel
82 * @tx: descriptor handle to retrieve hardware 95 * @tx: descriptor handle to retrieve hardware context
83 * 96 *
84 * Note: any dependent operations will have al 97 * Note: any dependent operations will have already been issued by
85 * async_tx_channel_switch, or (in the case of 98 * async_tx_channel_switch, or (in the case of no channel switch) will
86 * be already pending on this channel. 99 * be already pending on this channel.
87 */ 100 */
88 static inline void async_tx_issue_pending(stru 101 static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
89 { 102 {
90 if (likely(tx)) { 103 if (likely(tx)) {
91 struct dma_chan *chan = tx->ch 104 struct dma_chan *chan = tx->chan;
92 struct dma_device *dma = chan- 105 struct dma_device *dma = chan->device;
93 106
94 dma->device_issue_pending(chan 107 dma->device_issue_pending(chan);
95 } 108 }
96 } 109 }
97 #ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL 110 #ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL
98 #include <asm/async_tx.h> 111 #include <asm/async_tx.h>
99 #else 112 #else
100 #define async_tx_find_channel(dep, type, dst, 113 #define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \
101 __async_tx_find_channel(dep, type) 114 __async_tx_find_channel(dep, type)
102 struct dma_chan * 115 struct dma_chan *
103 __async_tx_find_channel(struct async_submit_ct 116 __async_tx_find_channel(struct async_submit_ctl *submit,
104 enum dma_transaction_t 117 enum dma_transaction_type tx_type);
105 #endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNE 118 #endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL */
106 #else 119 #else
107 static inline void async_tx_issue_pending_all( 120 static inline void async_tx_issue_pending_all(void)
108 { 121 {
109 do { } while (0); 122 do { } while (0);
110 } 123 }
111 124
112 static inline void async_tx_issue_pending(stru 125 static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
113 { 126 {
114 do { } while (0); 127 do { } while (0);
115 } 128 }
116 129
117 static inline struct dma_chan * 130 static inline struct dma_chan *
118 async_tx_find_channel(struct async_submit_ctl 131 async_tx_find_channel(struct async_submit_ctl *submit,
119 enum dma_transaction_typ 132 enum dma_transaction_type tx_type, struct page **dst,
120 int dst_count, struct pa 133 int dst_count, struct page **src, int src_count,
121 size_t len) 134 size_t len)
122 { 135 {
123 return NULL; 136 return NULL;
124 } 137 }
125 #endif 138 #endif
126 139
127 /** 140 /**
128 * async_tx_sync_epilog - actions to take if a 141 * async_tx_sync_epilog - actions to take if an operation is run synchronously
129 * @cb_fn: function to call when the transacti 142 * @cb_fn: function to call when the transaction completes
130 * @cb_fn_param: parameter to pass to the call 143 * @cb_fn_param: parameter to pass to the callback routine
131 */ 144 */
132 static inline void 145 static inline void
133 async_tx_sync_epilog(struct async_submit_ctl * 146 async_tx_sync_epilog(struct async_submit_ctl *submit)
134 { 147 {
135 if (submit->cb_fn) 148 if (submit->cb_fn)
136 submit->cb_fn(submit->cb_param 149 submit->cb_fn(submit->cb_param);
137 } 150 }
138 151
139 typedef union { 152 typedef union {
140 unsigned long addr; 153 unsigned long addr;
141 struct page *page; 154 struct page *page;
142 dma_addr_t dma; 155 dma_addr_t dma;
143 } addr_conv_t; 156 } addr_conv_t;
144 157
145 static inline void 158 static inline void
146 init_async_submit(struct async_submit_ctl *arg 159 init_async_submit(struct async_submit_ctl *args, enum async_tx_flags flags,
147 struct dma_async_tx_descript 160 struct dma_async_tx_descriptor *tx,
148 dma_async_tx_callback cb_fn, 161 dma_async_tx_callback cb_fn, void *cb_param,
149 addr_conv_t *scribble) 162 addr_conv_t *scribble)
150 { 163 {
151 args->flags = flags; 164 args->flags = flags;
152 args->depend_tx = tx; 165 args->depend_tx = tx;
153 args->cb_fn = cb_fn; 166 args->cb_fn = cb_fn;
154 args->cb_param = cb_param; 167 args->cb_param = cb_param;
155 args->scribble = scribble; 168 args->scribble = scribble;
156 } 169 }
157 170
158 void async_tx_submit(struct dma_chan *chan, st 171 void async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
159 struct async_submit_ctl * 172 struct async_submit_ctl *submit);
160 173
161 struct dma_async_tx_descriptor * 174 struct dma_async_tx_descriptor *
162 async_xor(struct page *dest, struct page **src 175 async_xor(struct page *dest, struct page **src_list, unsigned int offset,
163 int src_cnt, size_t len, struct asyn 176 int src_cnt, size_t len, struct async_submit_ctl *submit);
164 177
165 struct dma_async_tx_descriptor * 178 struct dma_async_tx_descriptor *
166 async_xor_offs(struct page *dest, unsigned int <<
167 struct page **src_list, unsign <<
168 int src_cnt, size_t len, struc <<
169 <<
170 struct dma_async_tx_descriptor * <<
171 async_xor_val(struct page *dest, struct page * 179 async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
172 int src_cnt, size_t len, enum su 180 int src_cnt, size_t len, enum sum_check_flags *result,
173 struct async_submit_ctl *submit) 181 struct async_submit_ctl *submit);
174 182
175 struct dma_async_tx_descriptor * 183 struct dma_async_tx_descriptor *
176 async_xor_val_offs(struct page *dest, unsigned <<
177 struct page **src_list, unsign <<
178 int src_cnt, size_t len, enum <<
179 struct async_submit_ctl *submi <<
180 <<
181 struct dma_async_tx_descriptor * <<
182 async_memcpy(struct page *dest, struct page *s 184 async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
183 unsigned int src_offset, size_t l 185 unsigned int src_offset, size_t len,
184 struct async_submit_ctl *submit); 186 struct async_submit_ctl *submit);
185 187
186 struct dma_async_tx_descriptor *async_trigger_ 188 struct dma_async_tx_descriptor *async_trigger_callback(struct async_submit_ctl *submit);
187 189
188 struct dma_async_tx_descriptor * 190 struct dma_async_tx_descriptor *
189 async_gen_syndrome(struct page **blocks, unsig !! 191 async_gen_syndrome(struct page **blocks, unsigned int offset, int src_cnt,
190 size_t len, struct async_su 192 size_t len, struct async_submit_ctl *submit);
191 193
192 struct dma_async_tx_descriptor * 194 struct dma_async_tx_descriptor *
193 async_syndrome_val(struct page **blocks, unsig !! 195 async_syndrome_val(struct page **blocks, unsigned int offset, int src_cnt,
194 size_t len, enum sum_check_ 196 size_t len, enum sum_check_flags *pqres, struct page *spare,
195 unsigned int s_off, struct !! 197 struct async_submit_ctl *submit);
196 198
197 struct dma_async_tx_descriptor * 199 struct dma_async_tx_descriptor *
198 async_raid6_2data_recov(int src_num, size_t by 200 async_raid6_2data_recov(int src_num, size_t bytes, int faila, int failb,
199 struct page **ptrs, un !! 201 struct page **ptrs, struct async_submit_ctl *submit);
200 struct async_submit_ct <<
201 202
202 struct dma_async_tx_descriptor * 203 struct dma_async_tx_descriptor *
203 async_raid6_datap_recov(int src_num, size_t by 204 async_raid6_datap_recov(int src_num, size_t bytes, int faila,
204 struct page **ptrs, un !! 205 struct page **ptrs, struct async_submit_ctl *submit);
205 struct async_submit_ct <<
206 206
207 void async_tx_quiesce(struct dma_async_tx_desc 207 void async_tx_quiesce(struct dma_async_tx_descriptor **tx);
208 #endif /* _ASYNC_TX_H_ */ 208 #endif /* _ASYNC_TX_H_ */
209 209
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