1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 2 /* 3 * Copyright (C) 2013 Xilinx Inc. 3 * Copyright (C) 2013 Xilinx Inc. 4 * Copyright (C) 2012 National Instruments 4 * Copyright (C) 2012 National Instruments 5 */ 5 */ 6 6 7 #ifndef __LINUX_CLK_ZYNQ_H_ 7 #ifndef __LINUX_CLK_ZYNQ_H_ 8 #define __LINUX_CLK_ZYNQ_H_ 8 #define __LINUX_CLK_ZYNQ_H_ 9 9 10 #include <linux/spinlock.h> 10 #include <linux/spinlock.h> 11 11 12 void zynq_clock_init(void); 12 void zynq_clock_init(void); 13 13 14 struct clk *clk_register_zynq_pll(const char * 14 struct clk *clk_register_zynq_pll(const char *name, const char *parent, 15 void __iomem *pll_ctrl, void _ 15 void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index, 16 spinlock_t *lock); 16 spinlock_t *lock); 17 #endif 17 #endif 18 18
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