1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* 2 /*
3 * Internals of the DMA direct mapping impleme 3 * Internals of the DMA direct mapping implementation. Only for use by the
4 * DMA mapping code and IOMMU drivers. 4 * DMA mapping code and IOMMU drivers.
5 */ 5 */
6 #ifndef _LINUX_DMA_DIRECT_H 6 #ifndef _LINUX_DMA_DIRECT_H
7 #define _LINUX_DMA_DIRECT_H 1 7 #define _LINUX_DMA_DIRECT_H 1
8 8
9 #include <linux/dma-mapping.h> 9 #include <linux/dma-mapping.h>
10 #include <linux/dma-map-ops.h> 10 #include <linux/dma-map-ops.h>
11 #include <linux/memblock.h> /* for min_low_pfn 11 #include <linux/memblock.h> /* for min_low_pfn */
12 #include <linux/mem_encrypt.h> 12 #include <linux/mem_encrypt.h>
13 #include <linux/swiotlb.h> 13 #include <linux/swiotlb.h>
14 14
15 extern unsigned int zone_dma_bits; 15 extern unsigned int zone_dma_bits;
16 16
17 /* 17 /*
18 * Record the mapping of CPU physical to DMA a 18 * Record the mapping of CPU physical to DMA addresses for a given region.
19 */ 19 */
20 struct bus_dma_region { 20 struct bus_dma_region {
21 phys_addr_t cpu_start; 21 phys_addr_t cpu_start;
22 dma_addr_t dma_start; 22 dma_addr_t dma_start;
23 u64 size; 23 u64 size;
24 }; 24 };
25 25
26 static inline dma_addr_t translate_phys_to_dma 26 static inline dma_addr_t translate_phys_to_dma(struct device *dev,
27 phys_addr_t paddr) 27 phys_addr_t paddr)
28 { 28 {
29 const struct bus_dma_region *m; 29 const struct bus_dma_region *m;
30 30
31 for (m = dev->dma_range_map; m->size; 31 for (m = dev->dma_range_map; m->size; m++) {
32 u64 offset = paddr - m->cpu_st 32 u64 offset = paddr - m->cpu_start;
33 33
34 if (paddr >= m->cpu_start && o 34 if (paddr >= m->cpu_start && offset < m->size)
35 return m->dma_start + 35 return m->dma_start + offset;
36 } 36 }
37 37
38 /* make sure dma_capable fails when no 38 /* make sure dma_capable fails when no translation is available */
39 return DMA_MAPPING_ERROR; 39 return DMA_MAPPING_ERROR;
40 } 40 }
41 41
42 static inline phys_addr_t translate_dma_to_phy 42 static inline phys_addr_t translate_dma_to_phys(struct device *dev,
43 dma_addr_t dma_addr) 43 dma_addr_t dma_addr)
44 { 44 {
45 const struct bus_dma_region *m; 45 const struct bus_dma_region *m;
46 46
47 for (m = dev->dma_range_map; m->size; 47 for (m = dev->dma_range_map; m->size; m++) {
48 u64 offset = dma_addr - m->dma 48 u64 offset = dma_addr - m->dma_start;
49 49
50 if (dma_addr >= m->dma_start & 50 if (dma_addr >= m->dma_start && offset < m->size)
51 return m->cpu_start + 51 return m->cpu_start + offset;
52 } 52 }
53 53
54 return (phys_addr_t)-1; 54 return (phys_addr_t)-1;
55 } 55 }
56 56
57 static inline dma_addr_t dma_range_map_min(con 57 static inline dma_addr_t dma_range_map_min(const struct bus_dma_region *map)
58 { 58 {
59 dma_addr_t ret = (dma_addr_t)U64_MAX; 59 dma_addr_t ret = (dma_addr_t)U64_MAX;
60 60
61 for (; map->size; map++) 61 for (; map->size; map++)
62 ret = min(ret, map->dma_start) 62 ret = min(ret, map->dma_start);
63 return ret; 63 return ret;
64 } 64 }
65 65
66 static inline dma_addr_t dma_range_map_max(con 66 static inline dma_addr_t dma_range_map_max(const struct bus_dma_region *map)
67 { 67 {
68 dma_addr_t ret = 0; 68 dma_addr_t ret = 0;
69 69
70 for (; map->size; map++) 70 for (; map->size; map++)
71 ret = max(ret, map->dma_start 71 ret = max(ret, map->dma_start + map->size - 1);
72 return ret; 72 return ret;
73 } 73 }
74 74
75 #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA 75 #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA
76 #include <asm/dma-direct.h> 76 #include <asm/dma-direct.h>
77 #ifndef phys_to_dma_unencrypted 77 #ifndef phys_to_dma_unencrypted
78 #define phys_to_dma_unencrypted phys_t 78 #define phys_to_dma_unencrypted phys_to_dma
79 #endif 79 #endif
80 #else 80 #else
81 static inline dma_addr_t phys_to_dma_unencrypt 81 static inline dma_addr_t phys_to_dma_unencrypted(struct device *dev,
82 phys_addr_t paddr) 82 phys_addr_t paddr)
83 { 83 {
84 if (dev->dma_range_map) 84 if (dev->dma_range_map)
85 return translate_phys_to_dma(d 85 return translate_phys_to_dma(dev, paddr);
86 return paddr; 86 return paddr;
87 } 87 }
88 88
89 /* 89 /*
90 * If memory encryption is supported, phys_to_ 90 * If memory encryption is supported, phys_to_dma will set the memory encryption
91 * bit in the DMA address, and dma_to_phys wil 91 * bit in the DMA address, and dma_to_phys will clear it.
92 * phys_to_dma_unencrypted is for use on speci 92 * phys_to_dma_unencrypted is for use on special unencrypted memory like swiotlb
93 * buffers. 93 * buffers.
94 */ 94 */
95 static inline dma_addr_t phys_to_dma(struct de 95 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
96 { 96 {
97 return __sme_set(phys_to_dma_unencrypt 97 return __sme_set(phys_to_dma_unencrypted(dev, paddr));
98 } 98 }
99 99
100 static inline phys_addr_t dma_to_phys(struct d 100 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dma_addr)
101 { 101 {
102 phys_addr_t paddr; 102 phys_addr_t paddr;
103 103
104 if (dev->dma_range_map) 104 if (dev->dma_range_map)
105 paddr = translate_dma_to_phys( 105 paddr = translate_dma_to_phys(dev, dma_addr);
106 else 106 else
107 paddr = dma_addr; 107 paddr = dma_addr;
108 108
109 return __sme_clr(paddr); 109 return __sme_clr(paddr);
110 } 110 }
111 #endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ 111 #endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */
112 112
113 #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED 113 #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED
114 bool force_dma_unencrypted(struct device *dev) 114 bool force_dma_unencrypted(struct device *dev);
115 #else 115 #else
116 static inline bool force_dma_unencrypted(struc 116 static inline bool force_dma_unencrypted(struct device *dev)
117 { 117 {
118 return false; 118 return false;
119 } 119 }
120 #endif /* CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTE 120 #endif /* CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED */
121 121
122 static inline bool dma_capable(struct device * 122 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size,
123 bool is_ram) 123 bool is_ram)
124 { 124 {
125 dma_addr_t end = addr + size - 1; 125 dma_addr_t end = addr + size - 1;
126 126
127 if (addr == DMA_MAPPING_ERROR) 127 if (addr == DMA_MAPPING_ERROR)
128 return false; 128 return false;
129 if (is_ram && !IS_ENABLED(CONFIG_ARCH_ 129 if (is_ram && !IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) &&
130 min(addr, end) < phys_to_dma(dev, 130 min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn)))
131 return false; 131 return false;
132 132
133 return end <= min_not_zero(*dev->dma_m 133 return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_limit);
134 } 134 }
135 135
136 u64 dma_direct_get_required_mask(struct device 136 u64 dma_direct_get_required_mask(struct device *dev);
137 void *dma_direct_alloc(struct device *dev, siz 137 void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
138 gfp_t gfp, unsigned long attrs 138 gfp_t gfp, unsigned long attrs);
139 void dma_direct_free(struct device *dev, size_ 139 void dma_direct_free(struct device *dev, size_t size, void *cpu_addr,
140 dma_addr_t dma_addr, unsigned 140 dma_addr_t dma_addr, unsigned long attrs);
141 struct page *dma_direct_alloc_pages(struct dev 141 struct page *dma_direct_alloc_pages(struct device *dev, size_t size,
142 dma_addr_t *dma_handle, enum d 142 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
143 void dma_direct_free_pages(struct device *dev, 143 void dma_direct_free_pages(struct device *dev, size_t size,
144 struct page *page, dma_addr_t 144 struct page *page, dma_addr_t dma_addr,
145 enum dma_data_direction dir); 145 enum dma_data_direction dir);
146 int dma_direct_supported(struct device *dev, u 146 int dma_direct_supported(struct device *dev, u64 mask);
147 dma_addr_t dma_direct_map_resource(struct devi 147 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
148 size_t size, enum dma_data_dir 148 size_t size, enum dma_data_direction dir, unsigned long attrs);
149 149
150 #endif /* _LINUX_DMA_DIRECT_H */ 150 #endif /* _LINUX_DMA_DIRECT_H */
151 151
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