1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_DMA_MAPPING_H 2 #ifndef _LINUX_DMA_MAPPING_H 3 #define _LINUX_DMA_MAPPING_H 3 #define _LINUX_DMA_MAPPING_H 4 4 5 #include <linux/cache.h> 5 #include <linux/cache.h> 6 #include <linux/sizes.h> 6 #include <linux/sizes.h> 7 #include <linux/string.h> 7 #include <linux/string.h> 8 #include <linux/device.h> 8 #include <linux/device.h> 9 #include <linux/err.h> 9 #include <linux/err.h> 10 #include <linux/dma-direction.h> 10 #include <linux/dma-direction.h> 11 #include <linux/scatterlist.h> 11 #include <linux/scatterlist.h> 12 #include <linux/bug.h> 12 #include <linux/bug.h> 13 #include <linux/mem_encrypt.h> 13 #include <linux/mem_encrypt.h> 14 14 15 /** 15 /** 16 * List of possible attributes associated with 16 * List of possible attributes associated with a DMA mapping. The semantics 17 * of each attribute should be defined in Docu 17 * of each attribute should be defined in Documentation/core-api/dma-attributes.rst. 18 */ 18 */ 19 19 20 /* 20 /* 21 * DMA_ATTR_WEAK_ORDERING: Specifies that read 21 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping 22 * may be weakly ordered, that is that reads a 22 * may be weakly ordered, that is that reads and writes may pass each other. 23 */ 23 */ 24 #define DMA_ATTR_WEAK_ORDERING (1UL < 24 #define DMA_ATTR_WEAK_ORDERING (1UL << 1) 25 /* 25 /* 26 * DMA_ATTR_WRITE_COMBINE: Specifies that writ 26 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be 27 * buffered to improve performance. 27 * buffered to improve performance. 28 */ 28 */ 29 #define DMA_ATTR_WRITE_COMBINE (1UL < 29 #define DMA_ATTR_WRITE_COMBINE (1UL << 2) 30 /* 30 /* 31 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platfo 31 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel 32 * virtual mapping for the allocated buffer. 32 * virtual mapping for the allocated buffer. 33 */ 33 */ 34 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL < 34 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) 35 /* 35 /* 36 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform cod 36 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of 37 * the CPU cache for the given buffer assuming 37 * the CPU cache for the given buffer assuming that it has been already 38 * transferred to 'device' domain. 38 * transferred to 'device' domain. 39 */ 39 */ 40 #define DMA_ATTR_SKIP_CPU_SYNC (1UL < 40 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) 41 /* 41 /* 42 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguou 42 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer 43 * in physical memory. 43 * in physical memory. 44 */ 44 */ 45 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL < 45 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) 46 /* 46 /* 47 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint 47 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem 48 * that it's probably not worth the time to tr 48 * that it's probably not worth the time to try to allocate memory to in a way 49 * that gives better TLB efficiency. 49 * that gives better TLB efficiency. 50 */ 50 */ 51 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL < 51 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) 52 /* 52 /* 53 * DMA_ATTR_NO_WARN: This tells the DMA-mappin 53 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress 54 * allocation failure reports (similarly to __ 54 * allocation failure reports (similarly to __GFP_NOWARN). 55 */ 55 */ 56 #define DMA_ATTR_NO_WARN (1UL << 8) 56 #define DMA_ATTR_NO_WARN (1UL << 8) 57 57 58 /* 58 /* 59 * DMA_ATTR_PRIVILEGED: used to indicate that 59 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully 60 * accessible at an elevated privilege level ( 60 * accessible at an elevated privilege level (and ideally inaccessible or 61 * at least read-only at lesser-privileged lev 61 * at least read-only at lesser-privileged levels). 62 */ 62 */ 63 #define DMA_ATTR_PRIVILEGED (1UL < 63 #define DMA_ATTR_PRIVILEGED (1UL << 9) 64 64 65 /* 65 /* 66 * A dma_addr_t can hold any valid DMA or bus 66 * A dma_addr_t can hold any valid DMA or bus address for the platform. It can 67 * be given to a device to use as a DMA source 67 * be given to a device to use as a DMA source or target. It is specific to a 68 * given device and there may be a translation 68 * given device and there may be a translation between the CPU physical address 69 * space and the bus address space. 69 * space and the bus address space. 70 * 70 * 71 * DMA_MAPPING_ERROR is the magic error code i 71 * DMA_MAPPING_ERROR is the magic error code if a mapping failed. It should not 72 * be used directly in drivers, but checked fo 72 * be used directly in drivers, but checked for using dma_mapping_error() 73 * instead. 73 * instead. 74 */ 74 */ 75 #define DMA_MAPPING_ERROR (~(dma 75 #define DMA_MAPPING_ERROR (~(dma_addr_t)0) 76 76 77 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : 77 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 78 78 79 #ifdef CONFIG_DMA_API_DEBUG 79 #ifdef CONFIG_DMA_API_DEBUG 80 void debug_dma_mapping_error(struct device *de 80 void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr); 81 void debug_dma_map_single(struct device *dev, 81 void debug_dma_map_single(struct device *dev, const void *addr, 82 unsigned long len); 82 unsigned long len); 83 #else 83 #else 84 static inline void debug_dma_mapping_error(str 84 static inline void debug_dma_mapping_error(struct device *dev, 85 dma_addr_t dma_addr) 85 dma_addr_t dma_addr) 86 { 86 { 87 } 87 } 88 static inline void debug_dma_map_single(struct 88 static inline void debug_dma_map_single(struct device *dev, const void *addr, 89 unsigned long len) 89 unsigned long len) 90 { 90 { 91 } 91 } 92 #endif /* CONFIG_DMA_API_DEBUG */ 92 #endif /* CONFIG_DMA_API_DEBUG */ 93 93 94 #ifdef CONFIG_HAS_DMA 94 #ifdef CONFIG_HAS_DMA 95 static inline int dma_mapping_error(struct dev 95 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 96 { 96 { 97 debug_dma_mapping_error(dev, dma_addr) 97 debug_dma_mapping_error(dev, dma_addr); 98 98 99 if (unlikely(dma_addr == DMA_MAPPING_E 99 if (unlikely(dma_addr == DMA_MAPPING_ERROR)) 100 return -ENOMEM; 100 return -ENOMEM; 101 return 0; 101 return 0; 102 } 102 } 103 103 104 dma_addr_t dma_map_page_attrs(struct device *d 104 dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, 105 size_t offset, size_t size, en 105 size_t offset, size_t size, enum dma_data_direction dir, 106 unsigned long attrs); 106 unsigned long attrs); 107 void dma_unmap_page_attrs(struct device *dev, 107 void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size, 108 enum dma_data_direction dir, u 108 enum dma_data_direction dir, unsigned long attrs); 109 unsigned int dma_map_sg_attrs(struct device *d 109 unsigned int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 110 int nents, enum dma_data_direc 110 int nents, enum dma_data_direction dir, unsigned long attrs); 111 void dma_unmap_sg_attrs(struct device *dev, st 111 void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, 112 int nent 112 int nents, enum dma_data_direction dir, 113 unsigned 113 unsigned long attrs); 114 int dma_map_sgtable(struct device *dev, struct 114 int dma_map_sgtable(struct device *dev, struct sg_table *sgt, 115 enum dma_data_direction dir, u 115 enum dma_data_direction dir, unsigned long attrs); 116 dma_addr_t dma_map_resource(struct device *dev 116 dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr, 117 size_t size, enum dma_data_dir 117 size_t size, enum dma_data_direction dir, unsigned long attrs); 118 void dma_unmap_resource(struct device *dev, dm 118 void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size, 119 enum dma_data_direction dir, u 119 enum dma_data_direction dir, unsigned long attrs); >> 120 void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size, >> 121 enum dma_data_direction dir); >> 122 void dma_sync_single_for_device(struct device *dev, dma_addr_t addr, >> 123 size_t size, enum dma_data_direction dir); >> 124 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, >> 125 int nelems, enum dma_data_direction dir); >> 126 void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, >> 127 int nelems, enum dma_data_direction dir); 120 void *dma_alloc_attrs(struct device *dev, size 128 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 121 gfp_t flag, unsigned long attr 129 gfp_t flag, unsigned long attrs); 122 void dma_free_attrs(struct device *dev, size_t 130 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 123 dma_addr_t dma_handle, unsigne 131 dma_addr_t dma_handle, unsigned long attrs); 124 void *dmam_alloc_attrs(struct device *dev, siz 132 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 125 gfp_t gfp, unsigned long attrs 133 gfp_t gfp, unsigned long attrs); 126 void dmam_free_coherent(struct device *dev, si 134 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 127 dma_addr_t dma_handle); 135 dma_addr_t dma_handle); 128 int dma_get_sgtable_attrs(struct device *dev, 136 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, 129 void *cpu_addr, dma_addr_t dma 137 void *cpu_addr, dma_addr_t dma_addr, size_t size, 130 unsigned long attrs); 138 unsigned long attrs); 131 int dma_mmap_attrs(struct device *dev, struct 139 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 132 void *cpu_addr, dma_addr_t dma 140 void *cpu_addr, dma_addr_t dma_addr, size_t size, 133 unsigned long attrs); 141 unsigned long attrs); 134 bool dma_can_mmap(struct device *dev); 142 bool dma_can_mmap(struct device *dev); 135 bool dma_pci_p2pdma_supported(struct device *d 143 bool dma_pci_p2pdma_supported(struct device *dev); 136 int dma_set_mask(struct device *dev, u64 mask) 144 int dma_set_mask(struct device *dev, u64 mask); 137 int dma_set_coherent_mask(struct device *dev, 145 int dma_set_coherent_mask(struct device *dev, u64 mask); 138 u64 dma_get_required_mask(struct device *dev); 146 u64 dma_get_required_mask(struct device *dev); 139 bool dma_addressing_limited(struct device *dev << 140 size_t dma_max_mapping_size(struct device *dev 147 size_t dma_max_mapping_size(struct device *dev); 141 size_t dma_opt_mapping_size(struct device *dev 148 size_t dma_opt_mapping_size(struct device *dev); >> 149 bool dma_need_sync(struct device *dev, dma_addr_t dma_addr); 142 unsigned long dma_get_merge_boundary(struct de 150 unsigned long dma_get_merge_boundary(struct device *dev); 143 struct sg_table *dma_alloc_noncontiguous(struc 151 struct sg_table *dma_alloc_noncontiguous(struct device *dev, size_t size, 144 enum dma_data_direction dir, g 152 enum dma_data_direction dir, gfp_t gfp, unsigned long attrs); 145 void dma_free_noncontiguous(struct device *dev 153 void dma_free_noncontiguous(struct device *dev, size_t size, 146 struct sg_table *sgt, enum dma 154 struct sg_table *sgt, enum dma_data_direction dir); 147 void *dma_vmap_noncontiguous(struct device *de 155 void *dma_vmap_noncontiguous(struct device *dev, size_t size, 148 struct sg_table *sgt); 156 struct sg_table *sgt); 149 void dma_vunmap_noncontiguous(struct device *d 157 void dma_vunmap_noncontiguous(struct device *dev, void *vaddr); 150 int dma_mmap_noncontiguous(struct device *dev, 158 int dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma, 151 size_t size, struct sg_table * 159 size_t size, struct sg_table *sgt); 152 #else /* CONFIG_HAS_DMA */ 160 #else /* CONFIG_HAS_DMA */ 153 static inline dma_addr_t dma_map_page_attrs(st 161 static inline dma_addr_t dma_map_page_attrs(struct device *dev, 154 struct page *page, size_t offs 162 struct page *page, size_t offset, size_t size, 155 enum dma_data_direction dir, u 163 enum dma_data_direction dir, unsigned long attrs) 156 { 164 { 157 return DMA_MAPPING_ERROR; 165 return DMA_MAPPING_ERROR; 158 } 166 } 159 static inline void dma_unmap_page_attrs(struct 167 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, 160 size_t size, enum dma_data_dir 168 size_t size, enum dma_data_direction dir, unsigned long attrs) 161 { 169 { 162 } 170 } 163 static inline unsigned int dma_map_sg_attrs(st 171 static inline unsigned int dma_map_sg_attrs(struct device *dev, 164 struct scatterlist *sg, int ne 172 struct scatterlist *sg, int nents, enum dma_data_direction dir, 165 unsigned long attrs) 173 unsigned long attrs) 166 { 174 { 167 return 0; 175 return 0; 168 } 176 } 169 static inline void dma_unmap_sg_attrs(struct d 177 static inline void dma_unmap_sg_attrs(struct device *dev, 170 struct scatterlist *sg, int ne 178 struct scatterlist *sg, int nents, enum dma_data_direction dir, 171 unsigned long attrs) 179 unsigned long attrs) 172 { 180 { 173 } 181 } 174 static inline int dma_map_sgtable(struct devic 182 static inline int dma_map_sgtable(struct device *dev, struct sg_table *sgt, 175 enum dma_data_direction dir, u 183 enum dma_data_direction dir, unsigned long attrs) 176 { 184 { 177 return -EOPNOTSUPP; 185 return -EOPNOTSUPP; 178 } 186 } 179 static inline dma_addr_t dma_map_resource(stru 187 static inline dma_addr_t dma_map_resource(struct device *dev, 180 phys_addr_t phys_addr, size_t 188 phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, 181 unsigned long attrs) 189 unsigned long attrs) 182 { 190 { 183 return DMA_MAPPING_ERROR; 191 return DMA_MAPPING_ERROR; 184 } 192 } 185 static inline void dma_unmap_resource(struct d 193 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, 186 size_t size, enum dma_data_dir 194 size_t size, enum dma_data_direction dir, unsigned long attrs) 187 { 195 { 188 } 196 } >> 197 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, >> 198 size_t size, enum dma_data_direction dir) >> 199 { >> 200 } >> 201 static inline void dma_sync_single_for_device(struct device *dev, >> 202 dma_addr_t addr, size_t size, enum dma_data_direction dir) >> 203 { >> 204 } >> 205 static inline void dma_sync_sg_for_cpu(struct device *dev, >> 206 struct scatterlist *sg, int nelems, enum dma_data_direction dir) >> 207 { >> 208 } >> 209 static inline void dma_sync_sg_for_device(struct device *dev, >> 210 struct scatterlist *sg, int nelems, enum dma_data_direction dir) >> 211 { >> 212 } 189 static inline int dma_mapping_error(struct dev 213 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 190 { 214 { 191 return -ENOMEM; 215 return -ENOMEM; 192 } 216 } 193 static inline void *dma_alloc_attrs(struct dev 217 static inline void *dma_alloc_attrs(struct device *dev, size_t size, 194 dma_addr_t *dma_handle, gfp_t 218 dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs) 195 { 219 { 196 return NULL; 220 return NULL; 197 } 221 } 198 static void dma_free_attrs(struct device *dev, 222 static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 199 dma_addr_t dma_handle, unsigne 223 dma_addr_t dma_handle, unsigned long attrs) 200 { 224 { 201 } 225 } 202 static inline void *dmam_alloc_attrs(struct de 226 static inline void *dmam_alloc_attrs(struct device *dev, size_t size, 203 dma_addr_t *dma_handle, gfp_t 227 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 204 { 228 { 205 return NULL; 229 return NULL; 206 } 230 } 207 static inline void dmam_free_coherent(struct d 231 static inline void dmam_free_coherent(struct device *dev, size_t size, 208 void *vaddr, dma_addr_t dma_ha 232 void *vaddr, dma_addr_t dma_handle) 209 { 233 { 210 } 234 } 211 static inline int dma_get_sgtable_attrs(struct 235 static inline int dma_get_sgtable_attrs(struct device *dev, 212 struct sg_table *sgt, void *cp 236 struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, 213 size_t size, unsigned long att 237 size_t size, unsigned long attrs) 214 { 238 { 215 return -ENXIO; 239 return -ENXIO; 216 } 240 } 217 static inline int dma_mmap_attrs(struct device 241 static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 218 void *cpu_addr, dma_addr_t dma 242 void *cpu_addr, dma_addr_t dma_addr, size_t size, 219 unsigned long attrs) 243 unsigned long attrs) 220 { 244 { 221 return -ENXIO; 245 return -ENXIO; 222 } 246 } 223 static inline bool dma_can_mmap(struct device 247 static inline bool dma_can_mmap(struct device *dev) 224 { 248 { 225 return false; 249 return false; 226 } 250 } 227 static inline bool dma_pci_p2pdma_supported(st 251 static inline bool dma_pci_p2pdma_supported(struct device *dev) 228 { 252 { 229 return false; 253 return false; 230 } 254 } 231 static inline int dma_set_mask(struct device * 255 static inline int dma_set_mask(struct device *dev, u64 mask) 232 { 256 { 233 return -EIO; 257 return -EIO; 234 } 258 } 235 static inline int dma_set_coherent_mask(struct 259 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 236 { 260 { 237 return -EIO; 261 return -EIO; 238 } 262 } 239 static inline u64 dma_get_required_mask(struct 263 static inline u64 dma_get_required_mask(struct device *dev) 240 { 264 { 241 return 0; 265 return 0; 242 } 266 } 243 static inline bool dma_addressing_limited(stru << 244 { << 245 return false; << 246 } << 247 static inline size_t dma_max_mapping_size(stru 267 static inline size_t dma_max_mapping_size(struct device *dev) 248 { 268 { 249 return 0; 269 return 0; 250 } 270 } 251 static inline size_t dma_opt_mapping_size(stru 271 static inline size_t dma_opt_mapping_size(struct device *dev) 252 { 272 { 253 return 0; 273 return 0; 254 } 274 } >> 275 static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr) >> 276 { >> 277 return false; >> 278 } 255 static inline unsigned long dma_get_merge_boun 279 static inline unsigned long dma_get_merge_boundary(struct device *dev) 256 { 280 { 257 return 0; 281 return 0; 258 } 282 } 259 static inline struct sg_table *dma_alloc_nonco 283 static inline struct sg_table *dma_alloc_noncontiguous(struct device *dev, 260 size_t size, enum dma_data_dir 284 size_t size, enum dma_data_direction dir, gfp_t gfp, 261 unsigned long attrs) 285 unsigned long attrs) 262 { 286 { 263 return NULL; 287 return NULL; 264 } 288 } 265 static inline void dma_free_noncontiguous(stru 289 static inline void dma_free_noncontiguous(struct device *dev, size_t size, 266 struct sg_table *sgt, enum dma 290 struct sg_table *sgt, enum dma_data_direction dir) 267 { 291 { 268 } 292 } 269 static inline void *dma_vmap_noncontiguous(str 293 static inline void *dma_vmap_noncontiguous(struct device *dev, size_t size, 270 struct sg_table *sgt) 294 struct sg_table *sgt) 271 { 295 { 272 return NULL; 296 return NULL; 273 } 297 } 274 static inline void dma_vunmap_noncontiguous(st 298 static inline void dma_vunmap_noncontiguous(struct device *dev, void *vaddr) 275 { 299 { 276 } 300 } 277 static inline int dma_mmap_noncontiguous(struc 301 static inline int dma_mmap_noncontiguous(struct device *dev, 278 struct vm_area_struct *vma, si 302 struct vm_area_struct *vma, size_t size, struct sg_table *sgt) 279 { 303 { 280 return -EINVAL; 304 return -EINVAL; 281 } 305 } 282 #endif /* CONFIG_HAS_DMA */ 306 #endif /* CONFIG_HAS_DMA */ 283 307 284 #if defined(CONFIG_HAS_DMA) && defined(CONFIG_ << 285 void __dma_sync_single_for_cpu(struct device * << 286 enum dma_data_direction dir); << 287 void __dma_sync_single_for_device(struct devic << 288 size_t size, enum dma_data_dir << 289 void __dma_sync_sg_for_cpu(struct device *dev, << 290 int nelems, enum dma_data_dire << 291 void __dma_sync_sg_for_device(struct device *d << 292 int nelems, enum dma_data_dire << 293 bool __dma_need_sync(struct device *dev, dma_a << 294 << 295 static inline bool dma_dev_need_sync(const str << 296 { << 297 /* Always call DMA sync operations whe << 298 return !dev->dma_skip_sync || IS_ENABL << 299 } << 300 << 301 static inline void dma_sync_single_for_cpu(str << 302 size_t size, enum dma_data_dir << 303 { << 304 if (dma_dev_need_sync(dev)) << 305 __dma_sync_single_for_cpu(dev, << 306 } << 307 << 308 static inline void dma_sync_single_for_device( << 309 dma_addr_t addr, size_t size, << 310 { << 311 if (dma_dev_need_sync(dev)) << 312 __dma_sync_single_for_device(d << 313 } << 314 << 315 static inline void dma_sync_sg_for_cpu(struct << 316 struct scatterlist *sg, int ne << 317 { << 318 if (dma_dev_need_sync(dev)) << 319 __dma_sync_sg_for_cpu(dev, sg, << 320 } << 321 << 322 static inline void dma_sync_sg_for_device(stru << 323 struct scatterlist *sg, int ne << 324 { << 325 if (dma_dev_need_sync(dev)) << 326 __dma_sync_sg_for_device(dev, << 327 } << 328 << 329 static inline bool dma_need_sync(struct device << 330 { << 331 return dma_dev_need_sync(dev) ? __dma_ << 332 } << 333 #else /* !CONFIG_HAS_DMA || !CONFIG_DMA_NEED_S << 334 static inline bool dma_dev_need_sync(const str << 335 { << 336 return false; << 337 } << 338 static inline void dma_sync_single_for_cpu(str << 339 size_t size, enum dma_data_dir << 340 { << 341 } << 342 static inline void dma_sync_single_for_device( << 343 dma_addr_t addr, size_t size, << 344 { << 345 } << 346 static inline void dma_sync_sg_for_cpu(struct << 347 struct scatterlist *sg, int ne << 348 { << 349 } << 350 static inline void dma_sync_sg_for_device(stru << 351 struct scatterlist *sg, int ne << 352 { << 353 } << 354 static inline bool dma_need_sync(struct device << 355 { << 356 return false; << 357 } << 358 #endif /* !CONFIG_HAS_DMA || !CONFIG_DMA_NEED_ << 359 << 360 struct page *dma_alloc_pages(struct device *de 308 struct page *dma_alloc_pages(struct device *dev, size_t size, 361 dma_addr_t *dma_handle, enum d 309 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); 362 void dma_free_pages(struct device *dev, size_t 310 void dma_free_pages(struct device *dev, size_t size, struct page *page, 363 dma_addr_t dma_handle, enum dm 311 dma_addr_t dma_handle, enum dma_data_direction dir); 364 int dma_mmap_pages(struct device *dev, struct 312 int dma_mmap_pages(struct device *dev, struct vm_area_struct *vma, 365 size_t size, struct page *page 313 size_t size, struct page *page); 366 314 367 static inline void *dma_alloc_noncoherent(stru 315 static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, 368 dma_addr_t *dma_handle, enum d 316 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp) 369 { 317 { 370 struct page *page = dma_alloc_pages(de 318 struct page *page = dma_alloc_pages(dev, size, dma_handle, dir, gfp); 371 return page ? page_address(page) : NUL 319 return page ? page_address(page) : NULL; 372 } 320 } 373 321 374 static inline void dma_free_noncoherent(struct 322 static inline void dma_free_noncoherent(struct device *dev, size_t size, 375 void *vaddr, dma_addr_t dma_ha 323 void *vaddr, dma_addr_t dma_handle, enum dma_data_direction dir) 376 { 324 { 377 dma_free_pages(dev, size, virt_to_page 325 dma_free_pages(dev, size, virt_to_page(vaddr), dma_handle, dir); 378 } 326 } 379 327 380 static inline dma_addr_t dma_map_single_attrs( 328 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, 381 size_t size, enum dma_data_dir 329 size_t size, enum dma_data_direction dir, unsigned long attrs) 382 { 330 { 383 /* DMA must never operate on areas tha 331 /* DMA must never operate on areas that might be remapped. */ 384 if (dev_WARN_ONCE(dev, is_vmalloc_addr 332 if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr), 385 "rejecting DMA map o 333 "rejecting DMA map of vmalloc memory\n")) 386 return DMA_MAPPING_ERROR; 334 return DMA_MAPPING_ERROR; 387 debug_dma_map_single(dev, ptr, size); 335 debug_dma_map_single(dev, ptr, size); 388 return dma_map_page_attrs(dev, virt_to 336 return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr), 389 size, dir, attrs); 337 size, dir, attrs); 390 } 338 } 391 339 392 static inline void dma_unmap_single_attrs(stru 340 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, 393 size_t size, enum dma_data_dir 341 size_t size, enum dma_data_direction dir, unsigned long attrs) 394 { 342 { 395 return dma_unmap_page_attrs(dev, addr, 343 return dma_unmap_page_attrs(dev, addr, size, dir, attrs); 396 } 344 } 397 345 398 static inline void dma_sync_single_range_for_c 346 static inline void dma_sync_single_range_for_cpu(struct device *dev, 399 dma_addr_t addr, unsigned long 347 dma_addr_t addr, unsigned long offset, size_t size, 400 enum dma_data_direction dir) 348 enum dma_data_direction dir) 401 { 349 { 402 return dma_sync_single_for_cpu(dev, ad 350 return dma_sync_single_for_cpu(dev, addr + offset, size, dir); 403 } 351 } 404 352 405 static inline void dma_sync_single_range_for_d 353 static inline void dma_sync_single_range_for_device(struct device *dev, 406 dma_addr_t addr, unsigned long 354 dma_addr_t addr, unsigned long offset, size_t size, 407 enum dma_data_direction dir) 355 enum dma_data_direction dir) 408 { 356 { 409 return dma_sync_single_for_device(dev, 357 return dma_sync_single_for_device(dev, addr + offset, size, dir); 410 } 358 } 411 359 412 /** 360 /** 413 * dma_unmap_sgtable - Unmap the given buffer 361 * dma_unmap_sgtable - Unmap the given buffer for DMA 414 * @dev: The device for which to perfor 362 * @dev: The device for which to perform the DMA operation 415 * @sgt: The sg_table object describing 363 * @sgt: The sg_table object describing the buffer 416 * @dir: DMA direction 364 * @dir: DMA direction 417 * @attrs: Optional DMA attributes for th 365 * @attrs: Optional DMA attributes for the unmap operation 418 * 366 * 419 * Unmaps a buffer described by a scatterlist 367 * Unmaps a buffer described by a scatterlist stored in the given sg_table 420 * object for the @dir DMA operation by the @d 368 * object for the @dir DMA operation by the @dev device. After this function 421 * the ownership of the buffer is transferred 369 * the ownership of the buffer is transferred back to the CPU domain. 422 */ 370 */ 423 static inline void dma_unmap_sgtable(struct de 371 static inline void dma_unmap_sgtable(struct device *dev, struct sg_table *sgt, 424 enum dma_data_direction dir, u 372 enum dma_data_direction dir, unsigned long attrs) 425 { 373 { 426 dma_unmap_sg_attrs(dev, sgt->sgl, sgt- 374 dma_unmap_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs); 427 } 375 } 428 376 429 /** 377 /** 430 * dma_sync_sgtable_for_cpu - Synchronize the 378 * dma_sync_sgtable_for_cpu - Synchronize the given buffer for CPU access 431 * @dev: The device for which to perfor 379 * @dev: The device for which to perform the DMA operation 432 * @sgt: The sg_table object describing 380 * @sgt: The sg_table object describing the buffer 433 * @dir: DMA direction 381 * @dir: DMA direction 434 * 382 * 435 * Performs the needed cache synchronization a 383 * Performs the needed cache synchronization and moves the ownership of the 436 * buffer back to the CPU domain, so it is saf 384 * buffer back to the CPU domain, so it is safe to perform any access to it 437 * by the CPU. Before doing any further DMA op 385 * by the CPU. Before doing any further DMA operations, one has to transfer 438 * the ownership of the buffer back to the DMA 386 * the ownership of the buffer back to the DMA domain by calling the 439 * dma_sync_sgtable_for_device(). 387 * dma_sync_sgtable_for_device(). 440 */ 388 */ 441 static inline void dma_sync_sgtable_for_cpu(st 389 static inline void dma_sync_sgtable_for_cpu(struct device *dev, 442 struct sg_table *sgt, enum dma 390 struct sg_table *sgt, enum dma_data_direction dir) 443 { 391 { 444 dma_sync_sg_for_cpu(dev, sgt->sgl, sgt 392 dma_sync_sg_for_cpu(dev, sgt->sgl, sgt->orig_nents, dir); 445 } 393 } 446 394 447 /** 395 /** 448 * dma_sync_sgtable_for_device - Synchronize t 396 * dma_sync_sgtable_for_device - Synchronize the given buffer for DMA 449 * @dev: The device for which to perfor 397 * @dev: The device for which to perform the DMA operation 450 * @sgt: The sg_table object describing 398 * @sgt: The sg_table object describing the buffer 451 * @dir: DMA direction 399 * @dir: DMA direction 452 * 400 * 453 * Performs the needed cache synchronization a 401 * Performs the needed cache synchronization and moves the ownership of the 454 * buffer back to the DMA domain, so it is saf 402 * buffer back to the DMA domain, so it is safe to perform the DMA operation. 455 * Once finished, one has to call dma_sync_sgt 403 * Once finished, one has to call dma_sync_sgtable_for_cpu() or 456 * dma_unmap_sgtable(). 404 * dma_unmap_sgtable(). 457 */ 405 */ 458 static inline void dma_sync_sgtable_for_device 406 static inline void dma_sync_sgtable_for_device(struct device *dev, 459 struct sg_table *sgt, enum dma 407 struct sg_table *sgt, enum dma_data_direction dir) 460 { 408 { 461 dma_sync_sg_for_device(dev, sgt->sgl, 409 dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir); 462 } 410 } 463 411 464 #define dma_map_single(d, a, s, r) dma_map_sin 412 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) 465 #define dma_unmap_single(d, a, s, r) dma_unmap 413 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) 466 #define dma_map_sg(d, s, n, r) dma_map_sg_attr 414 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) 467 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_ 415 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) 468 #define dma_map_page(d, p, o, s, r) dma_map_pa 416 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) 469 #define dma_unmap_page(d, a, s, r) dma_unmap_p 417 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) 470 #define dma_get_sgtable(d, t, v, h, s) dma_get 418 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) 471 #define dma_mmap_coherent(d, v, c, h, s) dma_m 419 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) 472 420 473 bool dma_coherent_ok(struct device *dev, phys_ << 474 << 475 static inline void *dma_alloc_coherent(struct 421 static inline void *dma_alloc_coherent(struct device *dev, size_t size, 476 dma_addr_t *dma_handle, gfp_t 422 dma_addr_t *dma_handle, gfp_t gfp) 477 { 423 { 478 return dma_alloc_attrs(dev, size, dma_ 424 return dma_alloc_attrs(dev, size, dma_handle, gfp, 479 (gfp & __GFP_NOWARN) ? 425 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 480 } 426 } 481 427 482 static inline void dma_free_coherent(struct de 428 static inline void dma_free_coherent(struct device *dev, size_t size, 483 void *cpu_addr, dma_addr_t dma 429 void *cpu_addr, dma_addr_t dma_handle) 484 { 430 { 485 return dma_free_attrs(dev, size, cpu_a 431 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); 486 } 432 } 487 433 488 434 489 static inline u64 dma_get_mask(struct device * 435 static inline u64 dma_get_mask(struct device *dev) 490 { 436 { 491 if (dev->dma_mask && *dev->dma_mask) 437 if (dev->dma_mask && *dev->dma_mask) 492 return *dev->dma_mask; 438 return *dev->dma_mask; 493 return DMA_BIT_MASK(32); 439 return DMA_BIT_MASK(32); 494 } 440 } 495 441 496 /* 442 /* 497 * Set both the DMA mask and the coherent DMA 443 * Set both the DMA mask and the coherent DMA mask to the same thing. 498 * Note that we don't check the return value f 444 * Note that we don't check the return value from dma_set_coherent_mask() 499 * as the DMA API guarantees that the coherent 445 * as the DMA API guarantees that the coherent DMA mask can be set to 500 * the same or smaller than the streaming DMA 446 * the same or smaller than the streaming DMA mask. 501 */ 447 */ 502 static inline int dma_set_mask_and_coherent(st 448 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) 503 { 449 { 504 int rc = dma_set_mask(dev, mask); 450 int rc = dma_set_mask(dev, mask); 505 if (rc == 0) 451 if (rc == 0) 506 dma_set_coherent_mask(dev, mas 452 dma_set_coherent_mask(dev, mask); 507 return rc; 453 return rc; 508 } 454 } 509 455 510 /* 456 /* 511 * Similar to the above, except it deals with 457 * Similar to the above, except it deals with the case where the device 512 * does not have dev->dma_mask appropriately s 458 * does not have dev->dma_mask appropriately setup. 513 */ 459 */ 514 static inline int dma_coerce_mask_and_coherent 460 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) 515 { 461 { 516 dev->dma_mask = &dev->coherent_dma_mas 462 dev->dma_mask = &dev->coherent_dma_mask; 517 return dma_set_mask_and_coherent(dev, 463 return dma_set_mask_and_coherent(dev, mask); 518 } 464 } 519 465 >> 466 /** >> 467 * dma_addressing_limited - return if the device is addressing limited >> 468 * @dev: device to check >> 469 * >> 470 * Return %true if the devices DMA mask is too small to address all memory in >> 471 * the system, else %false. Lack of addressing bits is the prime reason for >> 472 * bounce buffering, but might not be the only one. >> 473 */ >> 474 static inline bool dma_addressing_limited(struct device *dev) >> 475 { >> 476 return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) < >> 477 dma_get_required_mask(dev); >> 478 } >> 479 520 static inline unsigned int dma_get_max_seg_siz 480 static inline unsigned int dma_get_max_seg_size(struct device *dev) 521 { 481 { 522 if (dev->dma_parms && dev->dma_parms-> 482 if (dev->dma_parms && dev->dma_parms->max_segment_size) 523 return dev->dma_parms->max_seg 483 return dev->dma_parms->max_segment_size; 524 return SZ_64K; 484 return SZ_64K; 525 } 485 } 526 486 527 static inline void dma_set_max_seg_size(struct !! 487 static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) 528 { 488 { 529 if (WARN_ON_ONCE(!dev->dma_parms)) !! 489 if (dev->dma_parms) { 530 return; !! 490 dev->dma_parms->max_segment_size = size; 531 dev->dma_parms->max_segment_size = siz !! 491 return 0; >> 492 } >> 493 return -EIO; 532 } 494 } 533 495 534 static inline unsigned long dma_get_seg_bounda 496 static inline unsigned long dma_get_seg_boundary(struct device *dev) 535 { 497 { 536 if (dev->dma_parms && dev->dma_parms-> 498 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) 537 return dev->dma_parms->segment 499 return dev->dma_parms->segment_boundary_mask; 538 return ULONG_MAX; 500 return ULONG_MAX; 539 } 501 } 540 502 541 /** 503 /** 542 * dma_get_seg_boundary_nr_pages - return the 504 * dma_get_seg_boundary_nr_pages - return the segment boundary in "page" units 543 * @dev: device to guery the boundary for 505 * @dev: device to guery the boundary for 544 * @page_shift: ilog() of the IOMMU page size 506 * @page_shift: ilog() of the IOMMU page size 545 * 507 * 546 * Return the segment boundary in IOMMU page u 508 * Return the segment boundary in IOMMU page units (which may be different from 547 * the CPU page size) for the passed in device 509 * the CPU page size) for the passed in device. 548 * 510 * 549 * If @dev is NULL a boundary of U32_MAX is as 511 * If @dev is NULL a boundary of U32_MAX is assumed, this case is just for 550 * non-DMA API callers. 512 * non-DMA API callers. 551 */ 513 */ 552 static inline unsigned long dma_get_seg_bounda 514 static inline unsigned long dma_get_seg_boundary_nr_pages(struct device *dev, 553 unsigned int page_shift) 515 unsigned int page_shift) 554 { 516 { 555 if (!dev) 517 if (!dev) 556 return (U32_MAX >> page_shift) 518 return (U32_MAX >> page_shift) + 1; 557 return (dma_get_seg_boundary(dev) >> p 519 return (dma_get_seg_boundary(dev) >> page_shift) + 1; 558 } 520 } 559 521 560 static inline void dma_set_seg_boundary(struct !! 522 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 561 { 523 { 562 if (WARN_ON_ONCE(!dev->dma_parms)) !! 524 if (dev->dma_parms) { 563 return; !! 525 dev->dma_parms->segment_boundary_mask = mask; 564 dev->dma_parms->segment_boundary_mask !! 526 return 0; >> 527 } >> 528 return -EIO; 565 } 529 } 566 530 567 static inline unsigned int dma_get_min_align_m 531 static inline unsigned int dma_get_min_align_mask(struct device *dev) 568 { 532 { 569 if (dev->dma_parms) 533 if (dev->dma_parms) 570 return dev->dma_parms->min_ali 534 return dev->dma_parms->min_align_mask; 571 return 0; 535 return 0; 572 } 536 } 573 537 574 static inline void dma_set_min_align_mask(stru !! 538 static inline int dma_set_min_align_mask(struct device *dev, 575 unsigned int min_align_mask) 539 unsigned int min_align_mask) 576 { 540 { 577 if (WARN_ON_ONCE(!dev->dma_parms)) 541 if (WARN_ON_ONCE(!dev->dma_parms)) 578 return; !! 542 return -EIO; 579 dev->dma_parms->min_align_mask = min_a 543 dev->dma_parms->min_align_mask = min_align_mask; >> 544 return 0; 580 } 545 } 581 546 582 #ifndef dma_get_cache_alignment 547 #ifndef dma_get_cache_alignment 583 static inline int dma_get_cache_alignment(void 548 static inline int dma_get_cache_alignment(void) 584 { 549 { 585 #ifdef ARCH_HAS_DMA_MINALIGN 550 #ifdef ARCH_HAS_DMA_MINALIGN 586 return ARCH_DMA_MINALIGN; 551 return ARCH_DMA_MINALIGN; 587 #endif 552 #endif 588 return 1; 553 return 1; 589 } 554 } 590 #endif 555 #endif 591 556 592 static inline void *dmam_alloc_coherent(struct 557 static inline void *dmam_alloc_coherent(struct device *dev, size_t size, 593 dma_addr_t *dma_handle, gfp_t 558 dma_addr_t *dma_handle, gfp_t gfp) 594 { 559 { 595 return dmam_alloc_attrs(dev, size, dma 560 return dmam_alloc_attrs(dev, size, dma_handle, gfp, 596 (gfp & __GFP_NOWARN) ? 561 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 597 } 562 } 598 563 599 static inline void *dma_alloc_wc(struct device 564 static inline void *dma_alloc_wc(struct device *dev, size_t size, 600 dma_addr_t *d 565 dma_addr_t *dma_addr, gfp_t gfp) 601 { 566 { 602 unsigned long attrs = DMA_ATTR_WRITE_C 567 unsigned long attrs = DMA_ATTR_WRITE_COMBINE; 603 568 604 if (gfp & __GFP_NOWARN) 569 if (gfp & __GFP_NOWARN) 605 attrs |= DMA_ATTR_NO_WARN; 570 attrs |= DMA_ATTR_NO_WARN; 606 571 607 return dma_alloc_attrs(dev, size, dma_ 572 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); 608 } 573 } 609 574 610 static inline void dma_free_wc(struct device * 575 static inline void dma_free_wc(struct device *dev, size_t size, 611 void *cpu_addr, 576 void *cpu_addr, dma_addr_t dma_addr) 612 { 577 { 613 return dma_free_attrs(dev, size, cpu_a 578 return dma_free_attrs(dev, size, cpu_addr, dma_addr, 614 DMA_ATTR_WRITE_C 579 DMA_ATTR_WRITE_COMBINE); 615 } 580 } 616 581 617 static inline int dma_mmap_wc(struct device *d 582 static inline int dma_mmap_wc(struct device *dev, 618 struct vm_area_s 583 struct vm_area_struct *vma, 619 void *cpu_addr, 584 void *cpu_addr, dma_addr_t dma_addr, 620 size_t size) 585 size_t size) 621 { 586 { 622 return dma_mmap_attrs(dev, vma, cpu_ad 587 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, 623 DMA_ATTR_WRITE_C 588 DMA_ATTR_WRITE_COMBINE); 624 } 589 } 625 590 626 #ifdef CONFIG_NEED_DMA_MAP_STATE 591 #ifdef CONFIG_NEED_DMA_MAP_STATE 627 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 592 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 628 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 593 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 629 #define dma_unmap_addr(PTR, ADDR_NAME) 594 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 630 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL 595 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 631 #define dma_unmap_len(PTR, LEN_NAME) 596 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 632 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) 597 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 633 #else 598 #else 634 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 599 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 635 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 600 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 636 #define dma_unmap_addr(PTR, ADDR_NAME) 601 #define dma_unmap_addr(PTR, ADDR_NAME) (0) 637 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL 602 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 638 #define dma_unmap_len(PTR, LEN_NAME) 603 #define dma_unmap_len(PTR, LEN_NAME) (0) 639 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) 604 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 640 #endif 605 #endif 641 606 642 #endif /* _LINUX_DMA_MAPPING_H */ 607 #endif /* _LINUX_DMA_MAPPING_H */ 643 608
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