1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* 2 /*
3 * Xilinx DMA Engine drivers support header fi 3 * Xilinx DMA Engine drivers support header file
4 * 4 *
5 * Copyright (C) 2010-2014 Xilinx, Inc. All ri 5 * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
6 */ 6 */
7 7
8 #ifndef __DMA_XILINX_DMA_H 8 #ifndef __DMA_XILINX_DMA_H
9 #define __DMA_XILINX_DMA_H 9 #define __DMA_XILINX_DMA_H
10 10
11 #include <linux/dma-mapping.h> 11 #include <linux/dma-mapping.h>
12 #include <linux/dmaengine.h> 12 #include <linux/dmaengine.h>
13 13
14 /** 14 /**
15 * struct xilinx_vdma_config - VDMA Configurat 15 * struct xilinx_vdma_config - VDMA Configuration structure
16 * @frm_dly: Frame delay 16 * @frm_dly: Frame delay
17 * @gen_lock: Whether in gen-lock mode 17 * @gen_lock: Whether in gen-lock mode
18 * @master: Master that it syncs to 18 * @master: Master that it syncs to
19 * @frm_cnt_en: Enable frame count enable 19 * @frm_cnt_en: Enable frame count enable
20 * @park: Whether wants to park 20 * @park: Whether wants to park
21 * @park_frm: Frame to park on 21 * @park_frm: Frame to park on
22 * @coalesc: Interrupt coalescing threshold 22 * @coalesc: Interrupt coalescing threshold
23 * @delay: Delay counter 23 * @delay: Delay counter
24 * @reset: Reset Channel 24 * @reset: Reset Channel
25 * @ext_fsync: External Frame Sync source 25 * @ext_fsync: External Frame Sync source
26 * @vflip_en: Vertical Flip enable 26 * @vflip_en: Vertical Flip enable
27 */ 27 */
28 struct xilinx_vdma_config { 28 struct xilinx_vdma_config {
29 int frm_dly; 29 int frm_dly;
30 int gen_lock; 30 int gen_lock;
31 int master; 31 int master;
32 int frm_cnt_en; 32 int frm_cnt_en;
33 int park; 33 int park;
34 int park_frm; 34 int park_frm;
35 int coalesc; 35 int coalesc;
36 int delay; 36 int delay;
37 int reset; 37 int reset;
38 int ext_fsync; 38 int ext_fsync;
39 bool vflip_en; 39 bool vflip_en;
40 }; 40 };
41 41
42 int xilinx_vdma_channel_set_config(struct dma_ 42 int xilinx_vdma_channel_set_config(struct dma_chan *dchan,
43 struct 43 struct xilinx_vdma_config *cfg);
44 44
45 #endif 45 #endif
46 46
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