1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* 2 /*
3 * Copyright 2008 Freescale Semiconductor, Inc 3 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
4 * 4 *
5 * Freescale DIU Frame Buffer device driver 5 * Freescale DIU Frame Buffer device driver
6 * 6 *
7 * Authors: Hongjun Chen <hong-jun.chen@frees 7 * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
8 * Paul Widmer <paul.widmer@freescal 8 * Paul Widmer <paul.widmer@freescale.com>
9 * Srikanth Srinivasan <srikanth.sri 9 * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
10 * York Sun <yorksun@freescale.com> 10 * York Sun <yorksun@freescale.com>
11 * 11 *
12 * Based on imxfb.c Copyright (C) 2004 S.Hau 12 * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
13 */ 13 */
14 14
15 #ifndef __FSL_DIU_FB_H__ 15 #ifndef __FSL_DIU_FB_H__
16 #define __FSL_DIU_FB_H__ 16 #define __FSL_DIU_FB_H__
17 17
18 #include <linux/types.h> 18 #include <linux/types.h>
19 19
20 struct mfb_chroma_key { 20 struct mfb_chroma_key {
21 int enable; 21 int enable;
22 __u8 red_max; 22 __u8 red_max;
23 __u8 green_max; 23 __u8 green_max;
24 __u8 blue_max; 24 __u8 blue_max;
25 __u8 red_min; 25 __u8 red_min;
26 __u8 green_min; 26 __u8 green_min;
27 __u8 blue_min; 27 __u8 blue_min;
28 }; 28 };
29 29
30 struct aoi_display_offset { 30 struct aoi_display_offset {
31 __s32 x_aoi_d; 31 __s32 x_aoi_d;
32 __s32 y_aoi_d; 32 __s32 y_aoi_d;
33 }; 33 };
34 34
35 #define MFB_SET_CHROMA_KEY _IOW('M', 1, s 35 #define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key)
36 #define MFB_SET_BRIGHTNESS _IOW('M', 3, _ 36 #define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8)
37 #define MFB_SET_ALPHA _IOW('M', 0, _ 37 #define MFB_SET_ALPHA _IOW('M', 0, __u8)
38 #define MFB_GET_ALPHA _IOR('M', 0, _ 38 #define MFB_GET_ALPHA _IOR('M', 0, __u8)
39 #define MFB_SET_AOID _IOW('M', 4, s 39 #define MFB_SET_AOID _IOW('M', 4, struct aoi_display_offset)
40 #define MFB_GET_AOID _IOR('M', 4, s 40 #define MFB_GET_AOID _IOR('M', 4, struct aoi_display_offset)
41 #define MFB_SET_PIXFMT _IOW('M', 8, _ 41 #define MFB_SET_PIXFMT _IOW('M', 8, __u32)
42 #define MFB_GET_PIXFMT _IOR('M', 8, _ 42 #define MFB_GET_PIXFMT _IOR('M', 8, __u32)
43 43
44 /* 44 /*
45 * The MPC5121 BSP comes with a gamma_set util 45 * The MPC5121 BSP comes with a gamma_set utility that initializes the
46 * gamma table. Unfortunately, it uses bad va 46 * gamma table. Unfortunately, it uses bad values for the IOCTL commands,
47 * but there's nothing we can do about it now. 47 * but there's nothing we can do about it now. These ioctls are only
48 * supported on the MPC5121. 48 * supported on the MPC5121.
49 */ 49 */
50 #define MFB_SET_GAMMA _IOW('M', 1, _ 50 #define MFB_SET_GAMMA _IOW('M', 1, __u8)
51 #define MFB_GET_GAMMA _IOR('M', 1, _ 51 #define MFB_GET_GAMMA _IOR('M', 1, __u8)
52 52
53 /* 53 /*
54 * The original definitions of MFB_SET_PIXFMT 54 * The original definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT used the
55 * wrong value for 'size' field of the ioctl. 55 * wrong value for 'size' field of the ioctl. The current macros above use the
56 * right size, but we still need to provide ba 56 * right size, but we still need to provide backwards compatibility, at least
57 * for a while. 57 * for a while.
58 */ 58 */
59 #define MFB_SET_PIXFMT_OLD 0x80014d08 59 #define MFB_SET_PIXFMT_OLD 0x80014d08
60 #define MFB_GET_PIXFMT_OLD 0x40014d08 60 #define MFB_GET_PIXFMT_OLD 0x40014d08
61 61
62 #ifdef __KERNEL__ 62 #ifdef __KERNEL__
63 63
64 /* 64 /*
65 * These are the fields of area descriptor(in 65 * These are the fields of area descriptor(in DDR memory) for every plane
66 */ 66 */
67 struct diu_ad { 67 struct diu_ad {
68 /* Word 0(32-bit) in DDR memory */ 68 /* Word 0(32-bit) in DDR memory */
69 /* __u16 comp; */ 69 /* __u16 comp; */
70 /* __u16 pixel_s:2; */ 70 /* __u16 pixel_s:2; */
71 /* __u16 palette:1; */ 71 /* __u16 palette:1; */
72 /* __u16 red_c:2; */ 72 /* __u16 red_c:2; */
73 /* __u16 green_c:2; */ 73 /* __u16 green_c:2; */
74 /* __u16 blue_c:2; */ 74 /* __u16 blue_c:2; */
75 /* __u16 alpha_c:3; */ 75 /* __u16 alpha_c:3; */
76 /* __u16 byte_f:1; */ 76 /* __u16 byte_f:1; */
77 /* __u16 res0:3; */ 77 /* __u16 res0:3; */
78 78
79 __be32 pix_fmt; /* hard coding pixel f 79 __be32 pix_fmt; /* hard coding pixel format */
80 80
81 /* Word 1(32-bit) in DDR memory */ 81 /* Word 1(32-bit) in DDR memory */
82 __le32 addr; 82 __le32 addr;
83 83
84 /* Word 2(32-bit) in DDR memory */ 84 /* Word 2(32-bit) in DDR memory */
85 /* __u32 delta_xs:11; */ 85 /* __u32 delta_xs:11; */
86 /* __u32 res1:1; */ 86 /* __u32 res1:1; */
87 /* __u32 delta_ys:11; */ 87 /* __u32 delta_ys:11; */
88 /* __u32 res2:1; */ 88 /* __u32 res2:1; */
89 /* __u32 g_alpha:8; */ 89 /* __u32 g_alpha:8; */
90 __le32 src_size_g_alpha; 90 __le32 src_size_g_alpha;
91 91
92 /* Word 3(32-bit) in DDR memory */ 92 /* Word 3(32-bit) in DDR memory */
93 /* __u32 delta_xi:11; */ 93 /* __u32 delta_xi:11; */
94 /* __u32 res3:5; */ 94 /* __u32 res3:5; */
95 /* __u32 delta_yi:11; */ 95 /* __u32 delta_yi:11; */
96 /* __u32 res4:3; */ 96 /* __u32 res4:3; */
97 /* __u32 flip:2; */ 97 /* __u32 flip:2; */
98 __le32 aoi_size; 98 __le32 aoi_size;
99 99
100 /* Word 4(32-bit) in DDR memory */ 100 /* Word 4(32-bit) in DDR memory */
101 /*__u32 offset_xi:11; 101 /*__u32 offset_xi:11;
102 __u32 res5:5; 102 __u32 res5:5;
103 __u32 offset_yi:11; 103 __u32 offset_yi:11;
104 __u32 res6:5; 104 __u32 res6:5;
105 */ 105 */
106 __le32 offset_xyi; 106 __le32 offset_xyi;
107 107
108 /* Word 5(32-bit) in DDR memory */ 108 /* Word 5(32-bit) in DDR memory */
109 /*__u32 offset_xd:11; 109 /*__u32 offset_xd:11;
110 __u32 res7:5; 110 __u32 res7:5;
111 __u32 offset_yd:11; 111 __u32 offset_yd:11;
112 __u32 res8:5; */ 112 __u32 res8:5; */
113 __le32 offset_xyd; 113 __le32 offset_xyd;
114 114
115 115
116 /* Word 6(32-bit) in DDR memory */ 116 /* Word 6(32-bit) in DDR memory */
117 __u8 ckmax_r; 117 __u8 ckmax_r;
118 __u8 ckmax_g; 118 __u8 ckmax_g;
119 __u8 ckmax_b; 119 __u8 ckmax_b;
120 __u8 res9; 120 __u8 res9;
121 121
122 /* Word 7(32-bit) in DDR memory */ 122 /* Word 7(32-bit) in DDR memory */
123 __u8 ckmin_r; 123 __u8 ckmin_r;
124 __u8 ckmin_g; 124 __u8 ckmin_g;
125 __u8 ckmin_b; 125 __u8 ckmin_b;
126 __u8 res10; 126 __u8 res10;
127 /* __u32 res10:8; */ 127 /* __u32 res10:8; */
128 128
129 /* Word 8(32-bit) in DDR memory */ 129 /* Word 8(32-bit) in DDR memory */
130 __le32 next_ad; 130 __le32 next_ad;
131 131
132 /* Word 9(32-bit) in DDR memory, just 132 /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
133 __u32 paddr; 133 __u32 paddr;
134 } __attribute__ ((packed)); 134 } __attribute__ ((packed));
135 135
136 /* DIU register map */ 136 /* DIU register map */
137 struct diu { 137 struct diu {
138 __be32 desc[3]; 138 __be32 desc[3];
139 __be32 gamma; 139 __be32 gamma;
140 __be32 palette; 140 __be32 palette;
141 __be32 cursor; 141 __be32 cursor;
142 __be32 curs_pos; 142 __be32 curs_pos;
143 __be32 diu_mode; 143 __be32 diu_mode;
144 __be32 bgnd; 144 __be32 bgnd;
145 __be32 bgnd_wb; 145 __be32 bgnd_wb;
146 __be32 disp_size; 146 __be32 disp_size;
147 __be32 wb_size; 147 __be32 wb_size;
148 __be32 wb_mem_addr; 148 __be32 wb_mem_addr;
149 __be32 hsyn_para; 149 __be32 hsyn_para;
150 __be32 vsyn_para; 150 __be32 vsyn_para;
151 __be32 syn_pol; 151 __be32 syn_pol;
152 __be32 thresholds; 152 __be32 thresholds;
153 __be32 int_status; 153 __be32 int_status;
154 __be32 int_mask; 154 __be32 int_mask;
155 __be32 colorbar[8]; 155 __be32 colorbar[8];
156 __be32 filling; 156 __be32 filling;
157 __be32 plut; 157 __be32 plut;
158 } __attribute__ ((packed)); 158 } __attribute__ ((packed));
159 159
160 /* 160 /*
161 * Modes of operation of DIU. The DIU support 161 * Modes of operation of DIU. The DIU supports five different modes, but
162 * the driver only supports modes 0 and 1. 162 * the driver only supports modes 0 and 1.
163 */ 163 */
164 #define MFB_MODE0 0 /* DIU off */ 164 #define MFB_MODE0 0 /* DIU off */
165 #define MFB_MODE1 1 /* All three p 165 #define MFB_MODE1 1 /* All three planes output to display */
166 166
167 #endif /* __KERNEL__ */ 167 #endif /* __KERNEL__ */
168 #endif /* __FSL_DIU_FB_H__ */ 168 #endif /* __FSL_DIU_FB_H__ */
169 169
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