1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 2
3 #ifndef _LINUX_GPIO_REGMAP_H 3 #ifndef _LINUX_GPIO_REGMAP_H
4 #define _LINUX_GPIO_REGMAP_H 4 #define _LINUX_GPIO_REGMAP_H
5 5
6 struct device; 6 struct device;
7 struct fwnode_handle; <<
8 struct gpio_regmap; 7 struct gpio_regmap;
9 struct irq_domain; 8 struct irq_domain;
10 struct regmap; 9 struct regmap;
11 10
12 #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)( 11 #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1))
13 #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPI 12 #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO)
14 13
15 /** 14 /**
16 * struct gpio_regmap_config - Description of 15 * struct gpio_regmap_config - Description of a generic regmap gpio_chip.
17 * @parent: The parent device 16 * @parent: The parent device
18 * @regmap: The regmap used to acc 17 * @regmap: The regmap used to access the registers
19 * given, the name of the 18 * given, the name of the device is used
20 * @fwnode: (Optional) The firmwar <<
21 * If not given, the fwno <<
22 * @label: (Optional) Descriptive 19 * @label: (Optional) Descriptive name for GPIO controller.
23 * If not given, the name 20 * If not given, the name of the device is used.
24 * @ngpio: Number of GPIOs 21 * @ngpio: Number of GPIOs
25 * @names: (Optional) Array of na 22 * @names: (Optional) Array of names for gpios
26 * @reg_dat_base: (Optional) (in) regist 23 * @reg_dat_base: (Optional) (in) register base address
27 * @reg_set_base: (Optional) set registe 24 * @reg_set_base: (Optional) set register base address
28 * @reg_clr_base: (Optional) clear regis 25 * @reg_clr_base: (Optional) clear register base address
29 * @reg_dir_in_base: (Optional) in setting 26 * @reg_dir_in_base: (Optional) in setting register base address
30 * @reg_dir_out_base: (Optional) out setting 27 * @reg_dir_out_base: (Optional) out setting register base address
31 * @reg_stride: (Optional) May be set 28 * @reg_stride: (Optional) May be set if the registers (of the
32 * same type, dat, set, e 29 * same type, dat, set, etc) are not consecutive.
33 * @ngpio_per_reg: Number of GPIOs per re 30 * @ngpio_per_reg: Number of GPIOs per register
34 * @irq_domain: (Optional) IRQ domain 31 * @irq_domain: (Optional) IRQ domain if the controller is
35 * interrupt-capable 32 * interrupt-capable
36 * @reg_mask_xlate: (Optional) Translates 33 * @reg_mask_xlate: (Optional) Translates base address and GPIO
37 * offset to a register/b 34 * offset to a register/bitmask pair. If not
38 * given the default gpio 35 * given the default gpio_regmap_simple_xlate()
39 * is used. 36 * is used.
40 * @drvdata: (Optional) Pointer to <<
41 * not used by gpio-remap <<
42 * driver callback(s). <<
43 * 37 *
44 * The ->reg_mask_xlate translates a given bas 38 * The ->reg_mask_xlate translates a given base address and GPIO offset to
45 * register and mask pair. The base address is 39 * register and mask pair. The base address is one of the given register
46 * base addresses in this structure. 40 * base addresses in this structure.
47 * 41 *
48 * Although all register base addresses are ma 42 * Although all register base addresses are marked as optional, there are
49 * several rules: 43 * several rules:
50 * 1. if you only have @reg_dat_base set, 44 * 1. if you only have @reg_dat_base set, then it is input-only
51 * 2. if you only have @reg_set_base set, 45 * 2. if you only have @reg_set_base set, then it is output-only
52 * 3. if you have either @reg_dir_in_base 46 * 3. if you have either @reg_dir_in_base or @reg_dir_out_base set, then
53 * you have to set both @reg_dat_base a 47 * you have to set both @reg_dat_base and @reg_set_base
54 * 4. if you have @reg_set_base set, you m 48 * 4. if you have @reg_set_base set, you may also set @reg_clr_base to have
55 * two different registers for setting 49 * two different registers for setting and clearing the output. This is
56 * also valid for the output-only case. 50 * also valid for the output-only case.
57 * 5. @reg_dir_in_base and @reg_dir_out_ba 51 * 5. @reg_dir_in_base and @reg_dir_out_base are exclusive; is there really
58 * hardware which has redundant registe 52 * hardware which has redundant registers?
59 * 53 *
60 * Note: All base addresses may have the speci 54 * Note: All base addresses may have the special value %GPIO_REGMAP_ADDR_ZERO
61 * which forces the address to the value 0. 55 * which forces the address to the value 0.
62 */ 56 */
63 struct gpio_regmap_config { 57 struct gpio_regmap_config {
64 struct device *parent; 58 struct device *parent;
65 struct regmap *regmap; 59 struct regmap *regmap;
66 struct fwnode_handle *fwnode; <<
67 60
68 const char *label; 61 const char *label;
69 int ngpio; 62 int ngpio;
70 const char *const *names; 63 const char *const *names;
71 64
72 unsigned int reg_dat_base; 65 unsigned int reg_dat_base;
73 unsigned int reg_set_base; 66 unsigned int reg_set_base;
74 unsigned int reg_clr_base; 67 unsigned int reg_clr_base;
75 unsigned int reg_dir_in_base; 68 unsigned int reg_dir_in_base;
76 unsigned int reg_dir_out_base; 69 unsigned int reg_dir_out_base;
77 int reg_stride; 70 int reg_stride;
78 int ngpio_per_reg; 71 int ngpio_per_reg;
79 struct irq_domain *irq_domain; 72 struct irq_domain *irq_domain;
80 73
81 int (*reg_mask_xlate)(struct gpio_regm 74 int (*reg_mask_xlate)(struct gpio_regmap *gpio, unsigned int base,
82 unsigned int off 75 unsigned int offset, unsigned int *reg,
83 unsigned int *ma 76 unsigned int *mask);
84 <<
85 void *drvdata; <<
86 }; 77 };
87 78
88 struct gpio_regmap *gpio_regmap_register(const 79 struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config);
89 void gpio_regmap_unregister(struct gpio_regmap 80 void gpio_regmap_unregister(struct gpio_regmap *gpio);
90 struct gpio_regmap *devm_gpio_regmap_register( 81 struct gpio_regmap *devm_gpio_regmap_register(struct device *dev,
91 82 const struct gpio_regmap_config *config);
>> 83 void gpio_regmap_set_drvdata(struct gpio_regmap *gpio, void *data);
92 void *gpio_regmap_get_drvdata(struct gpio_regm 84 void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio);
93 85
94 #endif /* _LINUX_GPIO_REGMAP_H */ 86 #endif /* _LINUX_GPIO_REGMAP_H */
95 87
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