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TOMOYO Linux Cross Reference
Linux/include/linux/gpio/regmap.h

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Diff markup

Differences between /include/linux/gpio/regmap.h (Version linux-6.12-rc7) and /include/linux/gpio/regmap.h (Version linux-6.10.14)


  1 /* SPDX-License-Identifier: GPL-2.0-only */         1 /* SPDX-License-Identifier: GPL-2.0-only */
  2                                                     2 
  3 #ifndef _LINUX_GPIO_REGMAP_H                        3 #ifndef _LINUX_GPIO_REGMAP_H
  4 #define _LINUX_GPIO_REGMAP_H                        4 #define _LINUX_GPIO_REGMAP_H
  5                                                     5 
  6 struct device;                                      6 struct device;
  7 struct fwnode_handle;                               7 struct fwnode_handle;
  8 struct gpio_regmap;                                 8 struct gpio_regmap;
  9 struct irq_domain;                                  9 struct irq_domain;
 10 struct regmap;                                     10 struct regmap;
 11                                                    11 
 12 #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(     12 #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1))
 13 #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPI     13 #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO)
 14                                                    14 
 15 /**                                                15 /**
 16  * struct gpio_regmap_config - Description of      16  * struct gpio_regmap_config - Description of a generic regmap gpio_chip.
 17  * @parent:             The parent device          17  * @parent:             The parent device
 18  * @regmap:             The regmap used to acc     18  * @regmap:             The regmap used to access the registers
 19  *                      given, the name of the     19  *                      given, the name of the device is used
 20  * @fwnode:             (Optional) The firmwar     20  * @fwnode:             (Optional) The firmware node.
 21  *                      If not given, the fwno     21  *                      If not given, the fwnode of the parent is used.
 22  * @label:              (Optional) Descriptive     22  * @label:              (Optional) Descriptive name for GPIO controller.
 23  *                      If not given, the name     23  *                      If not given, the name of the device is used.
 24  * @ngpio:              Number of GPIOs            24  * @ngpio:              Number of GPIOs
 25  * @names:              (Optional) Array of na     25  * @names:              (Optional) Array of names for gpios
 26  * @reg_dat_base:       (Optional) (in) regist     26  * @reg_dat_base:       (Optional) (in) register base address
 27  * @reg_set_base:       (Optional) set registe     27  * @reg_set_base:       (Optional) set register base address
 28  * @reg_clr_base:       (Optional) clear regis     28  * @reg_clr_base:       (Optional) clear register base address
 29  * @reg_dir_in_base:    (Optional) in setting      29  * @reg_dir_in_base:    (Optional) in setting register base address
 30  * @reg_dir_out_base:   (Optional) out setting     30  * @reg_dir_out_base:   (Optional) out setting register base address
 31  * @reg_stride:         (Optional) May be set      31  * @reg_stride:         (Optional) May be set if the registers (of the
 32  *                      same type, dat, set, e     32  *                      same type, dat, set, etc) are not consecutive.
 33  * @ngpio_per_reg:      Number of GPIOs per re     33  * @ngpio_per_reg:      Number of GPIOs per register
 34  * @irq_domain:         (Optional) IRQ domain      34  * @irq_domain:         (Optional) IRQ domain if the controller is
 35  *                      interrupt-capable          35  *                      interrupt-capable
 36  * @reg_mask_xlate:     (Optional) Translates      36  * @reg_mask_xlate:     (Optional) Translates base address and GPIO
 37  *                      offset to a register/b     37  *                      offset to a register/bitmask pair. If not
 38  *                      given the default gpio     38  *                      given the default gpio_regmap_simple_xlate()
 39  *                      is used.                   39  *                      is used.
 40  * @drvdata:            (Optional) Pointer to      40  * @drvdata:            (Optional) Pointer to driver specific data which is
 41  *                      not used by gpio-remap     41  *                      not used by gpio-remap but is provided "as is" to the
 42  *                      driver callback(s).        42  *                      driver callback(s).
 43  *                                                 43  *
 44  * The ->reg_mask_xlate translates a given bas     44  * The ->reg_mask_xlate translates a given base address and GPIO offset to
 45  * register and mask pair. The base address is     45  * register and mask pair. The base address is one of the given register
 46  * base addresses in this structure.               46  * base addresses in this structure.
 47  *                                                 47  *
 48  * Although all register base addresses are ma     48  * Although all register base addresses are marked as optional, there are
 49  * several rules:                                  49  * several rules:
 50  *     1. if you only have @reg_dat_base set,      50  *     1. if you only have @reg_dat_base set, then it is input-only
 51  *     2. if you only have @reg_set_base set,      51  *     2. if you only have @reg_set_base set, then it is output-only
 52  *     3. if you have either @reg_dir_in_base      52  *     3. if you have either @reg_dir_in_base or @reg_dir_out_base set, then
 53  *        you have to set both @reg_dat_base a     53  *        you have to set both @reg_dat_base and @reg_set_base
 54  *     4. if you have @reg_set_base set, you m     54  *     4. if you have @reg_set_base set, you may also set @reg_clr_base to have
 55  *        two different registers for setting      55  *        two different registers for setting and clearing the output. This is
 56  *        also valid for the output-only case.     56  *        also valid for the output-only case.
 57  *     5. @reg_dir_in_base and @reg_dir_out_ba     57  *     5. @reg_dir_in_base and @reg_dir_out_base are exclusive; is there really
 58  *        hardware which has redundant registe     58  *        hardware which has redundant registers?
 59  *                                                 59  *
 60  * Note: All base addresses may have the speci     60  * Note: All base addresses may have the special value %GPIO_REGMAP_ADDR_ZERO
 61  * which forces the address to the value 0.        61  * which forces the address to the value 0.
 62  */                                                62  */
 63 struct gpio_regmap_config {                        63 struct gpio_regmap_config {
 64         struct device *parent;                     64         struct device *parent;
 65         struct regmap *regmap;                     65         struct regmap *regmap;
 66         struct fwnode_handle *fwnode;              66         struct fwnode_handle *fwnode;
 67                                                    67 
 68         const char *label;                         68         const char *label;
 69         int ngpio;                                 69         int ngpio;
 70         const char *const *names;                  70         const char *const *names;
 71                                                    71 
 72         unsigned int reg_dat_base;                 72         unsigned int reg_dat_base;
 73         unsigned int reg_set_base;                 73         unsigned int reg_set_base;
 74         unsigned int reg_clr_base;                 74         unsigned int reg_clr_base;
 75         unsigned int reg_dir_in_base;              75         unsigned int reg_dir_in_base;
 76         unsigned int reg_dir_out_base;             76         unsigned int reg_dir_out_base;
 77         int reg_stride;                            77         int reg_stride;
 78         int ngpio_per_reg;                         78         int ngpio_per_reg;
 79         struct irq_domain *irq_domain;             79         struct irq_domain *irq_domain;
 80                                                    80 
 81         int (*reg_mask_xlate)(struct gpio_regm     81         int (*reg_mask_xlate)(struct gpio_regmap *gpio, unsigned int base,
 82                               unsigned int off     82                               unsigned int offset, unsigned int *reg,
 83                               unsigned int *ma     83                               unsigned int *mask);
 84                                                    84 
 85         void *drvdata;                             85         void *drvdata;
 86 };                                                 86 };
 87                                                    87 
 88 struct gpio_regmap *gpio_regmap_register(const     88 struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config);
 89 void gpio_regmap_unregister(struct gpio_regmap     89 void gpio_regmap_unregister(struct gpio_regmap *gpio);
 90 struct gpio_regmap *devm_gpio_regmap_register(     90 struct gpio_regmap *devm_gpio_regmap_register(struct device *dev,
 91                                                    91                                               const struct gpio_regmap_config *config);
 92 void *gpio_regmap_get_drvdata(struct gpio_regm     92 void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio);
 93                                                    93 
 94 #endif /* _LINUX_GPIO_REGMAP_H */                  94 #endif /* _LINUX_GPIO_REGMAP_H */
 95                                                    95 

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