1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * itg3200.h -- support InvenSense ITG3200 2 * itg3200.h -- support InvenSense ITG3200
4 * Digital 3-Axis Gyroscope drive 3 * Digital 3-Axis Gyroscope driver
5 * 4 *
6 * Copyright (c) 2011 Christian Strobel <chris 5 * Copyright (c) 2011 Christian Strobel <christian.strobel@iis.fraunhofer.de>
7 * Copyright (c) 2011 Manuel Stahl <manuel.sta 6 * Copyright (c) 2011 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
8 * Copyright (c) 2012 Thorsten Nowak <thorsten 7 * Copyright (c) 2012 Thorsten Nowak <thorsten.nowak@iis.fraunhofer.de>
>> 8 *
>> 9 * This program is free software; you can redistribute it and/or modify
>> 10 * it under the terms of the GNU General Public License version 2 as
>> 11 * published by the Free Software Foundation.
9 */ 12 */
10 13
11 #ifndef I2C_ITG3200_H_ 14 #ifndef I2C_ITG3200_H_
12 #define I2C_ITG3200_H_ 15 #define I2C_ITG3200_H_
13 16
14 #include <linux/iio/iio.h> 17 #include <linux/iio/iio.h>
15 18
16 /* Register with I2C address (34h) */ 19 /* Register with I2C address (34h) */
17 #define ITG3200_REG_ADDRESS 0x00 20 #define ITG3200_REG_ADDRESS 0x00
18 21
19 /* Sample rate divider 22 /* Sample rate divider
20 * Range: 0 to 255 23 * Range: 0 to 255
21 * Default value: 0x00 */ 24 * Default value: 0x00 */
22 #define ITG3200_REG_SAMPLE_RATE_DIV 0x15 25 #define ITG3200_REG_SAMPLE_RATE_DIV 0x15
23 26
24 /* Digital low pass filter settings */ 27 /* Digital low pass filter settings */
25 #define ITG3200_REG_DLPF 0x16 28 #define ITG3200_REG_DLPF 0x16
26 /* DLPF full scale range */ 29 /* DLPF full scale range */
27 #define ITG3200_DLPF_FS_SEL_2000 0x18 30 #define ITG3200_DLPF_FS_SEL_2000 0x18
28 /* Bandwidth (Hz) and internal sample rate 31 /* Bandwidth (Hz) and internal sample rate
29 * (kHz) of DLPF */ 32 * (kHz) of DLPF */
30 #define ITG3200_DLPF_256_8 0x00 33 #define ITG3200_DLPF_256_8 0x00
31 #define ITG3200_DLPF_188_1 0x01 34 #define ITG3200_DLPF_188_1 0x01
32 #define ITG3200_DLPF_98_1 0x02 35 #define ITG3200_DLPF_98_1 0x02
33 #define ITG3200_DLPF_42_1 0x03 36 #define ITG3200_DLPF_42_1 0x03
34 #define ITG3200_DLPF_20_1 0x04 37 #define ITG3200_DLPF_20_1 0x04
35 #define ITG3200_DLPF_10_1 0x05 38 #define ITG3200_DLPF_10_1 0x05
36 #define ITG3200_DLPF_5_1 0x06 39 #define ITG3200_DLPF_5_1 0x06
37 40
38 #define ITG3200_DLPF_CFG_MASK 0x07 41 #define ITG3200_DLPF_CFG_MASK 0x07
39 42
40 /* Configuration for interrupt operations */ 43 /* Configuration for interrupt operations */
41 #define ITG3200_REG_IRQ_CONFIG 0x17 44 #define ITG3200_REG_IRQ_CONFIG 0x17
42 /* Logic level */ 45 /* Logic level */
43 #define ITG3200_IRQ_ACTIVE_LOW 0x80 46 #define ITG3200_IRQ_ACTIVE_LOW 0x80
44 #define ITG3200_IRQ_ACTIVE_HIGH 0x00 47 #define ITG3200_IRQ_ACTIVE_HIGH 0x00
45 /* Drive type */ 48 /* Drive type */
46 #define ITG3200_IRQ_OPEN_DRAIN 0x40 49 #define ITG3200_IRQ_OPEN_DRAIN 0x40
47 #define ITG3200_IRQ_PUSH_PULL 0x00 50 #define ITG3200_IRQ_PUSH_PULL 0x00
48 /* Latch mode */ 51 /* Latch mode */
49 #define ITG3200_IRQ_LATCH_UNTIL_CLEARED 0x20 52 #define ITG3200_IRQ_LATCH_UNTIL_CLEARED 0x20
50 #define ITG3200_IRQ_LATCH_50US_PULSE 0x00 53 #define ITG3200_IRQ_LATCH_50US_PULSE 0x00
51 /* Latch clear method */ 54 /* Latch clear method */
52 #define ITG3200_IRQ_LATCH_CLEAR_ANY 0x10 55 #define ITG3200_IRQ_LATCH_CLEAR_ANY 0x10
53 #define ITG3200_IRQ_LATCH_CLEAR_STATUS 0x00 56 #define ITG3200_IRQ_LATCH_CLEAR_STATUS 0x00
54 /* Enable interrupt when device is ready */ 57 /* Enable interrupt when device is ready */
55 #define ITG3200_IRQ_DEVICE_RDY_ENABLE 0x04 58 #define ITG3200_IRQ_DEVICE_RDY_ENABLE 0x04
56 /* Enable interrupt when data is available */ 59 /* Enable interrupt when data is available */
57 #define ITG3200_IRQ_DATA_RDY_ENABLE 0x01 60 #define ITG3200_IRQ_DATA_RDY_ENABLE 0x01
58 61
59 /* Determine the status of ITG-3200 interrupts 62 /* Determine the status of ITG-3200 interrupts */
60 #define ITG3200_REG_IRQ_STATUS 0x1A 63 #define ITG3200_REG_IRQ_STATUS 0x1A
61 /* Status of 'device is ready'-interrupt */ 64 /* Status of 'device is ready'-interrupt */
62 #define ITG3200_IRQ_DEVICE_RDY_STATUS 0x04 65 #define ITG3200_IRQ_DEVICE_RDY_STATUS 0x04
63 /* Status of 'data is available'-interrupt */ 66 /* Status of 'data is available'-interrupt */
64 #define ITG3200_IRQ_DATA_RDY_STATUS 0x01 67 #define ITG3200_IRQ_DATA_RDY_STATUS 0x01
65 68
66 /* Sensor registers */ 69 /* Sensor registers */
67 #define ITG3200_REG_TEMP_OUT_H 0x1B 70 #define ITG3200_REG_TEMP_OUT_H 0x1B
68 #define ITG3200_REG_TEMP_OUT_L 0x1C 71 #define ITG3200_REG_TEMP_OUT_L 0x1C
69 #define ITG3200_REG_GYRO_XOUT_H 0x1D 72 #define ITG3200_REG_GYRO_XOUT_H 0x1D
70 #define ITG3200_REG_GYRO_XOUT_L 0x1E 73 #define ITG3200_REG_GYRO_XOUT_L 0x1E
71 #define ITG3200_REG_GYRO_YOUT_H 0x1F 74 #define ITG3200_REG_GYRO_YOUT_H 0x1F
72 #define ITG3200_REG_GYRO_YOUT_L 0x20 75 #define ITG3200_REG_GYRO_YOUT_L 0x20
73 #define ITG3200_REG_GYRO_ZOUT_H 0x21 76 #define ITG3200_REG_GYRO_ZOUT_H 0x21
74 #define ITG3200_REG_GYRO_ZOUT_L 0x22 77 #define ITG3200_REG_GYRO_ZOUT_L 0x22
75 78
76 /* Power management */ 79 /* Power management */
77 #define ITG3200_REG_POWER_MANAGEMENT 0x3E 80 #define ITG3200_REG_POWER_MANAGEMENT 0x3E
78 /* Reset device and internal registers to the 81 /* Reset device and internal registers to the
79 * power-up-default settings */ 82 * power-up-default settings */
80 #define ITG3200_RESET 0x80 83 #define ITG3200_RESET 0x80
81 /* Enable low power sleep mode */ 84 /* Enable low power sleep mode */
82 #define ITG3200_SLEEP 0x40 85 #define ITG3200_SLEEP 0x40
83 /* Put according gyroscope in standby mode */ 86 /* Put according gyroscope in standby mode */
84 #define ITG3200_STANDBY_GYRO_X 0x20 87 #define ITG3200_STANDBY_GYRO_X 0x20
85 #define ITG3200_STANDBY_GYRO_Y 0x10 88 #define ITG3200_STANDBY_GYRO_Y 0x10
86 #define ITG3200_STANDBY_GYRO_Z 0x08 89 #define ITG3200_STANDBY_GYRO_Z 0x08
87 /* Determine the device clock source */ 90 /* Determine the device clock source */
88 #define ITG3200_CLK_INTERNAL 0x00 91 #define ITG3200_CLK_INTERNAL 0x00
89 #define ITG3200_CLK_GYRO_X 0x01 92 #define ITG3200_CLK_GYRO_X 0x01
90 #define ITG3200_CLK_GYRO_Y 0x02 93 #define ITG3200_CLK_GYRO_Y 0x02
91 #define ITG3200_CLK_GYRO_Z 0x03 94 #define ITG3200_CLK_GYRO_Z 0x03
92 #define ITG3200_CLK_EXT_32K 0x04 95 #define ITG3200_CLK_EXT_32K 0x04
93 #define ITG3200_CLK_EXT_19M 0x05 96 #define ITG3200_CLK_EXT_19M 0x05
94 97
95 98
96 /** 99 /**
97 * struct itg3200 - device instance specific d 100 * struct itg3200 - device instance specific data
98 * @i2c: actual i2c_client 101 * @i2c: actual i2c_client
99 * @trig: data ready trigger from itg3200 pi 102 * @trig: data ready trigger from itg3200 pin
100 **/ 103 **/
101 struct itg3200 { 104 struct itg3200 {
102 struct i2c_client *i2c; 105 struct i2c_client *i2c;
103 struct iio_trigger *trig; 106 struct iio_trigger *trig;
104 struct iio_mount_matrix orientation; <<
105 /* lock to protect against multiple ac <<
106 struct mutex lock; <<
107 }; 107 };
108 108
109 enum ITG3200_SCAN_INDEX { 109 enum ITG3200_SCAN_INDEX {
110 ITG3200_SCAN_TEMP, 110 ITG3200_SCAN_TEMP,
111 ITG3200_SCAN_GYRO_X, 111 ITG3200_SCAN_GYRO_X,
112 ITG3200_SCAN_GYRO_Y, 112 ITG3200_SCAN_GYRO_Y,
113 ITG3200_SCAN_GYRO_Z, 113 ITG3200_SCAN_GYRO_Z,
114 ITG3200_SCAN_ELEMENTS, 114 ITG3200_SCAN_ELEMENTS,
115 }; 115 };
116 116
117 int itg3200_write_reg_8(struct iio_dev *indio_ 117 int itg3200_write_reg_8(struct iio_dev *indio_dev,
118 u8 reg_address, u8 val); 118 u8 reg_address, u8 val);
119 119
120 int itg3200_read_reg_8(struct iio_dev *indio_d 120 int itg3200_read_reg_8(struct iio_dev *indio_dev,
121 u8 reg_address, u8 *val); 121 u8 reg_address, u8 *val);
122 122
123 123
124 #ifdef CONFIG_IIO_BUFFER 124 #ifdef CONFIG_IIO_BUFFER
125 125
126 void itg3200_remove_trigger(struct iio_dev *in 126 void itg3200_remove_trigger(struct iio_dev *indio_dev);
127 int itg3200_probe_trigger(struct iio_dev *indi 127 int itg3200_probe_trigger(struct iio_dev *indio_dev);
128 128
129 int itg3200_buffer_configure(struct iio_dev *i 129 int itg3200_buffer_configure(struct iio_dev *indio_dev);
130 void itg3200_buffer_unconfigure(struct iio_dev 130 void itg3200_buffer_unconfigure(struct iio_dev *indio_dev);
131 131
132 #else /* CONFIG_IIO_BUFFER */ 132 #else /* CONFIG_IIO_BUFFER */
133 133
134 static inline void itg3200_remove_trigger(stru 134 static inline void itg3200_remove_trigger(struct iio_dev *indio_dev)
135 { 135 {
136 } 136 }
137 137
138 static inline int itg3200_probe_trigger(struct 138 static inline int itg3200_probe_trigger(struct iio_dev *indio_dev)
139 { 139 {
140 return 0; 140 return 0;
141 } 141 }
142 142
143 static inline int itg3200_buffer_configure(str 143 static inline int itg3200_buffer_configure(struct iio_dev *indio_dev)
144 { 144 {
145 return 0; 145 return 0;
146 } 146 }
147 147
148 static inline void itg3200_buffer_unconfigure( 148 static inline void itg3200_buffer_unconfigure(struct iio_dev *indio_dev)
149 { 149 {
150 } 150 }
151 151
152 #endif /* CONFIG_IIO_BUFFER */ 152 #endif /* CONFIG_IIO_BUFFER */
153 153
154 #endif /* ITG3200_H_ */ 154 #endif /* ITG3200_H_ */
155 155
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