1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * Analog Devices ADP5589/ADP5585 I/O Expander 2 * Analog Devices ADP5589/ADP5585 I/O Expander and QWERTY Keypad Controller
4 * 3 *
5 * Copyright 2010-2011 Analog Devices Inc. 4 * Copyright 2010-2011 Analog Devices Inc.
>> 5 *
>> 6 * Licensed under the GPL-2.
6 */ 7 */
7 8
8 #ifndef _ADP5589_H 9 #ifndef _ADP5589_H
9 #define _ADP5589_H 10 #define _ADP5589_H
10 11
11 /* 12 /*
12 * ADP5589 specific GPI and Keymap defines 13 * ADP5589 specific GPI and Keymap defines
13 */ 14 */
14 15
15 #define ADP5589_KEYMAPSIZE 88 16 #define ADP5589_KEYMAPSIZE 88
16 17
17 #define ADP5589_GPI_PIN_ROW0 97 18 #define ADP5589_GPI_PIN_ROW0 97
18 #define ADP5589_GPI_PIN_ROW1 98 19 #define ADP5589_GPI_PIN_ROW1 98
19 #define ADP5589_GPI_PIN_ROW2 99 20 #define ADP5589_GPI_PIN_ROW2 99
20 #define ADP5589_GPI_PIN_ROW3 100 21 #define ADP5589_GPI_PIN_ROW3 100
21 #define ADP5589_GPI_PIN_ROW4 101 22 #define ADP5589_GPI_PIN_ROW4 101
22 #define ADP5589_GPI_PIN_ROW5 102 23 #define ADP5589_GPI_PIN_ROW5 102
23 #define ADP5589_GPI_PIN_ROW6 103 24 #define ADP5589_GPI_PIN_ROW6 103
24 #define ADP5589_GPI_PIN_ROW7 104 25 #define ADP5589_GPI_PIN_ROW7 104
25 #define ADP5589_GPI_PIN_COL0 105 26 #define ADP5589_GPI_PIN_COL0 105
26 #define ADP5589_GPI_PIN_COL1 106 27 #define ADP5589_GPI_PIN_COL1 106
27 #define ADP5589_GPI_PIN_COL2 107 28 #define ADP5589_GPI_PIN_COL2 107
28 #define ADP5589_GPI_PIN_COL3 108 29 #define ADP5589_GPI_PIN_COL3 108
29 #define ADP5589_GPI_PIN_COL4 109 30 #define ADP5589_GPI_PIN_COL4 109
30 #define ADP5589_GPI_PIN_COL5 110 31 #define ADP5589_GPI_PIN_COL5 110
31 #define ADP5589_GPI_PIN_COL6 111 32 #define ADP5589_GPI_PIN_COL6 111
32 #define ADP5589_GPI_PIN_COL7 112 33 #define ADP5589_GPI_PIN_COL7 112
33 #define ADP5589_GPI_PIN_COL8 113 34 #define ADP5589_GPI_PIN_COL8 113
34 #define ADP5589_GPI_PIN_COL9 114 35 #define ADP5589_GPI_PIN_COL9 114
35 #define ADP5589_GPI_PIN_COL10 115 36 #define ADP5589_GPI_PIN_COL10 115
36 #define GPI_LOGIC1 116 37 #define GPI_LOGIC1 116
37 #define GPI_LOGIC2 117 38 #define GPI_LOGIC2 117
38 39
39 #define ADP5589_GPI_PIN_ROW_BASE ADP5589_GPI_P 40 #define ADP5589_GPI_PIN_ROW_BASE ADP5589_GPI_PIN_ROW0
40 #define ADP5589_GPI_PIN_ROW_END ADP5589_GPI_PI 41 #define ADP5589_GPI_PIN_ROW_END ADP5589_GPI_PIN_ROW7
41 #define ADP5589_GPI_PIN_COL_BASE ADP5589_GPI_P 42 #define ADP5589_GPI_PIN_COL_BASE ADP5589_GPI_PIN_COL0
42 #define ADP5589_GPI_PIN_COL_END ADP5589_GPI_PI 43 #define ADP5589_GPI_PIN_COL_END ADP5589_GPI_PIN_COL10
43 44
44 #define ADP5589_GPI_PIN_BASE ADP5589_GPI_PIN_R 45 #define ADP5589_GPI_PIN_BASE ADP5589_GPI_PIN_ROW_BASE
45 #define ADP5589_GPI_PIN_END ADP5589_GPI_PIN_CO 46 #define ADP5589_GPI_PIN_END ADP5589_GPI_PIN_COL_END
46 47
47 #define ADP5589_GPIMAPSIZE_MAX (ADP5589_GPI_PI 48 #define ADP5589_GPIMAPSIZE_MAX (ADP5589_GPI_PIN_END - ADP5589_GPI_PIN_BASE + 1)
48 49
49 /* 50 /*
50 * ADP5585 specific GPI and Keymap defines 51 * ADP5585 specific GPI and Keymap defines
51 */ 52 */
52 53
53 #define ADP5585_KEYMAPSIZE 30 54 #define ADP5585_KEYMAPSIZE 30
54 55
55 #define ADP5585_GPI_PIN_ROW0 37 56 #define ADP5585_GPI_PIN_ROW0 37
56 #define ADP5585_GPI_PIN_ROW1 38 57 #define ADP5585_GPI_PIN_ROW1 38
57 #define ADP5585_GPI_PIN_ROW2 39 58 #define ADP5585_GPI_PIN_ROW2 39
58 #define ADP5585_GPI_PIN_ROW3 40 59 #define ADP5585_GPI_PIN_ROW3 40
59 #define ADP5585_GPI_PIN_ROW4 41 60 #define ADP5585_GPI_PIN_ROW4 41
60 #define ADP5585_GPI_PIN_ROW5 42 61 #define ADP5585_GPI_PIN_ROW5 42
61 #define ADP5585_GPI_PIN_COL0 43 62 #define ADP5585_GPI_PIN_COL0 43
62 #define ADP5585_GPI_PIN_COL1 44 63 #define ADP5585_GPI_PIN_COL1 44
63 #define ADP5585_GPI_PIN_COL2 45 64 #define ADP5585_GPI_PIN_COL2 45
64 #define ADP5585_GPI_PIN_COL3 46 65 #define ADP5585_GPI_PIN_COL3 46
65 #define ADP5585_GPI_PIN_COL4 47 66 #define ADP5585_GPI_PIN_COL4 47
66 #define GPI_LOGIC 48 67 #define GPI_LOGIC 48
67 68
68 #define ADP5585_GPI_PIN_ROW_BASE ADP5585_GPI_P 69 #define ADP5585_GPI_PIN_ROW_BASE ADP5585_GPI_PIN_ROW0
69 #define ADP5585_GPI_PIN_ROW_END ADP5585_GPI_PI 70 #define ADP5585_GPI_PIN_ROW_END ADP5585_GPI_PIN_ROW5
70 #define ADP5585_GPI_PIN_COL_BASE ADP5585_GPI_P 71 #define ADP5585_GPI_PIN_COL_BASE ADP5585_GPI_PIN_COL0
71 #define ADP5585_GPI_PIN_COL_END ADP5585_GPI_PI 72 #define ADP5585_GPI_PIN_COL_END ADP5585_GPI_PIN_COL4
72 73
73 #define ADP5585_GPI_PIN_BASE ADP5585_GPI_PIN_R 74 #define ADP5585_GPI_PIN_BASE ADP5585_GPI_PIN_ROW_BASE
74 #define ADP5585_GPI_PIN_END ADP5585_GPI_PIN_CO 75 #define ADP5585_GPI_PIN_END ADP5585_GPI_PIN_COL_END
75 76
76 #define ADP5585_GPIMAPSIZE_MAX (ADP5585_GPI_PI 77 #define ADP5585_GPIMAPSIZE_MAX (ADP5585_GPI_PIN_END - ADP5585_GPI_PIN_BASE + 1)
77 78
78 struct adp5589_gpi_map { 79 struct adp5589_gpi_map {
79 unsigned short pin; 80 unsigned short pin;
80 unsigned short sw_evt; 81 unsigned short sw_evt;
81 }; 82 };
82 83
83 /* scan_cycle_time */ 84 /* scan_cycle_time */
84 #define ADP5589_SCAN_CYCLE_10ms 0 85 #define ADP5589_SCAN_CYCLE_10ms 0
85 #define ADP5589_SCAN_CYCLE_20ms 1 86 #define ADP5589_SCAN_CYCLE_20ms 1
86 #define ADP5589_SCAN_CYCLE_30ms 2 87 #define ADP5589_SCAN_CYCLE_30ms 2
87 #define ADP5589_SCAN_CYCLE_40ms 3 88 #define ADP5589_SCAN_CYCLE_40ms 3
88 89
89 /* RESET_CFG */ 90 /* RESET_CFG */
90 #define RESET_PULSE_WIDTH_500us 0 91 #define RESET_PULSE_WIDTH_500us 0
91 #define RESET_PULSE_WIDTH_1ms 1 92 #define RESET_PULSE_WIDTH_1ms 1
92 #define RESET_PULSE_WIDTH_2ms 2 93 #define RESET_PULSE_WIDTH_2ms 2
93 #define RESET_PULSE_WIDTH_10ms 3 94 #define RESET_PULSE_WIDTH_10ms 3
94 95
95 #define RESET_TRIG_TIME_0ms (0 << 96 #define RESET_TRIG_TIME_0ms (0 << 2)
96 #define RESET_TRIG_TIME_1000ms (1 << 97 #define RESET_TRIG_TIME_1000ms (1 << 2)
97 #define RESET_TRIG_TIME_1500ms (2 << 98 #define RESET_TRIG_TIME_1500ms (2 << 2)
98 #define RESET_TRIG_TIME_2000ms (3 << 99 #define RESET_TRIG_TIME_2000ms (3 << 2)
99 #define RESET_TRIG_TIME_2500ms (4 << 100 #define RESET_TRIG_TIME_2500ms (4 << 2)
100 #define RESET_TRIG_TIME_3000ms (5 << 101 #define RESET_TRIG_TIME_3000ms (5 << 2)
101 #define RESET_TRIG_TIME_3500ms (6 << 102 #define RESET_TRIG_TIME_3500ms (6 << 2)
102 #define RESET_TRIG_TIME_4000ms (7 << 103 #define RESET_TRIG_TIME_4000ms (7 << 2)
103 104
104 #define RESET_PASSTHRU_EN (1 << 105 #define RESET_PASSTHRU_EN (1 << 5)
105 #define RESET1_POL_HIGH (1 << 106 #define RESET1_POL_HIGH (1 << 6)
106 #define RESET1_POL_LOW (0 << 107 #define RESET1_POL_LOW (0 << 6)
107 #define RESET2_POL_HIGH (1 << 108 #define RESET2_POL_HIGH (1 << 7)
108 #define RESET2_POL_LOW (0 << 109 #define RESET2_POL_LOW (0 << 7)
109 110
110 /* ADP5589 Mask Bits: 111 /* ADP5589 Mask Bits:
111 * C C C C C C C C C C C | R R R R R R R R 112 * C C C C C C C C C C C | R R R R R R R R
112 * 1 9 8 7 6 5 4 3 2 1 0 | 7 6 5 4 3 2 1 0 113 * 1 9 8 7 6 5 4 3 2 1 0 | 7 6 5 4 3 2 1 0
113 * 0 114 * 0
114 * ---------------- BIT ------------------ 115 * ---------------- BIT ------------------
115 * 1 1 1 1 1 1 1 1 1 0 0 | 0 0 0 0 0 0 0 0 116 * 1 1 1 1 1 1 1 1 1 0 0 | 0 0 0 0 0 0 0 0
116 * 8 7 6 5 4 3 2 1 0 9 8 | 7 6 5 4 3 2 1 0 117 * 8 7 6 5 4 3 2 1 0 9 8 | 7 6 5 4 3 2 1 0
117 */ 118 */
118 119
119 #define ADP_ROW(x) (1 << (x)) 120 #define ADP_ROW(x) (1 << (x))
120 #define ADP_COL(x) (1 << (x + 8)) 121 #define ADP_COL(x) (1 << (x + 8))
121 #define ADP5589_ROW_MASK 0xFF 122 #define ADP5589_ROW_MASK 0xFF
122 #define ADP5589_COL_MASK 0xFF 123 #define ADP5589_COL_MASK 0xFF
123 #define ADP5589_COL_SHIFT 8 124 #define ADP5589_COL_SHIFT 8
124 #define ADP5589_MAX_ROW_NUM 7 125 #define ADP5589_MAX_ROW_NUM 7
125 #define ADP5589_MAX_COL_NUM 10 126 #define ADP5589_MAX_COL_NUM 10
126 127
127 /* ADP5585 Mask Bits: 128 /* ADP5585 Mask Bits:
128 * C C C C C | R R R R R R 129 * C C C C C | R R R R R R
129 * 4 3 2 1 0 | 5 4 3 2 1 0 130 * 4 3 2 1 0 | 5 4 3 2 1 0
130 * 131 *
131 * ---- BIT -- ----------- 132 * ---- BIT -- -----------
132 * 1 0 0 0 0 | 0 0 0 0 0 0 133 * 1 0 0 0 0 | 0 0 0 0 0 0
133 * 0 9 8 7 6 | 5 4 3 2 1 0 134 * 0 9 8 7 6 | 5 4 3 2 1 0
134 */ 135 */
135 136
136 #define ADP5585_ROW_MASK 0x3F 137 #define ADP5585_ROW_MASK 0x3F
137 #define ADP5585_COL_MASK 0x1F 138 #define ADP5585_COL_MASK 0x1F
138 #define ADP5585_ROW_SHIFT 0 139 #define ADP5585_ROW_SHIFT 0
139 #define ADP5585_COL_SHIFT 6 140 #define ADP5585_COL_SHIFT 6
140 #define ADP5585_MAX_ROW_NUM 5 141 #define ADP5585_MAX_ROW_NUM 5
141 #define ADP5585_MAX_COL_NUM 4 142 #define ADP5585_MAX_COL_NUM 4
142 143
143 #define ADP5585_ROW(x) (1 << ((x) & ADP5585_R 144 #define ADP5585_ROW(x) (1 << ((x) & ADP5585_ROW_MASK))
144 #define ADP5585_COL(x) (1 << (((x) & ADP5585_ 145 #define ADP5585_COL(x) (1 << (((x) & ADP5585_COL_MASK) + ADP5585_COL_SHIFT))
145 146
146 /* Put one of these structures in i2c_board_in 147 /* Put one of these structures in i2c_board_info platform_data */
147 148
148 struct adp5589_kpad_platform_data { 149 struct adp5589_kpad_platform_data {
149 unsigned keypad_en_mask; /* Key 150 unsigned keypad_en_mask; /* Keypad (Rows/Columns) enable mask */
150 const unsigned short *keymap; /* Poi 151 const unsigned short *keymap; /* Pointer to keymap */
151 unsigned short keymapsize; /* Key 152 unsigned short keymapsize; /* Keymap size */
152 bool repeat; /* Ena 153 bool repeat; /* Enable key repeat */
153 bool en_keylock; /* Ena 154 bool en_keylock; /* Enable key lock feature (ADP5589 only)*/
154 unsigned char unlock_key1; /* Unl 155 unsigned char unlock_key1; /* Unlock Key 1 (ADP5589 only) */
155 unsigned char unlock_key2; /* Unl 156 unsigned char unlock_key2; /* Unlock Key 2 (ADP5589 only) */
156 unsigned char unlock_timer; /* Tim 157 unsigned char unlock_timer; /* Time in seconds [0..7] between the two unlock keys 0=disable (ADP5589 only) */
157 unsigned char scan_cycle_time; /* Tim 158 unsigned char scan_cycle_time; /* Time between consecutive scan cycles */
158 unsigned char reset_cfg; /* Res 159 unsigned char reset_cfg; /* Reset config */
159 unsigned short reset1_key_1; /* Res 160 unsigned short reset1_key_1; /* Reset Key 1 */
160 unsigned short reset1_key_2; /* Res 161 unsigned short reset1_key_2; /* Reset Key 2 */
161 unsigned short reset1_key_3; /* Res 162 unsigned short reset1_key_3; /* Reset Key 3 */
162 unsigned short reset2_key_1; /* Res 163 unsigned short reset2_key_1; /* Reset Key 1 */
163 unsigned short reset2_key_2; /* Res 164 unsigned short reset2_key_2; /* Reset Key 2 */
164 unsigned debounce_dis_mask; /* Dis 165 unsigned debounce_dis_mask; /* Disable debounce mask */
165 unsigned pull_dis_mask; /* Dis 166 unsigned pull_dis_mask; /* Disable all pull resistors mask */
166 unsigned pullup_en_100k; /* Pul 167 unsigned pullup_en_100k; /* Pull-Up 100k Enable Mask */
167 unsigned pullup_en_300k; /* Pul 168 unsigned pullup_en_300k; /* Pull-Up 300k Enable Mask */
168 unsigned pulldown_en_300k; /* Pul 169 unsigned pulldown_en_300k; /* Pull-Down 300k Enable Mask */
169 const struct adp5589_gpi_map *gpimap; 170 const struct adp5589_gpi_map *gpimap;
170 unsigned short gpimapsize; 171 unsigned short gpimapsize;
171 const struct adp5589_gpio_platform_dat 172 const struct adp5589_gpio_platform_data *gpio_data;
172 }; 173 };
173 174
174 struct i2c_client; /* forward declaration */ 175 struct i2c_client; /* forward declaration */
175 176
176 struct adp5589_gpio_platform_data { 177 struct adp5589_gpio_platform_data {
177 int gpio_start; /* GPIO Chip b 178 int gpio_start; /* GPIO Chip base # */
>> 179 int (*setup)(struct i2c_client *client,
>> 180 int gpio, unsigned ngpio,
>> 181 void *context);
>> 182 int (*teardown)(struct i2c_client *client,
>> 183 int gpio, unsigned ngpio,
>> 184 void *context);
>> 185 void *context;
178 }; 186 };
179 187
180 #endif 188 #endif
181 189
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.