1 /* SPDX-License-Identifier: GPL-2.0 */ 1
2 /*
3 * Common LiteX header providing
4 * helper functions for accessing CSRs.
5 *
6 * Copyright (C) 2019-2020 Antmicro <www.antmi
7 */
8
9 #ifndef _LINUX_LITEX_H
10 #define _LINUX_LITEX_H
11
12 #include <linux/io.h>
13
14 static inline void _write_litex_subregister(u3
15 {
16 writel((u32 __force)cpu_to_le32(val),
17 }
18
19 static inline u32 _read_litex_subregister(void
20 {
21 return le32_to_cpu((__le32 __force)rea
22 }
23
24 /*
25 * LiteX SoC Generator, depending on the confi
26 * logical CSR (Control&Status Register) into
27 * registers.
28 *
29 * For example, in the configuration with 8-bi
30 * 32-bit wide logical CSR will be laid out as
31 * subregisters, each one containing one byte
32 *
33 * For Linux support, upstream LiteX enforces
34 * means that only larger-than-32-bit CSRs wil
35 * subregisters (e.g., a 64-bit CSR will be sp
36 * 32-bit subregisters).
37 *
38 * For details see: https://github.com/enjoy-d
39 */
40
41 static inline void litex_write8(void __iomem *
42 {
43 _write_litex_subregister(val, reg);
44 }
45
46 static inline void litex_write16(void __iomem
47 {
48 _write_litex_subregister(val, reg);
49 }
50
51 static inline void litex_write32(void __iomem
52 {
53 _write_litex_subregister(val, reg);
54 }
55
56 static inline void litex_write64(void __iomem
57 {
58 _write_litex_subregister(val >> 32, re
59 _write_litex_subregister(val, reg + 4)
60 }
61
62 static inline u8 litex_read8(void __iomem *reg
63 {
64 return _read_litex_subregister(reg);
65 }
66
67 static inline u16 litex_read16(void __iomem *r
68 {
69 return _read_litex_subregister(reg);
70 }
71
72 static inline u32 litex_read32(void __iomem *r
73 {
74 return _read_litex_subregister(reg);
75 }
76
77 static inline u64 litex_read64(void __iomem *r
78 {
79 return ((u64)_read_litex_subregister(r
80 _read_litex_subregister(reg +
81 }
82
83 #endif /* _LINUX_LITEX_H */
84
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