1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* 2 /*
3 * Header file for device driver Hi6421 PMIC 3 * Header file for device driver Hi6421 PMIC
4 * 4 *
5 * Copyright (c) <2011-2014> HiSilicon Technol 5 * Copyright (c) <2011-2014> HiSilicon Technologies Co., Ltd.
6 * http://www.hisilicon.com 6 * http://www.hisilicon.com
7 * Copyright (c) <2013-2014> Linaro Ltd. 7 * Copyright (c) <2013-2014> Linaro Ltd.
8 * https://www.linaro.org 8 * https://www.linaro.org
9 * 9 *
10 * Author: Guodong Xu <guodong.xu@linaro.org> 10 * Author: Guodong Xu <guodong.xu@linaro.org>
11 */ 11 */
12 12
13 #ifndef __HI6421_PMIC_H 13 #ifndef __HI6421_PMIC_H
14 #define __HI6421_PMIC_H 14 #define __HI6421_PMIC_H
15 15
16 /* Hi6421 registers are mapped to memory bus i 16 /* Hi6421 registers are mapped to memory bus in 4 bytes stride */
17 #define HI6421_REG_TO_BUS_ADDR(x) (x << 17 #define HI6421_REG_TO_BUS_ADDR(x) (x << 2)
18 18
19 /* Hi6421 maximum register number */ 19 /* Hi6421 maximum register number */
20 #define HI6421_REG_MAX 0xFF 20 #define HI6421_REG_MAX 0xFF
21 21
22 /* Hi6421 OCP (over current protection) and DE 22 /* Hi6421 OCP (over current protection) and DEB (debounce) control register */
23 #define HI6421_OCP_DEB_CTRL_REG HI6421 23 #define HI6421_OCP_DEB_CTRL_REG HI6421_REG_TO_BUS_ADDR(0x51)
24 #define HI6421_OCP_DEB_SEL_MASK 0x0C 24 #define HI6421_OCP_DEB_SEL_MASK 0x0C
25 #define HI6421_OCP_DEB_SEL_8MS 0x00 25 #define HI6421_OCP_DEB_SEL_8MS 0x00
26 #define HI6421_OCP_DEB_SEL_16MS 0x04 26 #define HI6421_OCP_DEB_SEL_16MS 0x04
27 #define HI6421_OCP_DEB_SEL_32MS 0x08 27 #define HI6421_OCP_DEB_SEL_32MS 0x08
28 #define HI6421_OCP_DEB_SEL_64MS 0x0C 28 #define HI6421_OCP_DEB_SEL_64MS 0x0C
29 #define HI6421_OCP_EN_DEBOUNCE_MASK 0x02 29 #define HI6421_OCP_EN_DEBOUNCE_MASK 0x02
30 #define HI6421_OCP_EN_DEBOUNCE_ENABLE 0x02 30 #define HI6421_OCP_EN_DEBOUNCE_ENABLE 0x02
31 #define HI6421_OCP_AUTO_STOP_MASK 0x01 31 #define HI6421_OCP_AUTO_STOP_MASK 0x01
32 #define HI6421_OCP_AUTO_STOP_ENABLE 0x01 32 #define HI6421_OCP_AUTO_STOP_ENABLE 0x01
33 33
34 struct hi6421_pmic { 34 struct hi6421_pmic {
35 struct regmap *regmap; 35 struct regmap *regmap;
36 }; 36 };
37 37
38 enum hi6421_type { 38 enum hi6421_type {
39 HI6421 = 0, 39 HI6421 = 0,
40 HI6421_V530, 40 HI6421_V530,
41 }; 41 };
42 42
43 #endif /* __HI6421_PMIC_H */ 43 #endif /* __HI6421_PMIC_H */
44 44
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