1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* 2 /*
3 * Maxim MAX77714 Register and data structures 3 * Maxim MAX77714 Register and data structures definition.
4 * 4 *
5 * Copyright (C) 2022 Luca Ceresoli 5 * Copyright (C) 2022 Luca Ceresoli
6 * Author: Luca Ceresoli <luca.ceresoli@bootli 6 * Author: Luca Ceresoli <luca.ceresoli@bootlin.com>
7 */ 7 */
8 8
9 #ifndef __LINUX_MFD_MAX77714_H_ 9 #ifndef __LINUX_MFD_MAX77714_H_
10 #define __LINUX_MFD_MAX77714_H_ 10 #define __LINUX_MFD_MAX77714_H_
11 11
12 #include <linux/bits.h> 12 #include <linux/bits.h>
13 13
14 #define MAX77714_INT_TOP 0x00 14 #define MAX77714_INT_TOP 0x00
15 #define MAX77714_INT_TOPM 0x07 /* Datash 15 #define MAX77714_INT_TOPM 0x07 /* Datasheet says "read only", but it is RW */
16 16
17 #define MAX77714_INT_TOP_ONOFF BIT(1) 17 #define MAX77714_INT_TOP_ONOFF BIT(1)
18 #define MAX77714_INT_TOP_RTC BIT(3) 18 #define MAX77714_INT_TOP_RTC BIT(3)
19 #define MAX77714_INT_TOP_GPIO BIT(4) 19 #define MAX77714_INT_TOP_GPIO BIT(4)
20 #define MAX77714_INT_TOP_LDO BIT(5) 20 #define MAX77714_INT_TOP_LDO BIT(5)
21 #define MAX77714_INT_TOP_SD BIT(6) 21 #define MAX77714_INT_TOP_SD BIT(6)
22 #define MAX77714_INT_TOP_GLBL BIT(7) 22 #define MAX77714_INT_TOP_GLBL BIT(7)
23 23
24 #define MAX77714_32K_STATUS 0x30 24 #define MAX77714_32K_STATUS 0x30
25 #define MAX77714_32K_STATUS_SIOSCOK BIT(5) 25 #define MAX77714_32K_STATUS_SIOSCOK BIT(5)
26 #define MAX77714_32K_STATUS_XOSCOK BIT(4) 26 #define MAX77714_32K_STATUS_XOSCOK BIT(4)
27 #define MAX77714_32K_STATUS_32KSOURCE BIT(3) 27 #define MAX77714_32K_STATUS_32KSOURCE BIT(3)
28 #define MAX77714_32K_STATUS_32KLOAD_MSK 0x3 28 #define MAX77714_32K_STATUS_32KLOAD_MSK 0x3
29 #define MAX77714_32K_STATUS_32KLOAD_SHF 1 29 #define MAX77714_32K_STATUS_32KLOAD_SHF 1
30 #define MAX77714_32K_STATUS_CRYSTAL_CFG BIT(0) 30 #define MAX77714_32K_STATUS_CRYSTAL_CFG BIT(0)
31 31
32 #define MAX77714_32K_CONFIG 0x31 32 #define MAX77714_32K_CONFIG 0x31
33 #define MAX77714_32K_CONFIG_XOSC_RETRY BIT(4) 33 #define MAX77714_32K_CONFIG_XOSC_RETRY BIT(4)
34 34
35 #define MAX77714_CNFG_GLBL2 0x91 35 #define MAX77714_CNFG_GLBL2 0x91
36 #define MAX77714_WDTEN BIT(2) 36 #define MAX77714_WDTEN BIT(2)
37 #define MAX77714_WDTSLPC BIT(3) 37 #define MAX77714_WDTSLPC BIT(3)
38 #define MAX77714_TWD_MASK 0x3 38 #define MAX77714_TWD_MASK 0x3
39 #define MAX77714_TWD_2s 0x0 39 #define MAX77714_TWD_2s 0x0
40 #define MAX77714_TWD_16s 0x1 40 #define MAX77714_TWD_16s 0x1
41 #define MAX77714_TWD_64s 0x2 41 #define MAX77714_TWD_64s 0x2
42 #define MAX77714_TWD_128s 0x3 42 #define MAX77714_TWD_128s 0x3
43 43
44 #define MAX77714_CNFG_GLBL3 0x92 44 #define MAX77714_CNFG_GLBL3 0x92
45 #define MAX77714_WDTC BIT(0) 45 #define MAX77714_WDTC BIT(0)
46 46
47 #define MAX77714_CNFG2_ONOFF 0x94 47 #define MAX77714_CNFG2_ONOFF 0x94
48 #define MAX77714_WD_RST_WK BIT(5) 48 #define MAX77714_WD_RST_WK BIT(5)
49 49
50 /* Interrupts */ 50 /* Interrupts */
51 enum { 51 enum {
52 MAX77714_IRQ_TOP_ONOFF, 52 MAX77714_IRQ_TOP_ONOFF,
53 MAX77714_IRQ_TOP_RTC, /* Rea 53 MAX77714_IRQ_TOP_RTC, /* Real-time clock */
54 MAX77714_IRQ_TOP_GPIO, /* GPI 54 MAX77714_IRQ_TOP_GPIO, /* GPIOs */
55 MAX77714_IRQ_TOP_LDO, /* Low 55 MAX77714_IRQ_TOP_LDO, /* Low-dropout regulators */
56 MAX77714_IRQ_TOP_SD, /* Ste 56 MAX77714_IRQ_TOP_SD, /* Step-down regulators */
57 MAX77714_IRQ_TOP_GLBL, /* "Gl 57 MAX77714_IRQ_TOP_GLBL, /* "Global resources": Low-Battery, overtemp... */
58 }; 58 };
59 59
60 #endif /* __LINUX_MFD_MAX77714_H_ */ 60 #endif /* __LINUX_MFD_MAX77714_H_ */
61 61
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