1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * Copyright 2010 Yong Shen <yong.shen@linaro. !! 2 * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
4 * Copyright 2009-2010 Pengutronix !! 3 *
5 * Uwe Kleine-Koenig <u.kleine-koenig@pengutro !! 4 * Initial development of this code was funded by
>> 5 * Phytec Messtechnik GmbH, http://www.phytec.de
>> 6 *
>> 7 * This program is free software; you can redistribute it and/or modify
>> 8 * it under the terms of the GNU General Public License as published by
>> 9 * the Free Software Foundation; either version 2 of the License, or
>> 10 * (at your option) any later version.
>> 11 *
>> 12 * This program is distributed in the hope that it will be useful,
>> 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> 15 * GNU General Public License for more details.
>> 16 *
>> 17 * You should have received a copy of the GNU General Public License
>> 18 * along with this program; if not, write to the Free Software
>> 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
6 */ 20 */
7 #ifndef __LINUX_MFD_MC13783_H <<
8 #define __LINUX_MFD_MC13783_H <<
9 21
10 #include <linux/mfd/mc13xxx.h> !! 22 #ifndef __INCLUDE_LINUX_MFD_MC13783_H
>> 23 #define __INCLUDE_LINUX_MFD_MC13783_H
11 24
12 #define MC13783_REG_SW1A 0 !! 25 struct mc13783;
13 #define MC13783_REG_SW1B 1 !! 26 struct regulator_init_data;
14 #define MC13783_REG_SW2A 2 !! 27
15 #define MC13783_REG_SW2B 3 !! 28 struct mc13783_regulator_init_data {
16 #define MC13783_REG_SW3 4 !! 29 int id;
17 #define MC13783_REG_PLL 5 !! 30 struct regulator_init_data *init_data;
18 #define MC13783_REG_VAUDIO 6 !! 31 };
19 #define MC13783_REG_VIOHI 7 !! 32
20 #define MC13783_REG_VIOLO 8 !! 33 struct mc13783_platform_data {
21 #define MC13783_REG_VDIG 9 !! 34 struct mc13783_regulator_init_data *regulators;
22 #define MC13783_REG_VGEN 10 !! 35 int num_regulators;
23 #define MC13783_REG_VRFDIG 11 !! 36 unsigned int flags;
24 #define MC13783_REG_VRFREF 12 !! 37 };
25 #define MC13783_REG_VRFCP 13 !! 38
26 #define MC13783_REG_VSIM 14 !! 39 /* mc13783_platform_data flags */
27 #define MC13783_REG_VESIM 15 !! 40 #define MC13783_USE_TOUCHSCREEN (1 << 0)
28 #define MC13783_REG_VCAM 16 !! 41 #define MC13783_USE_CODEC (1 << 1)
29 #define MC13783_REG_VRFBG 17 !! 42 #define MC13783_USE_ADC (1 << 2)
30 #define MC13783_REG_VVIB 18 !! 43 #define MC13783_USE_RTC (1 << 3)
31 #define MC13783_REG_VRF1 19 !! 44 #define MC13783_USE_REGULATOR (1 << 4)
32 #define MC13783_REG_VRF2 20 !! 45
33 #define MC13783_REG_VMMC1 21 !! 46 int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
34 #define MC13783_REG_VMMC2 22 !! 47 unsigned int channel, unsigned int *sample);
35 #define MC13783_REG_GPO1 23 !! 48
36 #define MC13783_REG_GPO2 24 !! 49 void mc13783_adc_set_ts_status(struct mc13783 *mc13783, unsigned int status);
37 #define MC13783_REG_GPO3 25 !! 50
38 #define MC13783_REG_GPO4 26 !! 51 #define MC13783_SW_SW1A 0
39 #define MC13783_REG_V1 27 !! 52 #define MC13783_SW_SW1B 1
40 #define MC13783_REG_V2 28 !! 53 #define MC13783_SW_SW2A 2
41 #define MC13783_REG_V3 29 !! 54 #define MC13783_SW_SW2B 3
42 #define MC13783_REG_V4 30 !! 55 #define MC13783_SW_SW3 4
43 #define MC13783_REG_PWGT1SPI 31 !! 56 #define MC13783_SW_PLL 5
44 #define MC13783_REG_PWGT2SPI 32 !! 57 #define MC13783_REGU_VAUDIO 6
45 !! 58 #define MC13783_REGU_VIOHI 7
46 #define MC13783_IRQ_ADCDONE MC13XXX_IRQ_AD !! 59 #define MC13783_REGU_VIOLO 8
47 #define MC13783_IRQ_ADCBISDONE MC13XXX_IRQ_AD !! 60 #define MC13783_REGU_VDIG 9
48 #define MC13783_IRQ_TS MC13XXX_IRQ_TS !! 61 #define MC13783_REGU_VGEN 10
49 #define MC13783_IRQ_WHIGH 3 !! 62 #define MC13783_REGU_VRFDIG 11
50 #define MC13783_IRQ_WLOW 4 !! 63 #define MC13783_REGU_VRFREF 12
51 #define MC13783_IRQ_CHGDET MC13XXX_IRQ_CH !! 64 #define MC13783_REGU_VRFCP 13
52 #define MC13783_IRQ_CHGOV 7 !! 65 #define MC13783_REGU_VSIM 14
53 #define MC13783_IRQ_CHGREV MC13XXX_IRQ_CH !! 66 #define MC13783_REGU_VESIM 15
54 #define MC13783_IRQ_CHGSHORT MC13XXX_IRQ_CH !! 67 #define MC13783_REGU_VCAM 16
55 #define MC13783_IRQ_CCCV MC13XXX_IRQ_CC !! 68 #define MC13783_REGU_VRFBG 17
56 #define MC13783_IRQ_CHGCURR MC13XXX_IRQ_CH !! 69 #define MC13783_REGU_VVIB 18
57 #define MC13783_IRQ_BPON MC13XXX_IRQ_BP !! 70 #define MC13783_REGU_VRF1 19
58 #define MC13783_IRQ_LOBATL MC13XXX_IRQ_LO !! 71 #define MC13783_REGU_VRF2 20
59 #define MC13783_IRQ_LOBATH MC13XXX_IRQ_LO !! 72 #define MC13783_REGU_VMMC1 21
60 #define MC13783_IRQ_UDP 15 !! 73 #define MC13783_REGU_VMMC2 22
61 #define MC13783_IRQ_USB 16 !! 74 #define MC13783_REGU_GPO1 23
62 #define MC13783_IRQ_ID 19 !! 75 #define MC13783_REGU_GPO2 24
63 #define MC13783_IRQ_SE1 21 !! 76 #define MC13783_REGU_GPO3 25
64 #define MC13783_IRQ_CKDET 22 !! 77 #define MC13783_REGU_GPO4 26
65 #define MC13783_IRQ_UDM 23 !! 78 #define MC13783_REGU_V1 27
66 #define MC13783_IRQ_1HZ MC13XXX_IRQ_1H !! 79 #define MC13783_REGU_V2 28
67 #define MC13783_IRQ_TODA MC13XXX_IRQ_TO !! 80 #define MC13783_REGU_V3 29
68 #define MC13783_IRQ_ONOFD1 27 !! 81 #define MC13783_REGU_V4 30
69 #define MC13783_IRQ_ONOFD2 28 !! 82
70 #define MC13783_IRQ_ONOFD3 29 !! 83 #endif /* __INCLUDE_LINUX_MFD_MC13783_H */
71 #define MC13783_IRQ_SYSRST MC13XXX_IRQ_SY <<
72 #define MC13783_IRQ_RTCRST MC13XXX_IRQ_RT <<
73 #define MC13783_IRQ_PC MC13XXX_IRQ_PC <<
74 #define MC13783_IRQ_WARM MC13XXX_IRQ_WA <<
75 #define MC13783_IRQ_MEMHLD MC13XXX_IRQ_ME <<
76 #define MC13783_IRQ_PWRRDY 35 <<
77 #define MC13783_IRQ_THWARNL MC13XXX_IRQ_TH <<
78 #define MC13783_IRQ_THWARNH MC13XXX_IRQ_TH <<
79 #define MC13783_IRQ_CLK MC13XXX_IRQ_CL <<
80 #define MC13783_IRQ_SEMAF 39 <<
81 #define MC13783_IRQ_MC2B 41 <<
82 #define MC13783_IRQ_HSDET 42 <<
83 #define MC13783_IRQ_HSL 43 <<
84 #define MC13783_IRQ_ALSPTH 44 <<
85 #define MC13783_IRQ_AHSSHORT 45 <<
86 84
87 #endif /* ifndef __LINUX_MFD_MC13783_H */ <<
88 85
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