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TOMOYO Linux Cross Reference
Linux/include/linux/mfd/mt6359/registers.h

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

Differences between /include/linux/mfd/mt6359/registers.h (Version linux-6.12-rc7) and /include/linux/mfd/mt6359/registers.h (Version linux-5.0.21)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 
  2 /*                                                
  3  * Copyright (c) 2021 MediaTek Inc.               
  4  */                                               
  5                                                   
  6 #ifndef __MFD_MT6359_REGISTERS_H__                
  7 #define __MFD_MT6359_REGISTERS_H__                
  8                                                   
  9 /* PMIC Registers */                              
 10 #define MT6359_SWCID                         0    
 11 #define MT6359_TOPSTATUS                     0    
 12 #define MT6359_TOP_RST_MISC                  0    
 13 #define MT6359_MISC_TOP_INT_CON0             0    
 14 #define MT6359_MISC_TOP_INT_STATUS0          0    
 15 #define MT6359_TOP_INT_STATUS0               0    
 16 #define MT6359_SCK_TOP_INT_CON0              0    
 17 #define MT6359_SCK_TOP_INT_STATUS0           0    
 18 #define MT6359_EOSC_CALI_CON0                0    
 19 #define MT6359_EOSC_CALI_CON1                0    
 20 #define MT6359_RTC_MIX_CON0                  0    
 21 #define MT6359_RTC_MIX_CON1                  0    
 22 #define MT6359_RTC_MIX_CON2                  0    
 23 #define MT6359_RTC_DSN_ID                    0    
 24 #define MT6359_RTC_DSN_REV0                  0    
 25 #define MT6359_RTC_DBI                       0    
 26 #define MT6359_RTC_DXI                       0    
 27 #define MT6359_RTC_BBPU                      0    
 28 #define MT6359_RTC_IRQ_STA                   0    
 29 #define MT6359_RTC_IRQ_EN                    0    
 30 #define MT6359_RTC_CII_EN                    0    
 31 #define MT6359_RTC_AL_MASK                   0    
 32 #define MT6359_RTC_TC_SEC                    0    
 33 #define MT6359_RTC_TC_MIN                    0    
 34 #define MT6359_RTC_TC_HOU                    0    
 35 #define MT6359_RTC_TC_DOM                    0    
 36 #define MT6359_RTC_TC_DOW                    0    
 37 #define MT6359_RTC_TC_MTH                    0    
 38 #define MT6359_RTC_TC_YEA                    0    
 39 #define MT6359_RTC_AL_SEC                    0    
 40 #define MT6359_RTC_AL_MIN                    0    
 41 #define MT6359_RTC_AL_HOU                    0    
 42 #define MT6359_RTC_AL_DOM                    0    
 43 #define MT6359_RTC_AL_DOW                    0    
 44 #define MT6359_RTC_AL_MTH                    0    
 45 #define MT6359_RTC_AL_YEA                    0    
 46 #define MT6359_RTC_OSC32CON                  0    
 47 #define MT6359_RTC_POWERKEY1                 0    
 48 #define MT6359_RTC_POWERKEY2                 0    
 49 #define MT6359_RTC_PDN1                      0    
 50 #define MT6359_RTC_PDN2                      0    
 51 #define MT6359_RTC_SPAR0                     0    
 52 #define MT6359_RTC_SPAR1                     0    
 53 #define MT6359_RTC_PROT                      0    
 54 #define MT6359_RTC_DIFF                      0    
 55 #define MT6359_RTC_CALI                      0    
 56 #define MT6359_RTC_WRTGR                     0    
 57 #define MT6359_RTC_CON                       0    
 58 #define MT6359_RTC_SEC_CTRL                  0    
 59 #define MT6359_RTC_INT_CNT                   0    
 60 #define MT6359_RTC_SEC_DAT0                  0    
 61 #define MT6359_RTC_SEC_DAT1                  0    
 62 #define MT6359_RTC_SEC_DAT2                  0    
 63 #define MT6359_RTC_SEC_DSN_ID                0    
 64 #define MT6359_RTC_SEC_DSN_REV0              0    
 65 #define MT6359_RTC_SEC_DBI                   0    
 66 #define MT6359_RTC_SEC_DXI                   0    
 67 #define MT6359_RTC_TC_SEC_SEC                0    
 68 #define MT6359_RTC_TC_MIN_SEC                0    
 69 #define MT6359_RTC_TC_HOU_SEC                0    
 70 #define MT6359_RTC_TC_DOM_SEC                0    
 71 #define MT6359_RTC_TC_DOW_SEC                0    
 72 #define MT6359_RTC_TC_MTH_SEC                0    
 73 #define MT6359_RTC_TC_YEA_SEC                0    
 74 #define MT6359_RTC_SEC_CK_PDN                0    
 75 #define MT6359_RTC_SEC_WRTGR                 0    
 76 #define MT6359_PSC_TOP_INT_CON0              0    
 77 #define MT6359_PSC_TOP_INT_STATUS0           0    
 78 #define MT6359_BM_TOP_INT_CON0               0    
 79 #define MT6359_BM_TOP_INT_CON1               0    
 80 #define MT6359_BM_TOP_INT_STATUS0            0    
 81 #define MT6359_BM_TOP_INT_STATUS1            0    
 82 #define MT6359_HK_TOP_INT_CON0               0    
 83 #define MT6359_HK_TOP_INT_STATUS0            0    
 84 #define MT6359_BUCK_TOP_INT_CON0             0    
 85 #define MT6359_BUCK_TOP_INT_STATUS0          0    
 86 #define MT6359_BUCK_VPU_CON0                 0    
 87 #define MT6359_BUCK_VPU_DBG0                 0    
 88 #define MT6359_BUCK_VPU_DBG1                 0    
 89 #define MT6359_BUCK_VPU_ELR0                 0    
 90 #define MT6359_BUCK_VCORE_CON0               0    
 91 #define MT6359_BUCK_VCORE_DBG0               0    
 92 #define MT6359_BUCK_VCORE_DBG1               0    
 93 #define MT6359_BUCK_VCORE_SSHUB_CON0         0    
 94 #define MT6359_BUCK_VCORE_ELR0               0    
 95 #define MT6359_BUCK_VGPU11_CON0              0    
 96 #define MT6359_BUCK_VGPU11_DBG0              0    
 97 #define MT6359_BUCK_VGPU11_DBG1              0    
 98 #define MT6359_BUCK_VGPU11_ELR0              0    
 99 #define MT6359_BUCK_VMODEM_CON0              0    
100 #define MT6359_BUCK_VMODEM_DBG0              0    
101 #define MT6359_BUCK_VMODEM_DBG1              0    
102 #define MT6359_BUCK_VMODEM_ELR0              0    
103 #define MT6359_BUCK_VPROC1_CON0              0    
104 #define MT6359_BUCK_VPROC1_DBG0              0    
105 #define MT6359_BUCK_VPROC1_DBG1              0    
106 #define MT6359_BUCK_VPROC1_ELR0              0    
107 #define MT6359_BUCK_VPROC2_CON0              0    
108 #define MT6359_BUCK_VPROC2_DBG0              0    
109 #define MT6359_BUCK_VPROC2_DBG1              0    
110 #define MT6359_BUCK_VPROC2_ELR0              0    
111 #define MT6359_BUCK_VS1_CON0                 0    
112 #define MT6359_BUCK_VS1_DBG0                 0    
113 #define MT6359_BUCK_VS1_DBG1                 0    
114 #define MT6359_BUCK_VS1_ELR0                 0    
115 #define MT6359_BUCK_VS2_CON0                 0    
116 #define MT6359_BUCK_VS2_DBG0                 0    
117 #define MT6359_BUCK_VS2_DBG1                 0    
118 #define MT6359_BUCK_VS2_ELR0                 0    
119 #define MT6359_BUCK_VPA_CON0                 0    
120 #define MT6359_BUCK_VPA_CON1                 0    
121 #define MT6359_BUCK_VPA_CFG0                 0    
122 #define MT6359_BUCK_VPA_CFG1                 0    
123 #define MT6359_BUCK_VPA_DBG0                 0    
124 #define MT6359_BUCK_VPA_DBG1                 0    
125 #define MT6359_VGPUVCORE_ANA_CON2            0    
126 #define MT6359_VGPUVCORE_ANA_CON13           0    
127 #define MT6359_VPROC1_ANA_CON3               0    
128 #define MT6359_VPROC2_ANA_CON3               0    
129 #define MT6359_VMODEM_ANA_CON3               0    
130 #define MT6359_VPU_ANA_CON3                  0    
131 #define MT6359_VS1_ANA_CON0                  0    
132 #define MT6359_VS2_ANA_CON0                  0    
133 #define MT6359_VPA_ANA_CON0                  0    
134 #define MT6359_LDO_TOP_INT_CON0              0    
135 #define MT6359_LDO_TOP_INT_CON1              0    
136 #define MT6359_LDO_TOP_INT_STATUS0           0    
137 #define MT6359_LDO_TOP_INT_STATUS1           0    
138 #define MT6359_LDO_VSRAM_PROC1_ELR           0    
139 #define MT6359_LDO_VSRAM_PROC2_ELR           0    
140 #define MT6359_LDO_VSRAM_OTHERS_ELR          0    
141 #define MT6359_LDO_VSRAM_MD_ELR              0    
142 #define MT6359_LDO_VFE28_CON0                0    
143 #define MT6359_LDO_VFE28_MON                 0    
144 #define MT6359_LDO_VXO22_CON0                0    
145 #define MT6359_LDO_VXO22_MON                 0    
146 #define MT6359_LDO_VRF18_CON0                0    
147 #define MT6359_LDO_VRF18_MON                 0    
148 #define MT6359_LDO_VRF12_CON0                0    
149 #define MT6359_LDO_VRF12_MON                 0    
150 #define MT6359_LDO_VEFUSE_CON0               0    
151 #define MT6359_LDO_VEFUSE_MON                0    
152 #define MT6359_LDO_VCN33_1_CON0              0    
153 #define MT6359_LDO_VCN33_1_MON               0    
154 #define MT6359_LDO_VCN33_1_MULTI_SW          0    
155 #define MT6359_LDO_VCN33_2_CON0              0    
156 #define MT6359_LDO_VCN33_2_MON               0    
157 #define MT6359_LDO_VCN33_2_MULTI_SW          0    
158 #define MT6359_LDO_VCN13_CON0                0    
159 #define MT6359_LDO_VCN13_MON                 0    
160 #define MT6359_LDO_VCN18_CON0                0    
161 #define MT6359_LDO_VCN18_MON                 0    
162 #define MT6359_LDO_VA09_CON0                 0    
163 #define MT6359_LDO_VA09_MON                  0    
164 #define MT6359_LDO_VCAMIO_CON0               0    
165 #define MT6359_LDO_VCAMIO_MON                0    
166 #define MT6359_LDO_VA12_CON0                 0    
167 #define MT6359_LDO_VA12_MON                  0    
168 #define MT6359_LDO_VAUX18_CON0               0    
169 #define MT6359_LDO_VAUX18_MON                0    
170 #define MT6359_LDO_VAUD18_CON0               0    
171 #define MT6359_LDO_VAUD18_MON                0    
172 #define MT6359_LDO_VIO18_CON0                0    
173 #define MT6359_LDO_VIO18_MON                 0    
174 #define MT6359_LDO_VEMC_CON0                 0    
175 #define MT6359_LDO_VEMC_MON                  0    
176 #define MT6359_LDO_VSIM1_CON0                0    
177 #define MT6359_LDO_VSIM1_MON                 0    
178 #define MT6359_LDO_VSIM2_CON0                0    
179 #define MT6359_LDO_VSIM2_MON                 0    
180 #define MT6359_LDO_VUSB_CON0                 0    
181 #define MT6359_LDO_VUSB_MON                  0    
182 #define MT6359_LDO_VUSB_MULTI_SW             0    
183 #define MT6359_LDO_VRFCK_CON0                0    
184 #define MT6359_LDO_VRFCK_MON                 0    
185 #define MT6359_LDO_VBBCK_CON0                0    
186 #define MT6359_LDO_VBBCK_MON                 0    
187 #define MT6359_LDO_VBIF28_CON0               0    
188 #define MT6359_LDO_VBIF28_MON                0    
189 #define MT6359_LDO_VIBR_CON0                 0    
190 #define MT6359_LDO_VIBR_MON                  0    
191 #define MT6359_LDO_VIO28_CON0                0    
192 #define MT6359_LDO_VIO28_MON                 0    
193 #define MT6359_LDO_VM18_CON0                 0    
194 #define MT6359_LDO_VM18_MON                  0    
195 #define MT6359_LDO_VUFS_CON0                 0    
196 #define MT6359_LDO_VUFS_MON                  0    
197 #define MT6359_LDO_VSRAM_PROC1_CON0          0    
198 #define MT6359_LDO_VSRAM_PROC1_MON           0    
199 #define MT6359_LDO_VSRAM_PROC1_VOSEL1        0    
200 #define MT6359_LDO_VSRAM_PROC2_CON0          0    
201 #define MT6359_LDO_VSRAM_PROC2_MON           0    
202 #define MT6359_LDO_VSRAM_PROC2_VOSEL1        0    
203 #define MT6359_LDO_VSRAM_OTHERS_CON0         0    
204 #define MT6359_LDO_VSRAM_OTHERS_MON          0    
205 #define MT6359_LDO_VSRAM_OTHERS_VOSEL1       0    
206 #define MT6359_LDO_VSRAM_OTHERS_SSHUB        0    
207 #define MT6359_LDO_VSRAM_MD_CON0             0    
208 #define MT6359_LDO_VSRAM_MD_MON              0    
209 #define MT6359_LDO_VSRAM_MD_VOSEL1           0    
210 #define MT6359_VFE28_ANA_CON0                0    
211 #define MT6359_VAUX18_ANA_CON0               0    
212 #define MT6359_VUSB_ANA_CON0                 0    
213 #define MT6359_VBIF28_ANA_CON0               0    
214 #define MT6359_VCN33_1_ANA_CON0              0    
215 #define MT6359_VCN33_2_ANA_CON0              0    
216 #define MT6359_VEMC_ANA_CON0                 0    
217 #define MT6359_VSIM1_ANA_CON0                0    
218 #define MT6359_VSIM2_ANA_CON0                0    
219 #define MT6359_VIO28_ANA_CON0                0    
220 #define MT6359_VIBR_ANA_CON0                 0    
221 #define MT6359_VRF18_ANA_CON0                0    
222 #define MT6359_VEFUSE_ANA_CON0               0    
223 #define MT6359_VCN18_ANA_CON0                0    
224 #define MT6359_VCAMIO_ANA_CON0               0    
225 #define MT6359_VAUD18_ANA_CON0               0    
226 #define MT6359_VIO18_ANA_CON0                0    
227 #define MT6359_VM18_ANA_CON0                 0    
228 #define MT6359_VUFS_ANA_CON0                 0    
229 #define MT6359_VRF12_ANA_CON0                0    
230 #define MT6359_VCN13_ANA_CON0                0    
231 #define MT6359_VA09_ANA_CON0                 0    
232 #define MT6359_VA12_ANA_CON0                 0    
233 #define MT6359_VXO22_ANA_CON0                0    
234 #define MT6359_VRFCK_ANA_CON0                0    
235 #define MT6359_VBBCK_ANA_CON0                0    
236 #define MT6359_AUD_TOP_INT_CON0              0    
237 #define MT6359_AUD_TOP_INT_STATUS0           0    
238                                                   
239 #define MT6359_RG_BUCK_VPU_EN_ADDR                
240 #define MT6359_RG_BUCK_VPU_LP_ADDR                
241 #define MT6359_RG_BUCK_VPU_LP_SHIFT               
242 #define MT6359_DA_VPU_VOSEL_ADDR                  
243 #define MT6359_DA_VPU_VOSEL_MASK                  
244 #define MT6359_DA_VPU_VOSEL_SHIFT                 
245 #define MT6359_DA_VPU_EN_ADDR                     
246 #define MT6359_RG_BUCK_VPU_VOSEL_ADDR             
247 #define MT6359_RG_BUCK_VPU_VOSEL_MASK             
248 #define MT6359_RG_BUCK_VPU_VOSEL_SHIFT            
249 #define MT6359_RG_BUCK_VCORE_EN_ADDR              
250 #define MT6359_RG_BUCK_VCORE_LP_ADDR              
251 #define MT6359_RG_BUCK_VCORE_LP_SHIFT             
252 #define MT6359_DA_VCORE_VOSEL_ADDR                
253 #define MT6359_DA_VCORE_VOSEL_MASK                
254 #define MT6359_DA_VCORE_VOSEL_SHIFT               
255 #define MT6359_DA_VCORE_EN_ADDR                   
256 #define MT6359_RG_BUCK_VCORE_SSHUB_EN_ADDR        
257 #define MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_ADDR     
258 #define MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_MASK     
259 #define MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_SHIFT    
260 #define MT6359_RG_BUCK_VCORE_VOSEL_ADDR           
261 #define MT6359_RG_BUCK_VCORE_VOSEL_MASK           
262 #define MT6359_RG_BUCK_VCORE_VOSEL_SHIFT          
263 #define MT6359_RG_BUCK_VGPU11_EN_ADDR             
264 #define MT6359_RG_BUCK_VGPU11_LP_ADDR             
265 #define MT6359_RG_BUCK_VGPU11_LP_SHIFT            
266 #define MT6359_DA_VGPU11_VOSEL_ADDR               
267 #define MT6359_DA_VGPU11_VOSEL_MASK               
268 #define MT6359_DA_VGPU11_VOSEL_SHIFT              
269 #define MT6359_DA_VGPU11_EN_ADDR                  
270 #define MT6359_RG_BUCK_VGPU11_VOSEL_ADDR          
271 #define MT6359_RG_BUCK_VGPU11_VOSEL_MASK          
272 #define MT6359_RG_BUCK_VGPU11_VOSEL_SHIFT         
273 #define MT6359_RG_BUCK_VMODEM_EN_ADDR             
274 #define MT6359_RG_BUCK_VMODEM_LP_ADDR             
275 #define MT6359_RG_BUCK_VMODEM_LP_SHIFT            
276 #define MT6359_DA_VMODEM_VOSEL_ADDR               
277 #define MT6359_DA_VMODEM_VOSEL_MASK               
278 #define MT6359_DA_VMODEM_VOSEL_SHIFT              
279 #define MT6359_DA_VMODEM_EN_ADDR                  
280 #define MT6359_RG_BUCK_VMODEM_VOSEL_ADDR          
281 #define MT6359_RG_BUCK_VMODEM_VOSEL_MASK          
282 #define MT6359_RG_BUCK_VMODEM_VOSEL_SHIFT         
283 #define MT6359_RG_BUCK_VPROC1_EN_ADDR             
284 #define MT6359_RG_BUCK_VPROC1_LP_ADDR             
285 #define MT6359_RG_BUCK_VPROC1_LP_SHIFT            
286 #define MT6359_DA_VPROC1_VOSEL_ADDR               
287 #define MT6359_DA_VPROC1_VOSEL_MASK               
288 #define MT6359_DA_VPROC1_VOSEL_SHIFT              
289 #define MT6359_DA_VPROC1_EN_ADDR                  
290 #define MT6359_RG_BUCK_VPROC1_VOSEL_ADDR          
291 #define MT6359_RG_BUCK_VPROC1_VOSEL_MASK          
292 #define MT6359_RG_BUCK_VPROC1_VOSEL_SHIFT         
293 #define MT6359_RG_BUCK_VPROC2_EN_ADDR             
294 #define MT6359_RG_BUCK_VPROC2_LP_ADDR             
295 #define MT6359_RG_BUCK_VPROC2_LP_SHIFT            
296 #define MT6359_DA_VPROC2_VOSEL_ADDR               
297 #define MT6359_DA_VPROC2_VOSEL_MASK               
298 #define MT6359_DA_VPROC2_VOSEL_SHIFT              
299 #define MT6359_DA_VPROC2_EN_ADDR                  
300 #define MT6359_RG_BUCK_VPROC2_VOSEL_ADDR          
301 #define MT6359_RG_BUCK_VPROC2_VOSEL_MASK          
302 #define MT6359_RG_BUCK_VPROC2_VOSEL_SHIFT         
303 #define MT6359_RG_BUCK_VS1_EN_ADDR                
304 #define MT6359_RG_BUCK_VS1_LP_ADDR                
305 #define MT6359_RG_BUCK_VS1_LP_SHIFT               
306 #define MT6359_DA_VS1_VOSEL_ADDR                  
307 #define MT6359_DA_VS1_VOSEL_MASK                  
308 #define MT6359_DA_VS1_VOSEL_SHIFT                 
309 #define MT6359_DA_VS1_EN_ADDR                     
310 #define MT6359_RG_BUCK_VS1_VOSEL_ADDR             
311 #define MT6359_RG_BUCK_VS1_VOSEL_MASK             
312 #define MT6359_RG_BUCK_VS1_VOSEL_SHIFT            
313 #define MT6359_RG_BUCK_VS2_EN_ADDR                
314 #define MT6359_RG_BUCK_VS2_LP_ADDR                
315 #define MT6359_RG_BUCK_VS2_LP_SHIFT               
316 #define MT6359_DA_VS2_VOSEL_ADDR                  
317 #define MT6359_DA_VS2_VOSEL_MASK                  
318 #define MT6359_DA_VS2_VOSEL_SHIFT                 
319 #define MT6359_DA_VS2_EN_ADDR                     
320 #define MT6359_RG_BUCK_VS2_VOSEL_ADDR             
321 #define MT6359_RG_BUCK_VS2_VOSEL_MASK             
322 #define MT6359_RG_BUCK_VS2_VOSEL_SHIFT            
323 #define MT6359_RG_BUCK_VPA_EN_ADDR                
324 #define MT6359_RG_BUCK_VPA_LP_ADDR                
325 #define MT6359_RG_BUCK_VPA_LP_SHIFT               
326 #define MT6359_RG_BUCK_VPA_VOSEL_ADDR             
327 #define MT6359_RG_BUCK_VPA_VOSEL_MASK             
328 #define MT6359_RG_BUCK_VPA_VOSEL_SHIFT            
329 #define MT6359_DA_VPA_VOSEL_ADDR                  
330 #define MT6359_DA_VPA_VOSEL_MASK                  
331 #define MT6359_DA_VPA_VOSEL_SHIFT                 
332 #define MT6359_DA_VPA_EN_ADDR                     
333 #define MT6359_RG_VGPU11_FCCM_ADDR                
334 #define MT6359_RG_VGPU11_FCCM_SHIFT               
335 #define MT6359_RG_VCORE_FCCM_ADDR                 
336 #define MT6359_RG_VCORE_FCCM_SHIFT                
337 #define MT6359_RG_VPROC1_FCCM_ADDR                
338 #define MT6359_RG_VPROC1_FCCM_SHIFT               
339 #define MT6359_RG_VPROC2_FCCM_ADDR                
340 #define MT6359_RG_VPROC2_FCCM_SHIFT               
341 #define MT6359_RG_VMODEM_FCCM_ADDR                
342 #define MT6359_RG_VMODEM_FCCM_SHIFT               
343 #define MT6359_RG_VPU_FCCM_ADDR                   
344 #define MT6359_RG_VPU_FCCM_SHIFT                  
345 #define MT6359_RG_VS1_FPWM_ADDR                   
346 #define MT6359_RG_VS1_FPWM_SHIFT                  
347 #define MT6359_RG_VS2_FPWM_ADDR                   
348 #define MT6359_RG_VS2_FPWM_SHIFT                  
349 #define MT6359_RG_VPA_MODESET_ADDR                
350 #define MT6359_RG_VPA_MODESET_SHIFT               
351 #define MT6359_RG_LDO_VSRAM_PROC1_VOSEL_ADDR      
352 #define MT6359_RG_LDO_VSRAM_PROC1_VOSEL_MASK      
353 #define MT6359_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT     
354 #define MT6359_RG_LDO_VSRAM_PROC2_VOSEL_ADDR      
355 #define MT6359_RG_LDO_VSRAM_PROC2_VOSEL_MASK      
356 #define MT6359_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT     
357 #define MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR     
358 #define MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_MASK     
359 #define MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT    
360 #define MT6359_RG_LDO_VSRAM_MD_VOSEL_ADDR         
361 #define MT6359_RG_LDO_VSRAM_MD_VOSEL_MASK         
362 #define MT6359_RG_LDO_VSRAM_MD_VOSEL_SHIFT        
363 #define MT6359_RG_LDO_VFE28_EN_ADDR               
364 #define MT6359_DA_VFE28_B_EN_ADDR                 
365 #define MT6359_RG_LDO_VXO22_EN_ADDR               
366 #define MT6359_RG_LDO_VXO22_EN_SHIFT              
367 #define MT6359_DA_VXO22_B_EN_ADDR                 
368 #define MT6359_RG_LDO_VRF18_EN_ADDR               
369 #define MT6359_RG_LDO_VRF18_EN_SHIFT              
370 #define MT6359_DA_VRF18_B_EN_ADDR                 
371 #define MT6359_RG_LDO_VRF12_EN_ADDR               
372 #define MT6359_RG_LDO_VRF12_EN_SHIFT              
373 #define MT6359_DA_VRF12_B_EN_ADDR                 
374 #define MT6359_RG_LDO_VEFUSE_EN_ADDR              
375 #define MT6359_RG_LDO_VEFUSE_EN_SHIFT             
376 #define MT6359_DA_VEFUSE_B_EN_ADDR                
377 #define MT6359_RG_LDO_VCN33_1_EN_0_ADDR           
378 #define MT6359_RG_LDO_VCN33_1_EN_0_MASK           
379 #define MT6359_RG_LDO_VCN33_1_EN_0_SHIFT          
380 #define MT6359_DA_VCN33_1_B_EN_ADDR               
381 #define MT6359_RG_LDO_VCN33_1_EN_1_ADDR           
382 #define MT6359_RG_LDO_VCN33_1_EN_1_SHIFT          
383 #define MT6359_RG_LDO_VCN33_2_EN_0_ADDR           
384 #define MT6359_RG_LDO_VCN33_2_EN_0_SHIFT          
385 #define MT6359_DA_VCN33_2_B_EN_ADDR               
386 #define MT6359_RG_LDO_VCN33_2_EN_1_ADDR           
387 #define MT6359_RG_LDO_VCN33_2_EN_1_MASK           
388 #define MT6359_RG_LDO_VCN33_2_EN_1_SHIFT          
389 #define MT6359_RG_LDO_VCN13_EN_ADDR               
390 #define MT6359_RG_LDO_VCN13_EN_SHIFT              
391 #define MT6359_DA_VCN13_B_EN_ADDR                 
392 #define MT6359_RG_LDO_VCN18_EN_ADDR               
393 #define MT6359_DA_VCN18_B_EN_ADDR                 
394 #define MT6359_RG_LDO_VA09_EN_ADDR                
395 #define MT6359_RG_LDO_VA09_EN_SHIFT               
396 #define MT6359_DA_VA09_B_EN_ADDR                  
397 #define MT6359_RG_LDO_VCAMIO_EN_ADDR              
398 #define MT6359_RG_LDO_VCAMIO_EN_SHIFT             
399 #define MT6359_DA_VCAMIO_B_EN_ADDR                
400 #define MT6359_RG_LDO_VA12_EN_ADDR                
401 #define MT6359_RG_LDO_VA12_EN_SHIFT               
402 #define MT6359_DA_VA12_B_EN_ADDR                  
403 #define MT6359_RG_LDO_VAUX18_EN_ADDR              
404 #define MT6359_DA_VAUX18_B_EN_ADDR                
405 #define MT6359_RG_LDO_VAUD18_EN_ADDR              
406 #define MT6359_DA_VAUD18_B_EN_ADDR                
407 #define MT6359_RG_LDO_VIO18_EN_ADDR               
408 #define MT6359_RG_LDO_VIO18_EN_SHIFT              
409 #define MT6359_DA_VIO18_B_EN_ADDR                 
410 #define MT6359_RG_LDO_VEMC_EN_ADDR                
411 #define MT6359_RG_LDO_VEMC_EN_SHIFT               
412 #define MT6359_DA_VEMC_B_EN_ADDR                  
413 #define MT6359_RG_LDO_VSIM1_EN_ADDR               
414 #define MT6359_RG_LDO_VSIM1_EN_SHIFT              
415 #define MT6359_DA_VSIM1_B_EN_ADDR                 
416 #define MT6359_RG_LDO_VSIM2_EN_ADDR               
417 #define MT6359_RG_LDO_VSIM2_EN_SHIFT              
418 #define MT6359_DA_VSIM2_B_EN_ADDR                 
419 #define MT6359_RG_LDO_VUSB_EN_0_ADDR              
420 #define MT6359_RG_LDO_VUSB_EN_0_MASK              
421 #define MT6359_RG_LDO_VUSB_EN_0_SHIFT             
422 #define MT6359_DA_VUSB_B_EN_ADDR                  
423 #define MT6359_RG_LDO_VUSB_EN_1_ADDR              
424 #define MT6359_RG_LDO_VUSB_EN_1_MASK              
425 #define MT6359_RG_LDO_VUSB_EN_1_SHIFT             
426 #define MT6359_RG_LDO_VRFCK_EN_ADDR               
427 #define MT6359_RG_LDO_VRFCK_EN_SHIFT              
428 #define MT6359_DA_VRFCK_B_EN_ADDR                 
429 #define MT6359_RG_LDO_VBBCK_EN_ADDR               
430 #define MT6359_RG_LDO_VBBCK_EN_SHIFT              
431 #define MT6359_DA_VBBCK_B_EN_ADDR                 
432 #define MT6359_RG_LDO_VBIF28_EN_ADDR              
433 #define MT6359_DA_VBIF28_B_EN_ADDR                
434 #define MT6359_RG_LDO_VIBR_EN_ADDR                
435 #define MT6359_RG_LDO_VIBR_EN_SHIFT               
436 #define MT6359_DA_VIBR_B_EN_ADDR                  
437 #define MT6359_RG_LDO_VIO28_EN_ADDR               
438 #define MT6359_RG_LDO_VIO28_EN_SHIFT              
439 #define MT6359_DA_VIO28_B_EN_ADDR                 
440 #define MT6359_RG_LDO_VM18_EN_ADDR                
441 #define MT6359_RG_LDO_VM18_EN_SHIFT               
442 #define MT6359_DA_VM18_B_EN_ADDR                  
443 #define MT6359_RG_LDO_VUFS_EN_ADDR                
444 #define MT6359_RG_LDO_VUFS_EN_SHIFT               
445 #define MT6359_DA_VUFS_B_EN_ADDR                  
446 #define MT6359_RG_LDO_VSRAM_PROC1_EN_ADDR         
447 #define MT6359_DA_VSRAM_PROC1_B_EN_ADDR           
448 #define MT6359_DA_VSRAM_PROC1_VOSEL_ADDR          
449 #define MT6359_DA_VSRAM_PROC1_VOSEL_MASK          
450 #define MT6359_DA_VSRAM_PROC1_VOSEL_SHIFT         
451 #define MT6359_RG_LDO_VSRAM_PROC2_EN_ADDR         
452 #define MT6359_DA_VSRAM_PROC2_B_EN_ADDR           
453 #define MT6359_DA_VSRAM_PROC2_VOSEL_ADDR          
454 #define MT6359_DA_VSRAM_PROC2_VOSEL_MASK          
455 #define MT6359_DA_VSRAM_PROC2_VOSEL_SHIFT         
456 #define MT6359_RG_LDO_VSRAM_OTHERS_EN_ADDR        
457 #define MT6359_DA_VSRAM_OTHERS_B_EN_ADDR          
458 #define MT6359_DA_VSRAM_OTHERS_VOSEL_ADDR         
459 #define MT6359_DA_VSRAM_OTHERS_VOSEL_MASK         
460 #define MT6359_DA_VSRAM_OTHERS_VOSEL_SHIFT        
461 #define MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_EN_AD    
462 #define MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL    
463 #define MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL    
464 #define MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL    
465 #define MT6359_RG_LDO_VSRAM_MD_EN_ADDR            
466 #define MT6359_DA_VSRAM_MD_B_EN_ADDR              
467 #define MT6359_DA_VSRAM_MD_VOSEL_ADDR             
468 #define MT6359_DA_VSRAM_MD_VOSEL_MASK             
469 #define MT6359_DA_VSRAM_MD_VOSEL_SHIFT            
470 #define MT6359_RG_VCN33_1_VOSEL_ADDR              
471 #define MT6359_RG_VCN33_1_VOSEL_MASK              
472 #define MT6359_RG_VCN33_1_VOSEL_SHIFT             
473 #define MT6359_RG_VCN33_2_VOSEL_ADDR              
474 #define MT6359_RG_VCN33_2_VOSEL_MASK              
475 #define MT6359_RG_VCN33_2_VOSEL_SHIFT             
476 #define MT6359_RG_VEMC_VOSEL_ADDR                 
477 #define MT6359_RG_VEMC_VOSEL_MASK                 
478 #define MT6359_RG_VEMC_VOSEL_SHIFT                
479 #define MT6359_RG_VSIM1_VOSEL_ADDR                
480 #define MT6359_RG_VSIM1_VOSEL_MASK                
481 #define MT6359_RG_VSIM1_VOSEL_SHIFT               
482 #define MT6359_RG_VSIM2_VOSEL_ADDR                
483 #define MT6359_RG_VSIM2_VOSEL_MASK                
484 #define MT6359_RG_VSIM2_VOSEL_SHIFT               
485 #define MT6359_RG_VIO28_VOSEL_ADDR                
486 #define MT6359_RG_VIO28_VOSEL_MASK                
487 #define MT6359_RG_VIO28_VOSEL_SHIFT               
488 #define MT6359_RG_VIBR_VOSEL_ADDR                 
489 #define MT6359_RG_VIBR_VOSEL_MASK                 
490 #define MT6359_RG_VIBR_VOSEL_SHIFT                
491 #define MT6359_RG_VRF18_VOSEL_ADDR                
492 #define MT6359_RG_VRF18_VOSEL_MASK                
493 #define MT6359_RG_VRF18_VOSEL_SHIFT               
494 #define MT6359_RG_VEFUSE_VOSEL_ADDR               
495 #define MT6359_RG_VEFUSE_VOSEL_MASK               
496 #define MT6359_RG_VEFUSE_VOSEL_SHIFT              
497 #define MT6359_RG_VCAMIO_VOSEL_ADDR               
498 #define MT6359_RG_VCAMIO_VOSEL_MASK               
499 #define MT6359_RG_VCAMIO_VOSEL_SHIFT              
500 #define MT6359_RG_VIO18_VOSEL_ADDR                
501 #define MT6359_RG_VIO18_VOSEL_MASK                
502 #define MT6359_RG_VIO18_VOSEL_SHIFT               
503 #define MT6359_RG_VM18_VOSEL_ADDR                 
504 #define MT6359_RG_VM18_VOSEL_MASK                 
505 #define MT6359_RG_VM18_VOSEL_SHIFT                
506 #define MT6359_RG_VUFS_VOSEL_ADDR                 
507 #define MT6359_RG_VUFS_VOSEL_MASK                 
508 #define MT6359_RG_VUFS_VOSEL_SHIFT                
509 #define MT6359_RG_VRF12_VOSEL_ADDR                
510 #define MT6359_RG_VRF12_VOSEL_MASK                
511 #define MT6359_RG_VRF12_VOSEL_SHIFT               
512 #define MT6359_RG_VCN13_VOSEL_ADDR                
513 #define MT6359_RG_VCN13_VOSEL_MASK                
514 #define MT6359_RG_VCN13_VOSEL_SHIFT               
515 #define MT6359_RG_VA09_VOSEL_ADDR                 
516 #define MT6359_RG_VA09_VOSEL_MASK                 
517 #define MT6359_RG_VA09_VOSEL_SHIFT                
518 #define MT6359_RG_VA12_VOSEL_ADDR                 
519 #define MT6359_RG_VA12_VOSEL_MASK                 
520 #define MT6359_RG_VA12_VOSEL_SHIFT                
521 #define MT6359_RG_VXO22_VOSEL_ADDR                
522 #define MT6359_RG_VXO22_VOSEL_MASK                
523 #define MT6359_RG_VXO22_VOSEL_SHIFT               
524 #define MT6359_RG_VRFCK_VOSEL_ADDR                
525 #define MT6359_RG_VRFCK_VOSEL_MASK                
526 #define MT6359_RG_VRFCK_VOSEL_SHIFT               
527 #define MT6359_RG_VBBCK_VOSEL_ADDR                
528 #define MT6359_RG_VBBCK_VOSEL_MASK                
529 #define MT6359_RG_VBBCK_VOSEL_SHIFT               
530                                                   
531 #endif /* __MFD_MT6359_REGISTERS_H__ */           
532                                                   

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