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TOMOYO Linux Cross Reference
Linux/include/linux/mfd/rt5033-private.h

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

Differences between /include/linux/mfd/rt5033-private.h (Version linux-6.12-rc7) and /include/linux/mfd/rt5033-private.h (Version linux-5.16.20)


  1 /* SPDX-License-Identifier: GPL-2.0-only */         1 /* SPDX-License-Identifier: GPL-2.0-only */
  2 /*                                                  2 /*
  3  * MFD core driver for Richtek RT5033               3  * MFD core driver for Richtek RT5033
  4  *                                                  4  *
  5  * Copyright (C) 2014 Samsung Electronics, Co.      5  * Copyright (C) 2014 Samsung Electronics, Co., Ltd.
  6  * Author: Beomho Seo <beomho.seo@samsung.com>      6  * Author: Beomho Seo <beomho.seo@samsung.com>
  7  */                                                 7  */
  8                                                     8 
  9 #ifndef __RT5033_PRIVATE_H__                        9 #ifndef __RT5033_PRIVATE_H__
 10 #define __RT5033_PRIVATE_H__                       10 #define __RT5033_PRIVATE_H__
 11                                                    11 
 12 enum rt5033_reg {                                  12 enum rt5033_reg {
 13         RT5033_REG_CHG_STAT             = 0x00     13         RT5033_REG_CHG_STAT             = 0x00,
 14         RT5033_REG_CHG_CTRL1            = 0x01     14         RT5033_REG_CHG_CTRL1            = 0x01,
 15         RT5033_REG_CHG_CTRL2            = 0x02     15         RT5033_REG_CHG_CTRL2            = 0x02,
 16         RT5033_REG_DEVICE_ID            = 0x03     16         RT5033_REG_DEVICE_ID            = 0x03,
 17         RT5033_REG_CHG_CTRL3            = 0x04     17         RT5033_REG_CHG_CTRL3            = 0x04,
 18         RT5033_REG_CHG_CTRL4            = 0x05     18         RT5033_REG_CHG_CTRL4            = 0x05,
 19         RT5033_REG_CHG_CTRL5            = 0x06     19         RT5033_REG_CHG_CTRL5            = 0x06,
 20         RT5033_REG_RT_CTRL0             = 0x07     20         RT5033_REG_RT_CTRL0             = 0x07,
 21         RT5033_REG_CHG_RESET            = 0x08     21         RT5033_REG_CHG_RESET            = 0x08,
 22         /* Reserved 0x09~0x18 */                   22         /* Reserved 0x09~0x18 */
 23         RT5033_REG_RT_CTRL1             = 0x19     23         RT5033_REG_RT_CTRL1             = 0x19,
 24         /* Reserved 0x1A~0x20 */                   24         /* Reserved 0x1A~0x20 */
 25         RT5033_REG_FLED_FUNCTION1       = 0x21     25         RT5033_REG_FLED_FUNCTION1       = 0x21,
 26         RT5033_REG_FLED_FUNCTION2       = 0x22     26         RT5033_REG_FLED_FUNCTION2       = 0x22,
 27         RT5033_REG_FLED_STROBE_CTRL1    = 0x23     27         RT5033_REG_FLED_STROBE_CTRL1    = 0x23,
 28         RT5033_REG_FLED_STROBE_CTRL2    = 0x24     28         RT5033_REG_FLED_STROBE_CTRL2    = 0x24,
 29         RT5033_REG_FLED_CTRL1           = 0x25     29         RT5033_REG_FLED_CTRL1           = 0x25,
 30         RT5033_REG_FLED_CTRL2           = 0x26     30         RT5033_REG_FLED_CTRL2           = 0x26,
 31         RT5033_REG_FLED_CTRL3           = 0x27     31         RT5033_REG_FLED_CTRL3           = 0x27,
 32         RT5033_REG_FLED_CTRL4           = 0x28     32         RT5033_REG_FLED_CTRL4           = 0x28,
 33         RT5033_REG_FLED_CTRL5           = 0x29     33         RT5033_REG_FLED_CTRL5           = 0x29,
 34         /* Reserved 0x2A~0x40 */                   34         /* Reserved 0x2A~0x40 */
 35         RT5033_REG_CTRL                 = 0x41     35         RT5033_REG_CTRL                 = 0x41,
 36         RT5033_REG_BUCK_CTRL            = 0x42     36         RT5033_REG_BUCK_CTRL            = 0x42,
 37         RT5033_REG_LDO_CTRL             = 0x43     37         RT5033_REG_LDO_CTRL             = 0x43,
 38         /* Reserved 0x44~0x46 */                   38         /* Reserved 0x44~0x46 */
 39         RT5033_REG_MANUAL_RESET_CTRL    = 0x47     39         RT5033_REG_MANUAL_RESET_CTRL    = 0x47,
 40         /* Reserved 0x48~0x5F */                   40         /* Reserved 0x48~0x5F */
 41         RT5033_REG_CHG_IRQ1             = 0x60     41         RT5033_REG_CHG_IRQ1             = 0x60,
 42         RT5033_REG_CHG_IRQ2             = 0x61     42         RT5033_REG_CHG_IRQ2             = 0x61,
 43         RT5033_REG_CHG_IRQ3             = 0x62     43         RT5033_REG_CHG_IRQ3             = 0x62,
 44         RT5033_REG_CHG_IRQ1_CTRL        = 0x63     44         RT5033_REG_CHG_IRQ1_CTRL        = 0x63,
 45         RT5033_REG_CHG_IRQ2_CTRL        = 0x64     45         RT5033_REG_CHG_IRQ2_CTRL        = 0x64,
 46         RT5033_REG_CHG_IRQ3_CTRL        = 0x65     46         RT5033_REG_CHG_IRQ3_CTRL        = 0x65,
 47         RT5033_REG_LED_IRQ_STAT         = 0x66     47         RT5033_REG_LED_IRQ_STAT         = 0x66,
 48         RT5033_REG_LED_IRQ_CTRL         = 0x67     48         RT5033_REG_LED_IRQ_CTRL         = 0x67,
 49         RT5033_REG_PMIC_IRQ_STAT        = 0x68     49         RT5033_REG_PMIC_IRQ_STAT        = 0x68,
 50         RT5033_REG_PMIC_IRQ_CTRL        = 0x69     50         RT5033_REG_PMIC_IRQ_CTRL        = 0x69,
 51         RT5033_REG_SHDN_CTRL            = 0x6A     51         RT5033_REG_SHDN_CTRL            = 0x6A,
 52         RT5033_REG_OFF_EVENT            = 0x6B     52         RT5033_REG_OFF_EVENT            = 0x6B,
 53                                                    53 
 54         RT5033_REG_END,                            54         RT5033_REG_END,
 55 };                                                 55 };
 56                                                    56 
 57 /* RT5033 Charger state register */                57 /* RT5033 Charger state register */
 58 #define RT5033_CHG_STAT_TYPE_MASK       0x60   !!  58 #define RT5033_CHG_STAT_MASK            0x20
 59 #define RT5033_CHG_STAT_TYPE_PRE        0x20   << 
 60 #define RT5033_CHG_STAT_TYPE_FAST       0x60   << 
 61 #define RT5033_CHG_STAT_MASK            0x30   << 
 62 #define RT5033_CHG_STAT_DISCHARGING     0x00       59 #define RT5033_CHG_STAT_DISCHARGING     0x00
 63 #define RT5033_CHG_STAT_FULL            0x10       60 #define RT5033_CHG_STAT_FULL            0x10
 64 #define RT5033_CHG_STAT_CHARGING        0x20       61 #define RT5033_CHG_STAT_CHARGING        0x20
 65 #define RT5033_CHG_STAT_NOT_CHARGING    0x30       62 #define RT5033_CHG_STAT_NOT_CHARGING    0x30
                                                   >>  63 #define RT5033_CHG_STAT_TYPE_MASK       0x60
                                                   >>  64 #define RT5033_CHG_STAT_TYPE_PRE        0x20
                                                   >>  65 #define RT5033_CHG_STAT_TYPE_FAST       0x60
 66                                                    66 
 67 /* RT5033 CHGCTRL1 register */                     67 /* RT5033 CHGCTRL1 register */
 68 #define RT5033_CHGCTRL1_IAICR_MASK      0xe0       68 #define RT5033_CHGCTRL1_IAICR_MASK      0xe0
 69 #define RT5033_CHGCTRL1_TE_EN_MASK      0x08   << 
 70 #define RT5033_CHGCTRL1_HZ_MASK         0x02   << 
 71 #define RT5033_CHGCTRL1_MODE_MASK       0x01       69 #define RT5033_CHGCTRL1_MODE_MASK       0x01
 72                                                    70 
 73 /* RT5033 CHGCTRL2 register */                     71 /* RT5033 CHGCTRL2 register */
 74 #define RT5033_CHGCTRL2_CV_MASK         0xfc       72 #define RT5033_CHGCTRL2_CV_MASK         0xfc
 75 #define RT5033_CHGCTRL2_CV_SHIFT        0x02   << 
 76                                                << 
 77 /* RT5033 DEVICE_ID register */                << 
 78 #define RT5033_VENDOR_ID_MASK           0xf0   << 
 79 #define RT5033_CHIP_REV_MASK            0x0f   << 
 80                                                    73 
 81 /* RT5033 CHGCTRL3 register */                     74 /* RT5033 CHGCTRL3 register */
 82 #define RT5033_CHGCTRL3_CFO_EN_MASK     0x40       75 #define RT5033_CHGCTRL3_CFO_EN_MASK     0x40
 83 #define RT5033_CHGCTRL3_TIMER_MASK      0x38       76 #define RT5033_CHGCTRL3_TIMER_MASK      0x38
 84 #define RT5033_CHGCTRL3_TIMER_EN_MASK   0x01       77 #define RT5033_CHGCTRL3_TIMER_EN_MASK   0x01
 85                                                    78 
 86 /* RT5033 CHGCTRL4 register */                     79 /* RT5033 CHGCTRL4 register */
 87 #define RT5033_CHGCTRL4_MIVR_MASK       0xe0   << 
 88 #define RT5033_CHGCTRL4_IPREC_MASK      0x18   << 
 89 #define RT5033_CHGCTRL4_IPREC_SHIFT     0x03   << 
 90 #define RT5033_CHGCTRL4_EOC_MASK        0x07       80 #define RT5033_CHGCTRL4_EOC_MASK        0x07
                                                   >>  81 #define RT5033_CHGCTRL4_IPREC_MASK      0x18
 91                                                    82 
 92 /* RT5033 CHGCTRL5 register */                     83 /* RT5033 CHGCTRL5 register */
                                                   >>  84 #define RT5033_CHGCTRL5_VPREC_MASK      0x0f
 93 #define RT5033_CHGCTRL5_ICHG_MASK       0xf0       85 #define RT5033_CHGCTRL5_ICHG_MASK       0xf0
 94 #define RT5033_CHGCTRL5_ICHG_SHIFT      0x04       86 #define RT5033_CHGCTRL5_ICHG_SHIFT      0x04
 95 #define RT5033_CHGCTRL5_VPREC_MASK      0x0f   !!  87 #define RT5033_CHG_MAX_CURRENT          0x0d
 96                                                    88 
 97 /* RT5033 RT CTRL1 register */                     89 /* RT5033 RT CTRL1 register */
 98 #define RT5033_RT_CTRL1_UUG_MASK        0x02       90 #define RT5033_RT_CTRL1_UUG_MASK        0x02
                                                   >>  91 #define RT5033_RT_HZ_MASK               0x01
 99                                                    92 
100 /* RT5033 control register */                      93 /* RT5033 control register */
101 #define RT5033_CTRL_FCCM_BUCK_MASK                 94 #define RT5033_CTRL_FCCM_BUCK_MASK              BIT(0)
102 #define RT5033_CTRL_BUCKOMS_MASK                   95 #define RT5033_CTRL_BUCKOMS_MASK                BIT(1)
103 #define RT5033_CTRL_LDOOMS_MASK                    96 #define RT5033_CTRL_LDOOMS_MASK                 BIT(2)
104 #define RT5033_CTRL_SLDOOMS_MASK                   97 #define RT5033_CTRL_SLDOOMS_MASK                BIT(3)
105 #define RT5033_CTRL_EN_BUCK_MASK                   98 #define RT5033_CTRL_EN_BUCK_MASK                BIT(4)
106 #define RT5033_CTRL_EN_LDO_MASK                    99 #define RT5033_CTRL_EN_LDO_MASK                 BIT(5)
107 #define RT5033_CTRL_EN_SAFE_LDO_MASK              100 #define RT5033_CTRL_EN_SAFE_LDO_MASK            BIT(6)
108 #define RT5033_CTRL_LDO_SLEEP_MASK                101 #define RT5033_CTRL_LDO_SLEEP_MASK              BIT(7)
109                                                   102 
110 /* RT5033 BUCK control register */                103 /* RT5033 BUCK control register */
111 #define RT5033_BUCK_CTRL_MASK                     104 #define RT5033_BUCK_CTRL_MASK                   0x1f
112                                                   105 
113 /* RT5033 LDO control register */                 106 /* RT5033 LDO control register */
114 #define RT5033_LDO_CTRL_MASK                      107 #define RT5033_LDO_CTRL_MASK                    0x1f
115                                                   108 
116 /* RT5033 charger property - model, manufactur    109 /* RT5033 charger property - model, manufacturer */
                                                   >> 110 
117 #define RT5033_CHARGER_MODEL    "RT5033WSC Cha    111 #define RT5033_CHARGER_MODEL    "RT5033WSC Charger"
118 #define RT5033_MANUFACTURER     "Richtek Techn    112 #define RT5033_MANUFACTURER     "Richtek Technology Corporation"
119                                                   113 
120 /*                                                114 /*
121  * While RT5033 charger can limit the fast-cha !! 115  * RT5033 charger fast-charge current lmits (as in CHGCTRL1 register),
122  * register), AICR mode limits the input curre !! 116  * AICR mode limits the input current for example,
123  * mode limits the input current to 100 mA.    !! 117  * the AIRC 100 mode limits the input current to 100 mA.
124  */                                               118  */
125 #define RT5033_AICR_DISABLE                    << 
126 #define RT5033_AICR_100_MODE                      119 #define RT5033_AICR_100_MODE                    0x20
127 #define RT5033_AICR_500_MODE                      120 #define RT5033_AICR_500_MODE                    0x40
128 #define RT5033_AICR_700_MODE                      121 #define RT5033_AICR_700_MODE                    0x60
129 #define RT5033_AICR_900_MODE                      122 #define RT5033_AICR_900_MODE                    0x80
130 #define RT5033_AICR_1000_MODE                  << 
131 #define RT5033_AICR_1500_MODE                     123 #define RT5033_AICR_1500_MODE                   0xc0
132 #define RT5033_AICR_2000_MODE                     124 #define RT5033_AICR_2000_MODE                   0xe0
133                                                !! 125 #define RT5033_AICR_MODE_MASK                   0xe0
134 /* RT5033 charger minimum input voltage regula << 
135 #define RT5033_CHARGER_MIVR_DISABLE            << 
136 #define RT5033_CHARGER_MIVR_4200MV             << 
137 #define RT5033_CHARGER_MIVR_4300MV             << 
138 #define RT5033_CHARGER_MIVR_4400MV             << 
139 #define RT5033_CHARGER_MIVR_4500MV             << 
140 #define RT5033_CHARGER_MIVR_4600MV             << 
141 #define RT5033_CHARGER_MIVR_4700MV             << 
142 #define RT5033_CHARGER_MIVR_4800MV             << 
143                                                   126 
144 /* RT5033 use internal timer need to set time     127 /* RT5033 use internal timer need to set time */
145 #define RT5033_FAST_CHARGE_TIMER4              !! 128 #define RT5033_FAST_CHARGE_TIMER4               0x00
146 #define RT5033_FAST_CHARGE_TIMER6              !! 129 #define RT5033_FAST_CHARGE_TIMER6               0x01
147 #define RT5033_FAST_CHARGE_TIMER8              !! 130 #define RT5033_FAST_CHARGE_TIMER8               0x02
148 #define RT5033_FAST_CHARGE_TIMER10             !! 131 #define RT5033_FAST_CHARGE_TIMER9               0x03
149 #define RT5033_FAST_CHARGE_TIMER12             !! 132 #define RT5033_FAST_CHARGE_TIMER12              0x04
150 #define RT5033_FAST_CHARGE_TIMER14             !! 133 #define RT5033_FAST_CHARGE_TIMER14              0x05
151 #define RT5033_FAST_CHARGE_TIMER16             !! 134 #define RT5033_FAST_CHARGE_TIMER16              0x06
152                                                   135 
153 #define RT5033_INT_TIMER_DISABLE               << 
154 #define RT5033_INT_TIMER_ENABLE                   136 #define RT5033_INT_TIMER_ENABLE                 0x01
155                                                   137 
                                                   >> 138 /* RT5033 charger termination enable mask */
                                                   >> 139 #define RT5033_TE_ENABLE_MASK                   0x08
                                                   >> 140 
156 /*                                                141 /*
157  * RT5033 charger opa mode. RT5033 has two opa !! 142  * RT5033 charger opa mode. RT50300 have two opa mode charger mode
158  * and boost mode.                             !! 143  * and boost mode for OTG
159  */                                               144  */
                                                   >> 145 
160 #define RT5033_CHARGER_MODE                       146 #define RT5033_CHARGER_MODE                     0x00
161 #define RT5033_BOOST_MODE                         147 #define RT5033_BOOST_MODE                       0x01
162                                                   148 
163 /* RT5033 charger termination enable */           149 /* RT5033 charger termination enable */
164 #define RT5033_TE_DISABLE                      << 
165 #define RT5033_TE_ENABLE                          150 #define RT5033_TE_ENABLE                        0x08
166                                                   151 
167 /* RT5033 charger CFO enable */                   152 /* RT5033 charger CFO enable */
168 #define RT5033_CFO_DISABLE                     << 
169 #define RT5033_CFO_ENABLE                         153 #define RT5033_CFO_ENABLE                       0x40
170                                                   154 
171 /* RT5033 charger constant charge voltage (as     155 /* RT5033 charger constant charge voltage (as in CHGCTRL2 register), uV */
172 #define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN    156 #define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN  3650000U
173 #define RT5033_CHARGER_CONST_VOLTAGE_STEP_NUM     157 #define RT5033_CHARGER_CONST_VOLTAGE_STEP_NUM   25000U
174 #define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MAX    158 #define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MAX  4400000U
175 #define RT5033_CV_MAX_VOLTAGE                  << 
176                                                   159 
177 /* RT5033 charger pre-charge current limits (a    160 /* RT5033 charger pre-charge current limits (as in CHGCTRL4 register), uA */
178 #define RT5033_CHARGER_PRE_CURRENT_LIMIT_MIN      161 #define RT5033_CHARGER_PRE_CURRENT_LIMIT_MIN    350000U
179 #define RT5033_CHARGER_PRE_CURRENT_STEP_NUM       162 #define RT5033_CHARGER_PRE_CURRENT_STEP_NUM     100000U
180 #define RT5033_CHARGER_PRE_CURRENT_LIMIT_MAX      163 #define RT5033_CHARGER_PRE_CURRENT_LIMIT_MAX    650000U
181 #define RT5033_CHG_MAX_PRE_CURRENT             << 
182                                                   164 
183 /* RT5033 charger fast-charge current (as in C    165 /* RT5033 charger fast-charge current (as in CHGCTRL5 register), uA */
184 #define RT5033_CHARGER_FAST_CURRENT_MIN           166 #define RT5033_CHARGER_FAST_CURRENT_MIN         700000U
185 #define RT5033_CHARGER_FAST_CURRENT_STEP_NUM      167 #define RT5033_CHARGER_FAST_CURRENT_STEP_NUM    100000U
186 #define RT5033_CHARGER_FAST_CURRENT_MAX           168 #define RT5033_CHARGER_FAST_CURRENT_MAX         2000000U
187 #define RT5033_CHG_MAX_CURRENT                 << 
188                                                   169 
189 /*                                                170 /*
190  * RT5033 charger const-charge end of charger     171  * RT5033 charger const-charge end of charger current (
191  * as in CHGCTRL4 register), uA                   172  * as in CHGCTRL4 register), uA
192  */                                               173  */
193 #define RT5033_CHARGER_EOC_MIN                    174 #define RT5033_CHARGER_EOC_MIN                  150000U
194 #define RT5033_CHARGER_EOC_REF                    175 #define RT5033_CHARGER_EOC_REF                  300000U
195 #define RT5033_CHARGER_EOC_STEP_NUM1              176 #define RT5033_CHARGER_EOC_STEP_NUM1            50000U
196 #define RT5033_CHARGER_EOC_STEP_NUM2              177 #define RT5033_CHARGER_EOC_STEP_NUM2            100000U
197 #define RT5033_CHARGER_EOC_MAX                    178 #define RT5033_CHARGER_EOC_MAX                  600000U
198                                                   179 
199 /*                                                180 /*
200  * RT5033 charger pre-charge threshold volt li    181  * RT5033 charger pre-charge threshold volt limits
201  * (as in CHGCTRL5 register), uV                  182  * (as in CHGCTRL5 register), uV
202  */                                               183  */
                                                   >> 184 
203 #define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MIN    185 #define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MIN  2300000U
204 #define RT5033_CHARGER_PRE_THRESHOLD_STEP_NUM     186 #define RT5033_CHARGER_PRE_THRESHOLD_STEP_NUM   100000U
205 #define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MAX    187 #define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MAX  3800000U
206                                                   188 
207 /*                                                189 /*
208  * RT5033 charger UUG. It enables MOS auto con !! 190  * RT5033 charger enable UUG, If UUG enable MOS auto control by H/W charger
209  * circuit.                                       191  * circuit.
210  */                                               192  */
211 #define RT5033_CHARGER_UUG_DISABLE             << 
212 #define RT5033_CHARGER_UUG_ENABLE                 193 #define RT5033_CHARGER_UUG_ENABLE               0x02
213                                                   194 
214 /* RT5033 charger high impedance mode */       !! 195 /* RT5033 charger High impedance mode */
215 #define RT5033_CHARGER_HZ_DISABLE                 196 #define RT5033_CHARGER_HZ_DISABLE               0x00
216 #define RT5033_CHARGER_HZ_ENABLE               !! 197 #define RT5033_CHARGER_HZ_ENABLE                0x01
217                                                   198 
218 /* RT5033 regulator BUCK output voltage uV */     199 /* RT5033 regulator BUCK output voltage uV */
219 #define RT5033_REGULATOR_BUCK_VOLTAGE_MIN         200 #define RT5033_REGULATOR_BUCK_VOLTAGE_MIN               1000000U
220 #define RT5033_REGULATOR_BUCK_VOLTAGE_MAX         201 #define RT5033_REGULATOR_BUCK_VOLTAGE_MAX               3000000U
221 #define RT5033_REGULATOR_BUCK_VOLTAGE_STEP        202 #define RT5033_REGULATOR_BUCK_VOLTAGE_STEP              100000U
222 #define RT5033_REGULATOR_BUCK_VOLTAGE_STEP_NUM    203 #define RT5033_REGULATOR_BUCK_VOLTAGE_STEP_NUM          32
223                                                   204 
224 /* RT5033 regulator LDO output voltage uV */      205 /* RT5033 regulator LDO output voltage uV */
225 #define RT5033_REGULATOR_LDO_VOLTAGE_MIN          206 #define RT5033_REGULATOR_LDO_VOLTAGE_MIN                1200000U
226 #define RT5033_REGULATOR_LDO_VOLTAGE_MAX          207 #define RT5033_REGULATOR_LDO_VOLTAGE_MAX                3000000U
227 #define RT5033_REGULATOR_LDO_VOLTAGE_STEP         208 #define RT5033_REGULATOR_LDO_VOLTAGE_STEP               100000U
228 #define RT5033_REGULATOR_LDO_VOLTAGE_STEP_NUM     209 #define RT5033_REGULATOR_LDO_VOLTAGE_STEP_NUM           32
229                                                   210 
230 /* RT5033 regulator SAFE LDO output voltage uV    211 /* RT5033 regulator SAFE LDO output voltage uV */
231 #define RT5033_REGULATOR_SAFE_LDO_VOLTAGE         212 #define RT5033_REGULATOR_SAFE_LDO_VOLTAGE               4900000U
232                                                   213 
233 enum rt5033_fuel_reg {                            214 enum rt5033_fuel_reg {
234         RT5033_FUEL_REG_OCV_H           = 0x00    215         RT5033_FUEL_REG_OCV_H           = 0x00,
235         RT5033_FUEL_REG_OCV_L           = 0x01    216         RT5033_FUEL_REG_OCV_L           = 0x01,
236         RT5033_FUEL_REG_VBAT_H          = 0x02    217         RT5033_FUEL_REG_VBAT_H          = 0x02,
237         RT5033_FUEL_REG_VBAT_L          = 0x03    218         RT5033_FUEL_REG_VBAT_L          = 0x03,
238         RT5033_FUEL_REG_SOC_H           = 0x04    219         RT5033_FUEL_REG_SOC_H           = 0x04,
239         RT5033_FUEL_REG_SOC_L           = 0x05    220         RT5033_FUEL_REG_SOC_L           = 0x05,
240         RT5033_FUEL_REG_CTRL_H          = 0x06    221         RT5033_FUEL_REG_CTRL_H          = 0x06,
241         RT5033_FUEL_REG_CTRL_L          = 0x07    222         RT5033_FUEL_REG_CTRL_L          = 0x07,
242         RT5033_FUEL_REG_CRATE           = 0x08    223         RT5033_FUEL_REG_CRATE           = 0x08,
243         RT5033_FUEL_REG_DEVICE_ID       = 0x09    224         RT5033_FUEL_REG_DEVICE_ID       = 0x09,
244         RT5033_FUEL_REG_AVG_VOLT_H      = 0x0A    225         RT5033_FUEL_REG_AVG_VOLT_H      = 0x0A,
245         RT5033_FUEL_REG_AVG_VOLT_L      = 0x0B    226         RT5033_FUEL_REG_AVG_VOLT_L      = 0x0B,
246         RT5033_FUEL_REG_CONFIG_H        = 0x0C    227         RT5033_FUEL_REG_CONFIG_H        = 0x0C,
247         RT5033_FUEL_REG_CONFIG_L        = 0x0D    228         RT5033_FUEL_REG_CONFIG_L        = 0x0D,
248         /* Reserved 0x0E~0x0F */                  229         /* Reserved 0x0E~0x0F */
249         RT5033_FUEL_REG_IRQ_CTRL        = 0x10    230         RT5033_FUEL_REG_IRQ_CTRL        = 0x10,
250         RT5033_FUEL_REG_IRQ_FLAG        = 0x11    231         RT5033_FUEL_REG_IRQ_FLAG        = 0x11,
251         RT5033_FUEL_VMIN                = 0x12    232         RT5033_FUEL_VMIN                = 0x12,
252         RT5033_FUEL_SMIN                = 0x13    233         RT5033_FUEL_SMIN                = 0x13,
253         /* Reserved 0x14~0x1F */                  234         /* Reserved 0x14~0x1F */
254         RT5033_FUEL_VGCOMP1             = 0x20    235         RT5033_FUEL_VGCOMP1             = 0x20,
255         RT5033_FUEL_VGCOMP2             = 0x21    236         RT5033_FUEL_VGCOMP2             = 0x21,
256         RT5033_FUEL_VGCOMP3             = 0x22    237         RT5033_FUEL_VGCOMP3             = 0x22,
257         RT5033_FUEL_VGCOMP4             = 0x23    238         RT5033_FUEL_VGCOMP4             = 0x23,
258         /* Reserved 0x24~0xFD */                  239         /* Reserved 0x24~0xFD */
259         RT5033_FUEL_MFA_H               = 0xFE    240         RT5033_FUEL_MFA_H               = 0xFE,
260         RT5033_FUEL_MFA_L               = 0xFF    241         RT5033_FUEL_MFA_L               = 0xFF,
261                                                   242 
262         RT5033_FUEL_REG_END,                      243         RT5033_FUEL_REG_END,
263 };                                                244 };
264                                                   245 
265 /* RT5033 fuel gauge battery present property     246 /* RT5033 fuel gauge battery present property */
266 #define RT5033_FUEL_BAT_PRESENT         0x02      247 #define RT5033_FUEL_BAT_PRESENT         0x02
267                                                   248 
268 /* RT5033 PMIC interrupts */                      249 /* RT5033 PMIC interrupts */
269 #define RT5033_PMIC_IRQ_BUCKOCP         BIT(2)    250 #define RT5033_PMIC_IRQ_BUCKOCP         BIT(2)
270 #define RT5033_PMIC_IRQ_BUCKLV          BIT(3)    251 #define RT5033_PMIC_IRQ_BUCKLV          BIT(3)
271 #define RT5033_PMIC_IRQ_SAFELDOLV       BIT(4)    252 #define RT5033_PMIC_IRQ_SAFELDOLV       BIT(4)
272 #define RT5033_PMIC_IRQ_LDOLV           BIT(5)    253 #define RT5033_PMIC_IRQ_LDOLV           BIT(5)
273 #define RT5033_PMIC_IRQ_OT              BIT(6)    254 #define RT5033_PMIC_IRQ_OT              BIT(6)
274 #define RT5033_PMIC_IRQ_VDDA_UV         BIT(7)    255 #define RT5033_PMIC_IRQ_VDDA_UV         BIT(7)
275                                                   256 
276 #endif /* __RT5033_PRIVATE_H__ */                 257 #endif /* __RT5033_PRIVATE_H__ */
277                                                   258 

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