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TOMOYO Linux Cross Reference
Linux/include/linux/mfd/stmpe.h

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Diff markup

Differences between /include/linux/mfd/stmpe.h (Version linux-6.11-rc3) and /include/linux/mfd/stmpe.h (Version linux-5.1.21)


  1 /* SPDX-License-Identifier: GPL-2.0-only */    << 
  2 /*                                                  1 /*
  3  * Copyright (C) ST-Ericsson SA 2010                2  * Copyright (C) ST-Ericsson SA 2010
  4  *                                                  3  *
                                                   >>   4  * License Terms: GNU General Public License, version 2
  5  * Author: Rabin Vincent <rabin.vincent@steric      5  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
  6  */                                                 6  */
  7                                                     7 
  8 #ifndef __LINUX_MFD_STMPE_H                         8 #ifndef __LINUX_MFD_STMPE_H
  9 #define __LINUX_MFD_STMPE_H                         9 #define __LINUX_MFD_STMPE_H
 10                                                    10 
 11 #include <linux/mutex.h>                           11 #include <linux/mutex.h>
 12                                                    12 
 13 #define STMPE_SAMPLE_TIME(x)    ((x & 0xf) <<      13 #define STMPE_SAMPLE_TIME(x)    ((x & 0xf) << 4)
 14 #define STMPE_MOD_12B(x)        ((x & 0x1) <<      14 #define STMPE_MOD_12B(x)        ((x & 0x1) << 3)
 15 #define STMPE_REF_SEL(x)        ((x & 0x1) <<      15 #define STMPE_REF_SEL(x)        ((x & 0x1) << 1)
 16 #define STMPE_ADC_FREQ(x)       (x & 0x3)          16 #define STMPE_ADC_FREQ(x)       (x & 0x3)
 17 #define STMPE_AVE_CTRL(x)       ((x & 0x3) <<      17 #define STMPE_AVE_CTRL(x)       ((x & 0x3) << 6)
 18 #define STMPE_DET_DELAY(x)      ((x & 0x7) <<      18 #define STMPE_DET_DELAY(x)      ((x & 0x7) << 3)
 19 #define STMPE_SETTLING(x)       (x & 0x7)          19 #define STMPE_SETTLING(x)       (x & 0x7)
 20 #define STMPE_FRACTION_Z(x)     (x & 0x7)          20 #define STMPE_FRACTION_Z(x)     (x & 0x7)
 21 #define STMPE_I_DRIVE(x)        (x & 0x1)          21 #define STMPE_I_DRIVE(x)        (x & 0x1)
 22 #define STMPE_OP_MODE(x)        ((x & 0x7) <<      22 #define STMPE_OP_MODE(x)        ((x & 0x7) << 1)
 23                                                    23 
 24 #define STMPE811_REG_ADC_CTRL1  0x20               24 #define STMPE811_REG_ADC_CTRL1  0x20
 25 #define STMPE811_REG_ADC_CTRL2  0x21               25 #define STMPE811_REG_ADC_CTRL2  0x21
 26                                                    26 
 27 struct device;                                     27 struct device;
 28 struct regulator;                                  28 struct regulator;
 29                                                    29 
 30 enum stmpe_block {                                 30 enum stmpe_block {
 31         STMPE_BLOCK_GPIO        = 1 << 0,          31         STMPE_BLOCK_GPIO        = 1 << 0,
 32         STMPE_BLOCK_KEYPAD      = 1 << 1,          32         STMPE_BLOCK_KEYPAD      = 1 << 1,
 33         STMPE_BLOCK_TOUCHSCREEN = 1 << 2,          33         STMPE_BLOCK_TOUCHSCREEN = 1 << 2,
 34         STMPE_BLOCK_ADC         = 1 << 3,          34         STMPE_BLOCK_ADC         = 1 << 3,
 35         STMPE_BLOCK_PWM         = 1 << 4,          35         STMPE_BLOCK_PWM         = 1 << 4,
 36         STMPE_BLOCK_ROTATOR     = 1 << 5,          36         STMPE_BLOCK_ROTATOR     = 1 << 5,
 37 };                                                 37 };
 38                                                    38 
 39 enum stmpe_partnum {                               39 enum stmpe_partnum {
 40         STMPE610,                                  40         STMPE610,
 41         STMPE801,                                  41         STMPE801,
 42         STMPE811,                                  42         STMPE811,
 43         STMPE1600,                                 43         STMPE1600,
 44         STMPE1601,                                 44         STMPE1601,
 45         STMPE1801,                                 45         STMPE1801,
 46         STMPE2401,                                 46         STMPE2401,
 47         STMPE2403,                                 47         STMPE2403,
 48         STMPE_NBR_PARTS                            48         STMPE_NBR_PARTS
 49 };                                                 49 };
 50                                                    50 
 51 /*                                                 51 /*
 52  * For registers whose locations differ on var     52  * For registers whose locations differ on variants,  the correct address is
 53  * obtained by indexing stmpe->regs with one o     53  * obtained by indexing stmpe->regs with one of the following.
 54  */                                                54  */
 55 enum {                                             55 enum {
 56         STMPE_IDX_CHIP_ID,                         56         STMPE_IDX_CHIP_ID,
 57         STMPE_IDX_SYS_CTRL,                        57         STMPE_IDX_SYS_CTRL,
 58         STMPE_IDX_SYS_CTRL2,                       58         STMPE_IDX_SYS_CTRL2,
 59         STMPE_IDX_ICR_LSB,                         59         STMPE_IDX_ICR_LSB,
 60         STMPE_IDX_IER_LSB,                         60         STMPE_IDX_IER_LSB,
 61         STMPE_IDX_IER_MSB,                         61         STMPE_IDX_IER_MSB,
 62         STMPE_IDX_ISR_LSB,                         62         STMPE_IDX_ISR_LSB,
 63         STMPE_IDX_ISR_MSB,                         63         STMPE_IDX_ISR_MSB,
 64         STMPE_IDX_GPMR_LSB,                        64         STMPE_IDX_GPMR_LSB,
 65         STMPE_IDX_GPMR_CSB,                        65         STMPE_IDX_GPMR_CSB,
 66         STMPE_IDX_GPMR_MSB,                        66         STMPE_IDX_GPMR_MSB,
 67         STMPE_IDX_GPSR_LSB,                        67         STMPE_IDX_GPSR_LSB,
 68         STMPE_IDX_GPSR_CSB,                        68         STMPE_IDX_GPSR_CSB,
 69         STMPE_IDX_GPSR_MSB,                        69         STMPE_IDX_GPSR_MSB,
 70         STMPE_IDX_GPCR_LSB,                        70         STMPE_IDX_GPCR_LSB,
 71         STMPE_IDX_GPCR_CSB,                        71         STMPE_IDX_GPCR_CSB,
 72         STMPE_IDX_GPCR_MSB,                        72         STMPE_IDX_GPCR_MSB,
 73         STMPE_IDX_GPDR_LSB,                        73         STMPE_IDX_GPDR_LSB,
 74         STMPE_IDX_GPDR_CSB,                        74         STMPE_IDX_GPDR_CSB,
 75         STMPE_IDX_GPDR_MSB,                        75         STMPE_IDX_GPDR_MSB,
 76         STMPE_IDX_GPEDR_LSB,                       76         STMPE_IDX_GPEDR_LSB,
 77         STMPE_IDX_GPEDR_CSB,                       77         STMPE_IDX_GPEDR_CSB,
 78         STMPE_IDX_GPEDR_MSB,                       78         STMPE_IDX_GPEDR_MSB,
 79         STMPE_IDX_GPRER_LSB,                       79         STMPE_IDX_GPRER_LSB,
 80         STMPE_IDX_GPRER_CSB,                       80         STMPE_IDX_GPRER_CSB,
 81         STMPE_IDX_GPRER_MSB,                       81         STMPE_IDX_GPRER_MSB,
 82         STMPE_IDX_GPFER_LSB,                       82         STMPE_IDX_GPFER_LSB,
 83         STMPE_IDX_GPFER_CSB,                       83         STMPE_IDX_GPFER_CSB,
 84         STMPE_IDX_GPFER_MSB,                       84         STMPE_IDX_GPFER_MSB,
 85         STMPE_IDX_GPPUR_LSB,                       85         STMPE_IDX_GPPUR_LSB,
 86         STMPE_IDX_GPPDR_LSB,                       86         STMPE_IDX_GPPDR_LSB,
 87         STMPE_IDX_GPAFR_U_MSB,                     87         STMPE_IDX_GPAFR_U_MSB,
 88         STMPE_IDX_IEGPIOR_LSB,                     88         STMPE_IDX_IEGPIOR_LSB,
 89         STMPE_IDX_IEGPIOR_CSB,                     89         STMPE_IDX_IEGPIOR_CSB,
 90         STMPE_IDX_IEGPIOR_MSB,                     90         STMPE_IDX_IEGPIOR_MSB,
 91         STMPE_IDX_ISGPIOR_LSB,                     91         STMPE_IDX_ISGPIOR_LSB,
 92         STMPE_IDX_ISGPIOR_CSB,                     92         STMPE_IDX_ISGPIOR_CSB,
 93         STMPE_IDX_ISGPIOR_MSB,                     93         STMPE_IDX_ISGPIOR_MSB,
 94         STMPE_IDX_MAX,                             94         STMPE_IDX_MAX,
 95 };                                                 95 };
 96                                                    96 
 97                                                    97 
 98 struct stmpe_variant_info;                         98 struct stmpe_variant_info;
 99 struct stmpe_client_info;                          99 struct stmpe_client_info;
100 struct stmpe_platform_data;                       100 struct stmpe_platform_data;
101                                                   101 
102 /**                                               102 /**
103  * struct stmpe - STMPE MFD structure             103  * struct stmpe - STMPE MFD structure
104  * @vcc: optional VCC regulator                   104  * @vcc: optional VCC regulator
105  * @vio: optional VIO regulator                   105  * @vio: optional VIO regulator
106  * @lock: lock protecting I/O operations          106  * @lock: lock protecting I/O operations
107  * @irq_lock: IRQ bus lock                        107  * @irq_lock: IRQ bus lock
108  * @dev: device, mostly for dev_dbg()             108  * @dev: device, mostly for dev_dbg()
109  * @irq_domain: IRQ domain                        109  * @irq_domain: IRQ domain
110  * @client: client - i2c or spi                   110  * @client: client - i2c or spi
111  * @ci: client specific information               111  * @ci: client specific information
112  * @partnum: part number                          112  * @partnum: part number
113  * @variant: the detected STMPE model number      113  * @variant: the detected STMPE model number
114  * @regs: list of addresses of registers which    114  * @regs: list of addresses of registers which are at different addresses on
115  *        different variants.  Indexed by one     115  *        different variants.  Indexed by one of STMPE_IDX_*.
116  * @irq: irq number for stmpe                     116  * @irq: irq number for stmpe
117  * @num_gpios: number of gpios, differs for va    117  * @num_gpios: number of gpios, differs for variants
118  * @ier: cache of IER registers for bus_lock      118  * @ier: cache of IER registers for bus_lock
119  * @oldier: cache of IER registers for bus_loc    119  * @oldier: cache of IER registers for bus_lock
120  * @pdata: platform data                          120  * @pdata: platform data
121  */                                               121  */
122 struct stmpe {                                    122 struct stmpe {
123         struct regulator *vcc;                    123         struct regulator *vcc;
124         struct regulator *vio;                    124         struct regulator *vio;
125         struct mutex lock;                        125         struct mutex lock;
126         struct mutex irq_lock;                    126         struct mutex irq_lock;
127         struct device *dev;                       127         struct device *dev;
128         struct irq_domain *domain;                128         struct irq_domain *domain;
129         void *client;                             129         void *client;
130         struct stmpe_client_info *ci;             130         struct stmpe_client_info *ci;
131         enum stmpe_partnum partnum;               131         enum stmpe_partnum partnum;
132         struct stmpe_variant_info *variant;       132         struct stmpe_variant_info *variant;
133         const u8 *regs;                           133         const u8 *regs;
134                                                   134 
135         int irq;                                  135         int irq;
136         int num_gpios;                            136         int num_gpios;
137         u8 ier[2];                                137         u8 ier[2];
138         u8 oldier[2];                             138         u8 oldier[2];
139         struct stmpe_platform_data *pdata;        139         struct stmpe_platform_data *pdata;
140                                                   140 
141         /* For devices that use an ADC */         141         /* For devices that use an ADC */
142         u8 sample_time;                           142         u8 sample_time;
143         u8 mod_12b;                               143         u8 mod_12b;
144         u8 ref_sel;                               144         u8 ref_sel;
145         u8 adc_freq;                              145         u8 adc_freq;
146 };                                                146 };
147                                                   147 
148 extern int stmpe_reg_write(struct stmpe *stmpe    148 extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data);
149 extern int stmpe_reg_read(struct stmpe *stmpe,    149 extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg);
150 extern int stmpe_block_read(struct stmpe *stmp    150 extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
151                             u8 *values);          151                             u8 *values);
152 extern int stmpe_block_write(struct stmpe *stm    152 extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
153                              const u8 *values)    153                              const u8 *values);
154 extern int stmpe_set_bits(struct stmpe *stmpe,    154 extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val);
155 extern int stmpe_set_altfunc(struct stmpe *stm    155 extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins,
156                              enum stmpe_block     156                              enum stmpe_block block);
157 extern int stmpe_enable(struct stmpe *stmpe, u    157 extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks);
158 extern int stmpe_disable(struct stmpe *stmpe,     158 extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks);
159 extern int stmpe811_adc_common_init(struct stm    159 extern int stmpe811_adc_common_init(struct stmpe *stmpe);
160                                                   160 
161 #define STMPE_GPIO_NOREQ_811_TOUCH      (0xf0)    161 #define STMPE_GPIO_NOREQ_811_TOUCH      (0xf0)
162                                                   162 
163 #endif                                            163 #endif
164                                                   164 

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