1 /* SPDX-License-Identifier: GPL-2.0-or-later * <<
2 /* 1 /*
3 * include/linux/mfd/wm831x/auxadc.h -- Auxili 2 * include/linux/mfd/wm831x/auxadc.h -- Auxiliary ADC interface for WM831x
4 * 3 *
5 * Copyright 2009 Wolfson Microelectronics PLC 4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * 5 *
7 * Author: Mark Brown <broonie@opensource.wolf 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
>> 7 *
>> 8 * This program is free software; you can redistribute it and/or modify it
>> 9 * under the terms of the GNU General Public License as published by the
>> 10 * Free Software Foundation; either version 2 of the License, or (at your
>> 11 * option) any later version.
>> 12 *
8 */ 13 */
9 14
10 #ifndef __MFD_WM831X_AUXADC_H__ 15 #ifndef __MFD_WM831X_AUXADC_H__
11 #define __MFD_WM831X_AUXADC_H__ 16 #define __MFD_WM831X_AUXADC_H__
12 17
13 struct wm831x; 18 struct wm831x;
14 19
15 /* 20 /*
16 * R16429 (0x402D) - AuxADC Data 21 * R16429 (0x402D) - AuxADC Data
17 */ 22 */
18 #define WM831X_AUX_DATA_SRC_MASK 23 #define WM831X_AUX_DATA_SRC_MASK 0xF000 /* AUX_DATA_SRC - [15:12] */
19 #define WM831X_AUX_DATA_SRC_SHIFT 24 #define WM831X_AUX_DATA_SRC_SHIFT 12 /* AUX_DATA_SRC - [15:12] */
20 #define WM831X_AUX_DATA_SRC_WIDTH 25 #define WM831X_AUX_DATA_SRC_WIDTH 4 /* AUX_DATA_SRC - [15:12] */
21 #define WM831X_AUX_DATA_MASK 26 #define WM831X_AUX_DATA_MASK 0x0FFF /* AUX_DATA - [11:0] */
22 #define WM831X_AUX_DATA_SHIFT 27 #define WM831X_AUX_DATA_SHIFT 0 /* AUX_DATA - [11:0] */
23 #define WM831X_AUX_DATA_WIDTH 28 #define WM831X_AUX_DATA_WIDTH 12 /* AUX_DATA - [11:0] */
24 29
25 /* 30 /*
26 * R16430 (0x402E) - AuxADC Control 31 * R16430 (0x402E) - AuxADC Control
27 */ 32 */
28 #define WM831X_AUX_ENA 33 #define WM831X_AUX_ENA 0x8000 /* AUX_ENA */
29 #define WM831X_AUX_ENA_MASK 34 #define WM831X_AUX_ENA_MASK 0x8000 /* AUX_ENA */
30 #define WM831X_AUX_ENA_SHIFT 35 #define WM831X_AUX_ENA_SHIFT 15 /* AUX_ENA */
31 #define WM831X_AUX_ENA_WIDTH 36 #define WM831X_AUX_ENA_WIDTH 1 /* AUX_ENA */
32 #define WM831X_AUX_CVT_ENA 37 #define WM831X_AUX_CVT_ENA 0x4000 /* AUX_CVT_ENA */
33 #define WM831X_AUX_CVT_ENA_MASK 38 #define WM831X_AUX_CVT_ENA_MASK 0x4000 /* AUX_CVT_ENA */
34 #define WM831X_AUX_CVT_ENA_SHIFT 39 #define WM831X_AUX_CVT_ENA_SHIFT 14 /* AUX_CVT_ENA */
35 #define WM831X_AUX_CVT_ENA_WIDTH 40 #define WM831X_AUX_CVT_ENA_WIDTH 1 /* AUX_CVT_ENA */
36 #define WM831X_AUX_SLPENA 41 #define WM831X_AUX_SLPENA 0x1000 /* AUX_SLPENA */
37 #define WM831X_AUX_SLPENA_MASK 42 #define WM831X_AUX_SLPENA_MASK 0x1000 /* AUX_SLPENA */
38 #define WM831X_AUX_SLPENA_SHIFT 43 #define WM831X_AUX_SLPENA_SHIFT 12 /* AUX_SLPENA */
39 #define WM831X_AUX_SLPENA_WIDTH 44 #define WM831X_AUX_SLPENA_WIDTH 1 /* AUX_SLPENA */
40 #define WM831X_AUX_FRC_ENA 45 #define WM831X_AUX_FRC_ENA 0x0800 /* AUX_FRC_ENA */
41 #define WM831X_AUX_FRC_ENA_MASK 46 #define WM831X_AUX_FRC_ENA_MASK 0x0800 /* AUX_FRC_ENA */
42 #define WM831X_AUX_FRC_ENA_SHIFT 47 #define WM831X_AUX_FRC_ENA_SHIFT 11 /* AUX_FRC_ENA */
43 #define WM831X_AUX_FRC_ENA_WIDTH 48 #define WM831X_AUX_FRC_ENA_WIDTH 1 /* AUX_FRC_ENA */
44 #define WM831X_AUX_RATE_MASK 49 #define WM831X_AUX_RATE_MASK 0x003F /* AUX_RATE - [5:0] */
45 #define WM831X_AUX_RATE_SHIFT 50 #define WM831X_AUX_RATE_SHIFT 0 /* AUX_RATE - [5:0] */
46 #define WM831X_AUX_RATE_WIDTH 51 #define WM831X_AUX_RATE_WIDTH 6 /* AUX_RATE - [5:0] */
47 52
48 /* 53 /*
49 * R16431 (0x402F) - AuxADC Source 54 * R16431 (0x402F) - AuxADC Source
50 */ 55 */
51 #define WM831X_AUX_CAL_SEL 56 #define WM831X_AUX_CAL_SEL 0x8000 /* AUX_CAL_SEL */
52 #define WM831X_AUX_CAL_SEL_MASK 57 #define WM831X_AUX_CAL_SEL_MASK 0x8000 /* AUX_CAL_SEL */
53 #define WM831X_AUX_CAL_SEL_SHIFT 58 #define WM831X_AUX_CAL_SEL_SHIFT 15 /* AUX_CAL_SEL */
54 #define WM831X_AUX_CAL_SEL_WIDTH 59 #define WM831X_AUX_CAL_SEL_WIDTH 1 /* AUX_CAL_SEL */
55 #define WM831X_AUX_BKUP_BATT_SEL 60 #define WM831X_AUX_BKUP_BATT_SEL 0x0400 /* AUX_BKUP_BATT_SEL */
56 #define WM831X_AUX_BKUP_BATT_SEL_MASK 61 #define WM831X_AUX_BKUP_BATT_SEL_MASK 0x0400 /* AUX_BKUP_BATT_SEL */
57 #define WM831X_AUX_BKUP_BATT_SEL_SHIFT 62 #define WM831X_AUX_BKUP_BATT_SEL_SHIFT 10 /* AUX_BKUP_BATT_SEL */
58 #define WM831X_AUX_BKUP_BATT_SEL_WIDTH 63 #define WM831X_AUX_BKUP_BATT_SEL_WIDTH 1 /* AUX_BKUP_BATT_SEL */
59 #define WM831X_AUX_WALL_SEL 64 #define WM831X_AUX_WALL_SEL 0x0200 /* AUX_WALL_SEL */
60 #define WM831X_AUX_WALL_SEL_MASK 65 #define WM831X_AUX_WALL_SEL_MASK 0x0200 /* AUX_WALL_SEL */
61 #define WM831X_AUX_WALL_SEL_SHIFT 66 #define WM831X_AUX_WALL_SEL_SHIFT 9 /* AUX_WALL_SEL */
62 #define WM831X_AUX_WALL_SEL_WIDTH 67 #define WM831X_AUX_WALL_SEL_WIDTH 1 /* AUX_WALL_SEL */
63 #define WM831X_AUX_BATT_SEL 68 #define WM831X_AUX_BATT_SEL 0x0100 /* AUX_BATT_SEL */
64 #define WM831X_AUX_BATT_SEL_MASK 69 #define WM831X_AUX_BATT_SEL_MASK 0x0100 /* AUX_BATT_SEL */
65 #define WM831X_AUX_BATT_SEL_SHIFT 70 #define WM831X_AUX_BATT_SEL_SHIFT 8 /* AUX_BATT_SEL */
66 #define WM831X_AUX_BATT_SEL_WIDTH 71 #define WM831X_AUX_BATT_SEL_WIDTH 1 /* AUX_BATT_SEL */
67 #define WM831X_AUX_USB_SEL 72 #define WM831X_AUX_USB_SEL 0x0080 /* AUX_USB_SEL */
68 #define WM831X_AUX_USB_SEL_MASK 73 #define WM831X_AUX_USB_SEL_MASK 0x0080 /* AUX_USB_SEL */
69 #define WM831X_AUX_USB_SEL_SHIFT 74 #define WM831X_AUX_USB_SEL_SHIFT 7 /* AUX_USB_SEL */
70 #define WM831X_AUX_USB_SEL_WIDTH 75 #define WM831X_AUX_USB_SEL_WIDTH 1 /* AUX_USB_SEL */
71 #define WM831X_AUX_SYSVDD_SEL 76 #define WM831X_AUX_SYSVDD_SEL 0x0040 /* AUX_SYSVDD_SEL */
72 #define WM831X_AUX_SYSVDD_SEL_MASK 77 #define WM831X_AUX_SYSVDD_SEL_MASK 0x0040 /* AUX_SYSVDD_SEL */
73 #define WM831X_AUX_SYSVDD_SEL_SHIFT 78 #define WM831X_AUX_SYSVDD_SEL_SHIFT 6 /* AUX_SYSVDD_SEL */
74 #define WM831X_AUX_SYSVDD_SEL_WIDTH 79 #define WM831X_AUX_SYSVDD_SEL_WIDTH 1 /* AUX_SYSVDD_SEL */
75 #define WM831X_AUX_BATT_TEMP_SEL 80 #define WM831X_AUX_BATT_TEMP_SEL 0x0020 /* AUX_BATT_TEMP_SEL */
76 #define WM831X_AUX_BATT_TEMP_SEL_MASK 81 #define WM831X_AUX_BATT_TEMP_SEL_MASK 0x0020 /* AUX_BATT_TEMP_SEL */
77 #define WM831X_AUX_BATT_TEMP_SEL_SHIFT 82 #define WM831X_AUX_BATT_TEMP_SEL_SHIFT 5 /* AUX_BATT_TEMP_SEL */
78 #define WM831X_AUX_BATT_TEMP_SEL_WIDTH 83 #define WM831X_AUX_BATT_TEMP_SEL_WIDTH 1 /* AUX_BATT_TEMP_SEL */
79 #define WM831X_AUX_CHIP_TEMP_SEL 84 #define WM831X_AUX_CHIP_TEMP_SEL 0x0010 /* AUX_CHIP_TEMP_SEL */
80 #define WM831X_AUX_CHIP_TEMP_SEL_MASK 85 #define WM831X_AUX_CHIP_TEMP_SEL_MASK 0x0010 /* AUX_CHIP_TEMP_SEL */
81 #define WM831X_AUX_CHIP_TEMP_SEL_SHIFT 86 #define WM831X_AUX_CHIP_TEMP_SEL_SHIFT 4 /* AUX_CHIP_TEMP_SEL */
82 #define WM831X_AUX_CHIP_TEMP_SEL_WIDTH 87 #define WM831X_AUX_CHIP_TEMP_SEL_WIDTH 1 /* AUX_CHIP_TEMP_SEL */
83 #define WM831X_AUX_AUX4_SEL 88 #define WM831X_AUX_AUX4_SEL 0x0008 /* AUX_AUX4_SEL */
84 #define WM831X_AUX_AUX4_SEL_MASK 89 #define WM831X_AUX_AUX4_SEL_MASK 0x0008 /* AUX_AUX4_SEL */
85 #define WM831X_AUX_AUX4_SEL_SHIFT 90 #define WM831X_AUX_AUX4_SEL_SHIFT 3 /* AUX_AUX4_SEL */
86 #define WM831X_AUX_AUX4_SEL_WIDTH 91 #define WM831X_AUX_AUX4_SEL_WIDTH 1 /* AUX_AUX4_SEL */
87 #define WM831X_AUX_AUX3_SEL 92 #define WM831X_AUX_AUX3_SEL 0x0004 /* AUX_AUX3_SEL */
88 #define WM831X_AUX_AUX3_SEL_MASK 93 #define WM831X_AUX_AUX3_SEL_MASK 0x0004 /* AUX_AUX3_SEL */
89 #define WM831X_AUX_AUX3_SEL_SHIFT 94 #define WM831X_AUX_AUX3_SEL_SHIFT 2 /* AUX_AUX3_SEL */
90 #define WM831X_AUX_AUX3_SEL_WIDTH 95 #define WM831X_AUX_AUX3_SEL_WIDTH 1 /* AUX_AUX3_SEL */
91 #define WM831X_AUX_AUX2_SEL 96 #define WM831X_AUX_AUX2_SEL 0x0002 /* AUX_AUX2_SEL */
92 #define WM831X_AUX_AUX2_SEL_MASK 97 #define WM831X_AUX_AUX2_SEL_MASK 0x0002 /* AUX_AUX2_SEL */
93 #define WM831X_AUX_AUX2_SEL_SHIFT 98 #define WM831X_AUX_AUX2_SEL_SHIFT 1 /* AUX_AUX2_SEL */
94 #define WM831X_AUX_AUX2_SEL_WIDTH 99 #define WM831X_AUX_AUX2_SEL_WIDTH 1 /* AUX_AUX2_SEL */
95 #define WM831X_AUX_AUX1_SEL 100 #define WM831X_AUX_AUX1_SEL 0x0001 /* AUX_AUX1_SEL */
96 #define WM831X_AUX_AUX1_SEL_MASK 101 #define WM831X_AUX_AUX1_SEL_MASK 0x0001 /* AUX_AUX1_SEL */
97 #define WM831X_AUX_AUX1_SEL_SHIFT 102 #define WM831X_AUX_AUX1_SEL_SHIFT 0 /* AUX_AUX1_SEL */
98 #define WM831X_AUX_AUX1_SEL_WIDTH 103 #define WM831X_AUX_AUX1_SEL_WIDTH 1 /* AUX_AUX1_SEL */
99 104
100 /* 105 /*
101 * R16432 (0x4030) - Comparator Control 106 * R16432 (0x4030) - Comparator Control
102 */ 107 */
103 #define WM831X_DCOMP4_STS 108 #define WM831X_DCOMP4_STS 0x0800 /* DCOMP4_STS */
104 #define WM831X_DCOMP4_STS_MASK 109 #define WM831X_DCOMP4_STS_MASK 0x0800 /* DCOMP4_STS */
105 #define WM831X_DCOMP4_STS_SHIFT 110 #define WM831X_DCOMP4_STS_SHIFT 11 /* DCOMP4_STS */
106 #define WM831X_DCOMP4_STS_WIDTH 111 #define WM831X_DCOMP4_STS_WIDTH 1 /* DCOMP4_STS */
107 #define WM831X_DCOMP3_STS 112 #define WM831X_DCOMP3_STS 0x0400 /* DCOMP3_STS */
108 #define WM831X_DCOMP3_STS_MASK 113 #define WM831X_DCOMP3_STS_MASK 0x0400 /* DCOMP3_STS */
109 #define WM831X_DCOMP3_STS_SHIFT 114 #define WM831X_DCOMP3_STS_SHIFT 10 /* DCOMP3_STS */
110 #define WM831X_DCOMP3_STS_WIDTH 115 #define WM831X_DCOMP3_STS_WIDTH 1 /* DCOMP3_STS */
111 #define WM831X_DCOMP2_STS 116 #define WM831X_DCOMP2_STS 0x0200 /* DCOMP2_STS */
112 #define WM831X_DCOMP2_STS_MASK 117 #define WM831X_DCOMP2_STS_MASK 0x0200 /* DCOMP2_STS */
113 #define WM831X_DCOMP2_STS_SHIFT 118 #define WM831X_DCOMP2_STS_SHIFT 9 /* DCOMP2_STS */
114 #define WM831X_DCOMP2_STS_WIDTH 119 #define WM831X_DCOMP2_STS_WIDTH 1 /* DCOMP2_STS */
115 #define WM831X_DCOMP1_STS 120 #define WM831X_DCOMP1_STS 0x0100 /* DCOMP1_STS */
116 #define WM831X_DCOMP1_STS_MASK 121 #define WM831X_DCOMP1_STS_MASK 0x0100 /* DCOMP1_STS */
117 #define WM831X_DCOMP1_STS_SHIFT 122 #define WM831X_DCOMP1_STS_SHIFT 8 /* DCOMP1_STS */
118 #define WM831X_DCOMP1_STS_WIDTH 123 #define WM831X_DCOMP1_STS_WIDTH 1 /* DCOMP1_STS */
119 #define WM831X_DCMP4_ENA 124 #define WM831X_DCMP4_ENA 0x0008 /* DCMP4_ENA */
120 #define WM831X_DCMP4_ENA_MASK 125 #define WM831X_DCMP4_ENA_MASK 0x0008 /* DCMP4_ENA */
121 #define WM831X_DCMP4_ENA_SHIFT 126 #define WM831X_DCMP4_ENA_SHIFT 3 /* DCMP4_ENA */
122 #define WM831X_DCMP4_ENA_WIDTH 127 #define WM831X_DCMP4_ENA_WIDTH 1 /* DCMP4_ENA */
123 #define WM831X_DCMP3_ENA 128 #define WM831X_DCMP3_ENA 0x0004 /* DCMP3_ENA */
124 #define WM831X_DCMP3_ENA_MASK 129 #define WM831X_DCMP3_ENA_MASK 0x0004 /* DCMP3_ENA */
125 #define WM831X_DCMP3_ENA_SHIFT 130 #define WM831X_DCMP3_ENA_SHIFT 2 /* DCMP3_ENA */
126 #define WM831X_DCMP3_ENA_WIDTH 131 #define WM831X_DCMP3_ENA_WIDTH 1 /* DCMP3_ENA */
127 #define WM831X_DCMP2_ENA 132 #define WM831X_DCMP2_ENA 0x0002 /* DCMP2_ENA */
128 #define WM831X_DCMP2_ENA_MASK 133 #define WM831X_DCMP2_ENA_MASK 0x0002 /* DCMP2_ENA */
129 #define WM831X_DCMP2_ENA_SHIFT 134 #define WM831X_DCMP2_ENA_SHIFT 1 /* DCMP2_ENA */
130 #define WM831X_DCMP2_ENA_WIDTH 135 #define WM831X_DCMP2_ENA_WIDTH 1 /* DCMP2_ENA */
131 #define WM831X_DCMP1_ENA 136 #define WM831X_DCMP1_ENA 0x0001 /* DCMP1_ENA */
132 #define WM831X_DCMP1_ENA_MASK 137 #define WM831X_DCMP1_ENA_MASK 0x0001 /* DCMP1_ENA */
133 #define WM831X_DCMP1_ENA_SHIFT 138 #define WM831X_DCMP1_ENA_SHIFT 0 /* DCMP1_ENA */
134 #define WM831X_DCMP1_ENA_WIDTH 139 #define WM831X_DCMP1_ENA_WIDTH 1 /* DCMP1_ENA */
135 140
136 /* 141 /*
137 * R16433 (0x4031) - Comparator 1 142 * R16433 (0x4031) - Comparator 1
138 */ 143 */
139 #define WM831X_DCMP1_SRC_MASK 144 #define WM831X_DCMP1_SRC_MASK 0xE000 /* DCMP1_SRC - [15:13] */
140 #define WM831X_DCMP1_SRC_SHIFT 145 #define WM831X_DCMP1_SRC_SHIFT 13 /* DCMP1_SRC - [15:13] */
141 #define WM831X_DCMP1_SRC_WIDTH 146 #define WM831X_DCMP1_SRC_WIDTH 3 /* DCMP1_SRC - [15:13] */
142 #define WM831X_DCMP1_GT 147 #define WM831X_DCMP1_GT 0x1000 /* DCMP1_GT */
143 #define WM831X_DCMP1_GT_MASK 148 #define WM831X_DCMP1_GT_MASK 0x1000 /* DCMP1_GT */
144 #define WM831X_DCMP1_GT_SHIFT 149 #define WM831X_DCMP1_GT_SHIFT 12 /* DCMP1_GT */
145 #define WM831X_DCMP1_GT_WIDTH 150 #define WM831X_DCMP1_GT_WIDTH 1 /* DCMP1_GT */
146 #define WM831X_DCMP1_THR_MASK 151 #define WM831X_DCMP1_THR_MASK 0x0FFF /* DCMP1_THR - [11:0] */
147 #define WM831X_DCMP1_THR_SHIFT 152 #define WM831X_DCMP1_THR_SHIFT 0 /* DCMP1_THR - [11:0] */
148 #define WM831X_DCMP1_THR_WIDTH 153 #define WM831X_DCMP1_THR_WIDTH 12 /* DCMP1_THR - [11:0] */
149 154
150 /* 155 /*
151 * R16434 (0x4032) - Comparator 2 156 * R16434 (0x4032) - Comparator 2
152 */ 157 */
153 #define WM831X_DCMP2_SRC_MASK 158 #define WM831X_DCMP2_SRC_MASK 0xE000 /* DCMP2_SRC - [15:13] */
154 #define WM831X_DCMP2_SRC_SHIFT 159 #define WM831X_DCMP2_SRC_SHIFT 13 /* DCMP2_SRC - [15:13] */
155 #define WM831X_DCMP2_SRC_WIDTH 160 #define WM831X_DCMP2_SRC_WIDTH 3 /* DCMP2_SRC - [15:13] */
156 #define WM831X_DCMP2_GT 161 #define WM831X_DCMP2_GT 0x1000 /* DCMP2_GT */
157 #define WM831X_DCMP2_GT_MASK 162 #define WM831X_DCMP2_GT_MASK 0x1000 /* DCMP2_GT */
158 #define WM831X_DCMP2_GT_SHIFT 163 #define WM831X_DCMP2_GT_SHIFT 12 /* DCMP2_GT */
159 #define WM831X_DCMP2_GT_WIDTH 164 #define WM831X_DCMP2_GT_WIDTH 1 /* DCMP2_GT */
160 #define WM831X_DCMP2_THR_MASK 165 #define WM831X_DCMP2_THR_MASK 0x0FFF /* DCMP2_THR - [11:0] */
161 #define WM831X_DCMP2_THR_SHIFT 166 #define WM831X_DCMP2_THR_SHIFT 0 /* DCMP2_THR - [11:0] */
162 #define WM831X_DCMP2_THR_WIDTH 167 #define WM831X_DCMP2_THR_WIDTH 12 /* DCMP2_THR - [11:0] */
163 168
164 /* 169 /*
165 * R16435 (0x4033) - Comparator 3 170 * R16435 (0x4033) - Comparator 3
166 */ 171 */
167 #define WM831X_DCMP3_SRC_MASK 172 #define WM831X_DCMP3_SRC_MASK 0xE000 /* DCMP3_SRC - [15:13] */
168 #define WM831X_DCMP3_SRC_SHIFT 173 #define WM831X_DCMP3_SRC_SHIFT 13 /* DCMP3_SRC - [15:13] */
169 #define WM831X_DCMP3_SRC_WIDTH 174 #define WM831X_DCMP3_SRC_WIDTH 3 /* DCMP3_SRC - [15:13] */
170 #define WM831X_DCMP3_GT 175 #define WM831X_DCMP3_GT 0x1000 /* DCMP3_GT */
171 #define WM831X_DCMP3_GT_MASK 176 #define WM831X_DCMP3_GT_MASK 0x1000 /* DCMP3_GT */
172 #define WM831X_DCMP3_GT_SHIFT 177 #define WM831X_DCMP3_GT_SHIFT 12 /* DCMP3_GT */
173 #define WM831X_DCMP3_GT_WIDTH 178 #define WM831X_DCMP3_GT_WIDTH 1 /* DCMP3_GT */
174 #define WM831X_DCMP3_THR_MASK 179 #define WM831X_DCMP3_THR_MASK 0x0FFF /* DCMP3_THR - [11:0] */
175 #define WM831X_DCMP3_THR_SHIFT 180 #define WM831X_DCMP3_THR_SHIFT 0 /* DCMP3_THR - [11:0] */
176 #define WM831X_DCMP3_THR_WIDTH 181 #define WM831X_DCMP3_THR_WIDTH 12 /* DCMP3_THR - [11:0] */
177 182
178 /* 183 /*
179 * R16436 (0x4034) - Comparator 4 184 * R16436 (0x4034) - Comparator 4
180 */ 185 */
181 #define WM831X_DCMP4_SRC_MASK 186 #define WM831X_DCMP4_SRC_MASK 0xE000 /* DCMP4_SRC - [15:13] */
182 #define WM831X_DCMP4_SRC_SHIFT 187 #define WM831X_DCMP4_SRC_SHIFT 13 /* DCMP4_SRC - [15:13] */
183 #define WM831X_DCMP4_SRC_WIDTH 188 #define WM831X_DCMP4_SRC_WIDTH 3 /* DCMP4_SRC - [15:13] */
184 #define WM831X_DCMP4_GT 189 #define WM831X_DCMP4_GT 0x1000 /* DCMP4_GT */
185 #define WM831X_DCMP4_GT_MASK 190 #define WM831X_DCMP4_GT_MASK 0x1000 /* DCMP4_GT */
186 #define WM831X_DCMP4_GT_SHIFT 191 #define WM831X_DCMP4_GT_SHIFT 12 /* DCMP4_GT */
187 #define WM831X_DCMP4_GT_WIDTH 192 #define WM831X_DCMP4_GT_WIDTH 1 /* DCMP4_GT */
188 #define WM831X_DCMP4_THR_MASK 193 #define WM831X_DCMP4_THR_MASK 0x0FFF /* DCMP4_THR - [11:0] */
189 #define WM831X_DCMP4_THR_SHIFT 194 #define WM831X_DCMP4_THR_SHIFT 0 /* DCMP4_THR - [11:0] */
190 #define WM831X_DCMP4_THR_WIDTH 195 #define WM831X_DCMP4_THR_WIDTH 12 /* DCMP4_THR - [11:0] */
191 196
192 #define WM831X_AUX_CAL_FACTOR 0xfff 197 #define WM831X_AUX_CAL_FACTOR 0xfff
193 #define WM831X_AUX_CAL_NOMINAL 0x222 198 #define WM831X_AUX_CAL_NOMINAL 0x222
194 199
195 enum wm831x_auxadc { 200 enum wm831x_auxadc {
196 WM831X_AUX_CAL = 15, 201 WM831X_AUX_CAL = 15,
197 WM831X_AUX_BKUP_BATT = 10, 202 WM831X_AUX_BKUP_BATT = 10,
198 WM831X_AUX_WALL = 9, 203 WM831X_AUX_WALL = 9,
199 WM831X_AUX_BATT = 8, 204 WM831X_AUX_BATT = 8,
200 WM831X_AUX_USB = 7, 205 WM831X_AUX_USB = 7,
201 WM831X_AUX_SYSVDD = 6, 206 WM831X_AUX_SYSVDD = 6,
202 WM831X_AUX_BATT_TEMP = 5, 207 WM831X_AUX_BATT_TEMP = 5,
203 WM831X_AUX_CHIP_TEMP = 4, 208 WM831X_AUX_CHIP_TEMP = 4,
204 WM831X_AUX_AUX4 = 3, 209 WM831X_AUX_AUX4 = 3,
205 WM831X_AUX_AUX3 = 2, 210 WM831X_AUX_AUX3 = 2,
206 WM831X_AUX_AUX2 = 1, 211 WM831X_AUX_AUX2 = 1,
207 WM831X_AUX_AUX1 = 0, 212 WM831X_AUX_AUX1 = 0,
208 }; 213 };
209 214
210 int wm831x_auxadc_read(struct wm831x *wm831x, 215 int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input);
211 int wm831x_auxadc_read_uv(struct wm831x *wm831 216 int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input);
212 217
213 #endif 218 #endif
214 219
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