1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1 2 /* 3 * linux/mfd/wm831x/regulator.h -- Regulator d 4 * 5 * Copyright 2009 Wolfson Microelectronics PLC 6 * 7 * Author: Mark Brown <broonie@opensource.wolf 8 */ 9 10 #ifndef __MFD_WM831X_REGULATOR_H__ 11 #define __MFD_WM831X_REGULATOR_H__ 12 13 /* 14 * R16462 (0x404E) - Current Sink 1 15 */ 16 #define WM831X_CS1_ENA 17 #define WM831X_CS1_ENA_MASK 18 #define WM831X_CS1_ENA_SHIFT 19 #define WM831X_CS1_ENA_WIDTH 20 #define WM831X_CS1_DRIVE 21 #define WM831X_CS1_DRIVE_MASK 22 #define WM831X_CS1_DRIVE_SHIFT 23 #define WM831X_CS1_DRIVE_WIDTH 24 #define WM831X_CS1_SLPENA 25 #define WM831X_CS1_SLPENA_MASK 26 #define WM831X_CS1_SLPENA_SHIFT 27 #define WM831X_CS1_SLPENA_WIDTH 28 #define WM831X_CS1_OFF_RAMP_MASK 29 #define WM831X_CS1_OFF_RAMP_SHIFT 30 #define WM831X_CS1_OFF_RAMP_WIDTH 31 #define WM831X_CS1_ON_RAMP_MASK 32 #define WM831X_CS1_ON_RAMP_SHIFT 33 #define WM831X_CS1_ON_RAMP_WIDTH 34 #define WM831X_CS1_ISEL_MASK 35 #define WM831X_CS1_ISEL_SHIFT 36 #define WM831X_CS1_ISEL_WIDTH 37 38 /* 39 * R16463 (0x404F) - Current Sink 2 40 */ 41 #define WM831X_CS2_ENA 42 #define WM831X_CS2_ENA_MASK 43 #define WM831X_CS2_ENA_SHIFT 44 #define WM831X_CS2_ENA_WIDTH 45 #define WM831X_CS2_DRIVE 46 #define WM831X_CS2_DRIVE_MASK 47 #define WM831X_CS2_DRIVE_SHIFT 48 #define WM831X_CS2_DRIVE_WIDTH 49 #define WM831X_CS2_SLPENA 50 #define WM831X_CS2_SLPENA_MASK 51 #define WM831X_CS2_SLPENA_SHIFT 52 #define WM831X_CS2_SLPENA_WIDTH 53 #define WM831X_CS2_OFF_RAMP_MASK 54 #define WM831X_CS2_OFF_RAMP_SHIFT 55 #define WM831X_CS2_OFF_RAMP_WIDTH 56 #define WM831X_CS2_ON_RAMP_MASK 57 #define WM831X_CS2_ON_RAMP_SHIFT 58 #define WM831X_CS2_ON_RAMP_WIDTH 59 #define WM831X_CS2_ISEL_MASK 60 #define WM831X_CS2_ISEL_SHIFT 61 #define WM831X_CS2_ISEL_WIDTH 62 63 /* 64 * R16464 (0x4050) - DCDC Enable 65 */ 66 #define WM831X_EPE2_ENA 67 #define WM831X_EPE2_ENA_MASK 68 #define WM831X_EPE2_ENA_SHIFT 69 #define WM831X_EPE2_ENA_WIDTH 70 #define WM831X_EPE1_ENA 71 #define WM831X_EPE1_ENA_MASK 72 #define WM831X_EPE1_ENA_SHIFT 73 #define WM831X_EPE1_ENA_WIDTH 74 #define WM831X_DC4_ENA 75 #define WM831X_DC4_ENA_MASK 76 #define WM831X_DC4_ENA_SHIFT 77 #define WM831X_DC4_ENA_WIDTH 78 #define WM831X_DC3_ENA 79 #define WM831X_DC3_ENA_MASK 80 #define WM831X_DC3_ENA_SHIFT 81 #define WM831X_DC3_ENA_WIDTH 82 #define WM831X_DC2_ENA 83 #define WM831X_DC2_ENA_MASK 84 #define WM831X_DC2_ENA_SHIFT 85 #define WM831X_DC2_ENA_WIDTH 86 #define WM831X_DC1_ENA 87 #define WM831X_DC1_ENA_MASK 88 #define WM831X_DC1_ENA_SHIFT 89 #define WM831X_DC1_ENA_WIDTH 90 91 /* 92 * R16465 (0x4051) - LDO Enable 93 */ 94 #define WM831X_LDO11_ENA 95 #define WM831X_LDO11_ENA_MASK 96 #define WM831X_LDO11_ENA_SHIFT 97 #define WM831X_LDO11_ENA_WIDTH 98 #define WM831X_LDO10_ENA 99 #define WM831X_LDO10_ENA_MASK 100 #define WM831X_LDO10_ENA_SHIFT 101 #define WM831X_LDO10_ENA_WIDTH 102 #define WM831X_LDO9_ENA 103 #define WM831X_LDO9_ENA_MASK 104 #define WM831X_LDO9_ENA_SHIFT 105 #define WM831X_LDO9_ENA_WIDTH 106 #define WM831X_LDO8_ENA 107 #define WM831X_LDO8_ENA_MASK 108 #define WM831X_LDO8_ENA_SHIFT 109 #define WM831X_LDO8_ENA_WIDTH 110 #define WM831X_LDO7_ENA 111 #define WM831X_LDO7_ENA_MASK 112 #define WM831X_LDO7_ENA_SHIFT 113 #define WM831X_LDO7_ENA_WIDTH 114 #define WM831X_LDO6_ENA 115 #define WM831X_LDO6_ENA_MASK 116 #define WM831X_LDO6_ENA_SHIFT 117 #define WM831X_LDO6_ENA_WIDTH 118 #define WM831X_LDO5_ENA 119 #define WM831X_LDO5_ENA_MASK 120 #define WM831X_LDO5_ENA_SHIFT 121 #define WM831X_LDO5_ENA_WIDTH 122 #define WM831X_LDO4_ENA 123 #define WM831X_LDO4_ENA_MASK 124 #define WM831X_LDO4_ENA_SHIFT 125 #define WM831X_LDO4_ENA_WIDTH 126 #define WM831X_LDO3_ENA 127 #define WM831X_LDO3_ENA_MASK 128 #define WM831X_LDO3_ENA_SHIFT 129 #define WM831X_LDO3_ENA_WIDTH 130 #define WM831X_LDO2_ENA 131 #define WM831X_LDO2_ENA_MASK 132 #define WM831X_LDO2_ENA_SHIFT 133 #define WM831X_LDO2_ENA_WIDTH 134 #define WM831X_LDO1_ENA 135 #define WM831X_LDO1_ENA_MASK 136 #define WM831X_LDO1_ENA_SHIFT 137 #define WM831X_LDO1_ENA_WIDTH 138 139 /* 140 * R16466 (0x4052) - DCDC Status 141 */ 142 #define WM831X_EPE2_STS 143 #define WM831X_EPE2_STS_MASK 144 #define WM831X_EPE2_STS_SHIFT 145 #define WM831X_EPE2_STS_WIDTH 146 #define WM831X_EPE1_STS 147 #define WM831X_EPE1_STS_MASK 148 #define WM831X_EPE1_STS_SHIFT 149 #define WM831X_EPE1_STS_WIDTH 150 #define WM831X_DC4_STS 151 #define WM831X_DC4_STS_MASK 152 #define WM831X_DC4_STS_SHIFT 153 #define WM831X_DC4_STS_WIDTH 154 #define WM831X_DC3_STS 155 #define WM831X_DC3_STS_MASK 156 #define WM831X_DC3_STS_SHIFT 157 #define WM831X_DC3_STS_WIDTH 158 #define WM831X_DC2_STS 159 #define WM831X_DC2_STS_MASK 160 #define WM831X_DC2_STS_SHIFT 161 #define WM831X_DC2_STS_WIDTH 162 #define WM831X_DC1_STS 163 #define WM831X_DC1_STS_MASK 164 #define WM831X_DC1_STS_SHIFT 165 #define WM831X_DC1_STS_WIDTH 166 167 /* 168 * R16467 (0x4053) - LDO Status 169 */ 170 #define WM831X_LDO11_STS 171 #define WM831X_LDO11_STS_MASK 172 #define WM831X_LDO11_STS_SHIFT 173 #define WM831X_LDO11_STS_WIDTH 174 #define WM831X_LDO10_STS 175 #define WM831X_LDO10_STS_MASK 176 #define WM831X_LDO10_STS_SHIFT 177 #define WM831X_LDO10_STS_WIDTH 178 #define WM831X_LDO9_STS 179 #define WM831X_LDO9_STS_MASK 180 #define WM831X_LDO9_STS_SHIFT 181 #define WM831X_LDO9_STS_WIDTH 182 #define WM831X_LDO8_STS 183 #define WM831X_LDO8_STS_MASK 184 #define WM831X_LDO8_STS_SHIFT 185 #define WM831X_LDO8_STS_WIDTH 186 #define WM831X_LDO7_STS 187 #define WM831X_LDO7_STS_MASK 188 #define WM831X_LDO7_STS_SHIFT 189 #define WM831X_LDO7_STS_WIDTH 190 #define WM831X_LDO6_STS 191 #define WM831X_LDO6_STS_MASK 192 #define WM831X_LDO6_STS_SHIFT 193 #define WM831X_LDO6_STS_WIDTH 194 #define WM831X_LDO5_STS 195 #define WM831X_LDO5_STS_MASK 196 #define WM831X_LDO5_STS_SHIFT 197 #define WM831X_LDO5_STS_WIDTH 198 #define WM831X_LDO4_STS 199 #define WM831X_LDO4_STS_MASK 200 #define WM831X_LDO4_STS_SHIFT 201 #define WM831X_LDO4_STS_WIDTH 202 #define WM831X_LDO3_STS 203 #define WM831X_LDO3_STS_MASK 204 #define WM831X_LDO3_STS_SHIFT 205 #define WM831X_LDO3_STS_WIDTH 206 #define WM831X_LDO2_STS 207 #define WM831X_LDO2_STS_MASK 208 #define WM831X_LDO2_STS_SHIFT 209 #define WM831X_LDO2_STS_WIDTH 210 #define WM831X_LDO1_STS 211 #define WM831X_LDO1_STS_MASK 212 #define WM831X_LDO1_STS_SHIFT 213 #define WM831X_LDO1_STS_WIDTH 214 215 /* 216 * R16468 (0x4054) - DCDC UV Status 217 */ 218 #define WM831X_DC2_OV_STS 219 #define WM831X_DC2_OV_STS_MASK 220 #define WM831X_DC2_OV_STS_SHIFT 221 #define WM831X_DC2_OV_STS_WIDTH 222 #define WM831X_DC1_OV_STS 223 #define WM831X_DC1_OV_STS_MASK 224 #define WM831X_DC1_OV_STS_SHIFT 225 #define WM831X_DC1_OV_STS_WIDTH 226 #define WM831X_DC2_HC_STS 227 #define WM831X_DC2_HC_STS_MASK 228 #define WM831X_DC2_HC_STS_SHIFT 229 #define WM831X_DC2_HC_STS_WIDTH 230 #define WM831X_DC1_HC_STS 231 #define WM831X_DC1_HC_STS_MASK 232 #define WM831X_DC1_HC_STS_SHIFT 233 #define WM831X_DC1_HC_STS_WIDTH 234 #define WM831X_DC4_UV_STS 235 #define WM831X_DC4_UV_STS_MASK 236 #define WM831X_DC4_UV_STS_SHIFT 237 #define WM831X_DC4_UV_STS_WIDTH 238 #define WM831X_DC3_UV_STS 239 #define WM831X_DC3_UV_STS_MASK 240 #define WM831X_DC3_UV_STS_SHIFT 241 #define WM831X_DC3_UV_STS_WIDTH 242 #define WM831X_DC2_UV_STS 243 #define WM831X_DC2_UV_STS_MASK 244 #define WM831X_DC2_UV_STS_SHIFT 245 #define WM831X_DC2_UV_STS_WIDTH 246 #define WM831X_DC1_UV_STS 247 #define WM831X_DC1_UV_STS_MASK 248 #define WM831X_DC1_UV_STS_SHIFT 249 #define WM831X_DC1_UV_STS_WIDTH 250 251 /* 252 * R16469 (0x4055) - LDO UV Status 253 */ 254 #define WM831X_INTLDO_UV_STS 255 #define WM831X_INTLDO_UV_STS_MASK 256 #define WM831X_INTLDO_UV_STS_SHIFT 257 #define WM831X_INTLDO_UV_STS_WIDTH 258 #define WM831X_LDO10_UV_STS 259 #define WM831X_LDO10_UV_STS_MASK 260 #define WM831X_LDO10_UV_STS_SHIFT 261 #define WM831X_LDO10_UV_STS_WIDTH 262 #define WM831X_LDO9_UV_STS 263 #define WM831X_LDO9_UV_STS_MASK 264 #define WM831X_LDO9_UV_STS_SHIFT 265 #define WM831X_LDO9_UV_STS_WIDTH 266 #define WM831X_LDO8_UV_STS 267 #define WM831X_LDO8_UV_STS_MASK 268 #define WM831X_LDO8_UV_STS_SHIFT 269 #define WM831X_LDO8_UV_STS_WIDTH 270 #define WM831X_LDO7_UV_STS 271 #define WM831X_LDO7_UV_STS_MASK 272 #define WM831X_LDO7_UV_STS_SHIFT 273 #define WM831X_LDO7_UV_STS_WIDTH 274 #define WM831X_LDO6_UV_STS 275 #define WM831X_LDO6_UV_STS_MASK 276 #define WM831X_LDO6_UV_STS_SHIFT 277 #define WM831X_LDO6_UV_STS_WIDTH 278 #define WM831X_LDO5_UV_STS 279 #define WM831X_LDO5_UV_STS_MASK 280 #define WM831X_LDO5_UV_STS_SHIFT 281 #define WM831X_LDO5_UV_STS_WIDTH 282 #define WM831X_LDO4_UV_STS 283 #define WM831X_LDO4_UV_STS_MASK 284 #define WM831X_LDO4_UV_STS_SHIFT 285 #define WM831X_LDO4_UV_STS_WIDTH 286 #define WM831X_LDO3_UV_STS 287 #define WM831X_LDO3_UV_STS_MASK 288 #define WM831X_LDO3_UV_STS_SHIFT 289 #define WM831X_LDO3_UV_STS_WIDTH 290 #define WM831X_LDO2_UV_STS 291 #define WM831X_LDO2_UV_STS_MASK 292 #define WM831X_LDO2_UV_STS_SHIFT 293 #define WM831X_LDO2_UV_STS_WIDTH 294 #define WM831X_LDO1_UV_STS 295 #define WM831X_LDO1_UV_STS_MASK 296 #define WM831X_LDO1_UV_STS_SHIFT 297 #define WM831X_LDO1_UV_STS_WIDTH 298 299 /* 300 * R16470 (0x4056) - DC1 Control 1 301 */ 302 #define WM831X_DC1_RATE_MASK 303 #define WM831X_DC1_RATE_SHIFT 304 #define WM831X_DC1_RATE_WIDTH 305 #define WM831X_DC1_PHASE 306 #define WM831X_DC1_PHASE_MASK 307 #define WM831X_DC1_PHASE_SHIFT 308 #define WM831X_DC1_PHASE_WIDTH 309 #define WM831X_DC1_FREQ_MASK 310 #define WM831X_DC1_FREQ_SHIFT 311 #define WM831X_DC1_FREQ_WIDTH 312 #define WM831X_DC1_FLT 313 #define WM831X_DC1_FLT_MASK 314 #define WM831X_DC1_FLT_SHIFT 315 #define WM831X_DC1_FLT_WIDTH 316 #define WM831X_DC1_SOFT_START_MASK 317 #define WM831X_DC1_SOFT_START_SHIFT 318 #define WM831X_DC1_SOFT_START_WIDTH 319 #define WM831X_DC1_CAP_MASK 320 #define WM831X_DC1_CAP_SHIFT 321 #define WM831X_DC1_CAP_WIDTH 322 323 /* 324 * R16471 (0x4057) - DC1 Control 2 325 */ 326 #define WM831X_DC1_ERR_ACT_MASK 327 #define WM831X_DC1_ERR_ACT_SHIFT 328 #define WM831X_DC1_ERR_ACT_WIDTH 329 #define WM831X_DC1_HWC_SRC_MASK 330 #define WM831X_DC1_HWC_SRC_SHIFT 331 #define WM831X_DC1_HWC_SRC_WIDTH 332 #define WM831X_DC1_HWC_VSEL 333 #define WM831X_DC1_HWC_VSEL_MASK 334 #define WM831X_DC1_HWC_VSEL_SHIFT 335 #define WM831X_DC1_HWC_VSEL_WIDTH 336 #define WM831X_DC1_HWC_MODE_MASK 337 #define WM831X_DC1_HWC_MODE_SHIFT 338 #define WM831X_DC1_HWC_MODE_WIDTH 339 #define WM831X_DC1_HC_THR_MASK 340 #define WM831X_DC1_HC_THR_SHIFT 341 #define WM831X_DC1_HC_THR_WIDTH 342 #define WM831X_DC1_HC_IND_ENA 343 #define WM831X_DC1_HC_IND_ENA_MASK 344 #define WM831X_DC1_HC_IND_ENA_SHIFT 345 #define WM831X_DC1_HC_IND_ENA_WIDTH 346 347 /* 348 * R16472 (0x4058) - DC1 ON Config 349 */ 350 #define WM831X_DC1_ON_SLOT_MASK 351 #define WM831X_DC1_ON_SLOT_SHIFT 352 #define WM831X_DC1_ON_SLOT_WIDTH 353 #define WM831X_DC1_ON_MODE_MASK 354 #define WM831X_DC1_ON_MODE_SHIFT 355 #define WM831X_DC1_ON_MODE_WIDTH 356 #define WM831X_DC1_ON_VSEL_MASK 357 #define WM831X_DC1_ON_VSEL_SHIFT 358 #define WM831X_DC1_ON_VSEL_WIDTH 359 360 /* 361 * R16473 (0x4059) - DC1 SLEEP Control 362 */ 363 #define WM831X_DC1_SLP_SLOT_MASK 364 #define WM831X_DC1_SLP_SLOT_SHIFT 365 #define WM831X_DC1_SLP_SLOT_WIDTH 366 #define WM831X_DC1_SLP_MODE_MASK 367 #define WM831X_DC1_SLP_MODE_SHIFT 368 #define WM831X_DC1_SLP_MODE_WIDTH 369 #define WM831X_DC1_SLP_VSEL_MASK 370 #define WM831X_DC1_SLP_VSEL_SHIFT 371 #define WM831X_DC1_SLP_VSEL_WIDTH 372 373 /* 374 * R16474 (0x405A) - DC1 DVS Control 375 */ 376 #define WM831X_DC1_DVS_SRC_MASK 377 #define WM831X_DC1_DVS_SRC_SHIFT 378 #define WM831X_DC1_DVS_SRC_WIDTH 379 #define WM831X_DC1_DVS_VSEL_MASK 380 #define WM831X_DC1_DVS_VSEL_SHIFT 381 #define WM831X_DC1_DVS_VSEL_WIDTH 382 383 /* 384 * R16475 (0x405B) - DC2 Control 1 385 */ 386 #define WM831X_DC2_RATE_MASK 387 #define WM831X_DC2_RATE_SHIFT 388 #define WM831X_DC2_RATE_WIDTH 389 #define WM831X_DC2_PHASE 390 #define WM831X_DC2_PHASE_MASK 391 #define WM831X_DC2_PHASE_SHIFT 392 #define WM831X_DC2_PHASE_WIDTH 393 #define WM831X_DC2_FREQ_MASK 394 #define WM831X_DC2_FREQ_SHIFT 395 #define WM831X_DC2_FREQ_WIDTH 396 #define WM831X_DC2_FLT 397 #define WM831X_DC2_FLT_MASK 398 #define WM831X_DC2_FLT_SHIFT 399 #define WM831X_DC2_FLT_WIDTH 400 #define WM831X_DC2_SOFT_START_MASK 401 #define WM831X_DC2_SOFT_START_SHIFT 402 #define WM831X_DC2_SOFT_START_WIDTH 403 #define WM831X_DC2_CAP_MASK 404 #define WM831X_DC2_CAP_SHIFT 405 #define WM831X_DC2_CAP_WIDTH 406 407 /* 408 * R16476 (0x405C) - DC2 Control 2 409 */ 410 #define WM831X_DC2_ERR_ACT_MASK 411 #define WM831X_DC2_ERR_ACT_SHIFT 412 #define WM831X_DC2_ERR_ACT_WIDTH 413 #define WM831X_DC2_HWC_SRC_MASK 414 #define WM831X_DC2_HWC_SRC_SHIFT 415 #define WM831X_DC2_HWC_SRC_WIDTH 416 #define WM831X_DC2_HWC_VSEL 417 #define WM831X_DC2_HWC_VSEL_MASK 418 #define WM831X_DC2_HWC_VSEL_SHIFT 419 #define WM831X_DC2_HWC_VSEL_WIDTH 420 #define WM831X_DC2_HWC_MODE_MASK 421 #define WM831X_DC2_HWC_MODE_SHIFT 422 #define WM831X_DC2_HWC_MODE_WIDTH 423 #define WM831X_DC2_HC_THR_MASK 424 #define WM831X_DC2_HC_THR_SHIFT 425 #define WM831X_DC2_HC_THR_WIDTH 426 #define WM831X_DC2_HC_IND_ENA 427 #define WM831X_DC2_HC_IND_ENA_MASK 428 #define WM831X_DC2_HC_IND_ENA_SHIFT 429 #define WM831X_DC2_HC_IND_ENA_WIDTH 430 431 /* 432 * R16477 (0x405D) - DC2 ON Config 433 */ 434 #define WM831X_DC2_ON_SLOT_MASK 435 #define WM831X_DC2_ON_SLOT_SHIFT 436 #define WM831X_DC2_ON_SLOT_WIDTH 437 #define WM831X_DC2_ON_MODE_MASK 438 #define WM831X_DC2_ON_MODE_SHIFT 439 #define WM831X_DC2_ON_MODE_WIDTH 440 #define WM831X_DC2_ON_VSEL_MASK 441 #define WM831X_DC2_ON_VSEL_SHIFT 442 #define WM831X_DC2_ON_VSEL_WIDTH 443 444 /* 445 * R16478 (0x405E) - DC2 SLEEP Control 446 */ 447 #define WM831X_DC2_SLP_SLOT_MASK 448 #define WM831X_DC2_SLP_SLOT_SHIFT 449 #define WM831X_DC2_SLP_SLOT_WIDTH 450 #define WM831X_DC2_SLP_MODE_MASK 451 #define WM831X_DC2_SLP_MODE_SHIFT 452 #define WM831X_DC2_SLP_MODE_WIDTH 453 #define WM831X_DC2_SLP_VSEL_MASK 454 #define WM831X_DC2_SLP_VSEL_SHIFT 455 #define WM831X_DC2_SLP_VSEL_WIDTH 456 457 /* 458 * R16479 (0x405F) - DC2 DVS Control 459 */ 460 #define WM831X_DC2_DVS_SRC_MASK 461 #define WM831X_DC2_DVS_SRC_SHIFT 462 #define WM831X_DC2_DVS_SRC_WIDTH 463 #define WM831X_DC2_DVS_VSEL_MASK 464 #define WM831X_DC2_DVS_VSEL_SHIFT 465 #define WM831X_DC2_DVS_VSEL_WIDTH 466 467 /* 468 * R16480 (0x4060) - DC3 Control 1 469 */ 470 #define WM831X_DC3_PHASE 471 #define WM831X_DC3_PHASE_MASK 472 #define WM831X_DC3_PHASE_SHIFT 473 #define WM831X_DC3_PHASE_WIDTH 474 #define WM831X_DC3_FLT 475 #define WM831X_DC3_FLT_MASK 476 #define WM831X_DC3_FLT_SHIFT 477 #define WM831X_DC3_FLT_WIDTH 478 #define WM831X_DC3_SOFT_START_MASK 479 #define WM831X_DC3_SOFT_START_SHIFT 480 #define WM831X_DC3_SOFT_START_WIDTH 481 #define WM831X_DC3_STNBY_LIM_MASK 482 #define WM831X_DC3_STNBY_LIM_SHIFT 483 #define WM831X_DC3_STNBY_LIM_WIDTH 484 #define WM831X_DC3_CAP_MASK 485 #define WM831X_DC3_CAP_SHIFT 486 #define WM831X_DC3_CAP_WIDTH 487 488 /* 489 * R16481 (0x4061) - DC3 Control 2 490 */ 491 #define WM831X_DC3_ERR_ACT_MASK 492 #define WM831X_DC3_ERR_ACT_SHIFT 493 #define WM831X_DC3_ERR_ACT_WIDTH 494 #define WM831X_DC3_HWC_SRC_MASK 495 #define WM831X_DC3_HWC_SRC_SHIFT 496 #define WM831X_DC3_HWC_SRC_WIDTH 497 #define WM831X_DC3_HWC_VSEL 498 #define WM831X_DC3_HWC_VSEL_MASK 499 #define WM831X_DC3_HWC_VSEL_SHIFT 500 #define WM831X_DC3_HWC_VSEL_WIDTH 501 #define WM831X_DC3_HWC_MODE_MASK 502 #define WM831X_DC3_HWC_MODE_SHIFT 503 #define WM831X_DC3_HWC_MODE_WIDTH 504 #define WM831X_DC3_OVP 505 #define WM831X_DC3_OVP_MASK 506 #define WM831X_DC3_OVP_SHIFT 507 #define WM831X_DC3_OVP_WIDTH 508 509 /* 510 * R16482 (0x4062) - DC3 ON Config 511 */ 512 #define WM831X_DC3_ON_SLOT_MASK 513 #define WM831X_DC3_ON_SLOT_SHIFT 514 #define WM831X_DC3_ON_SLOT_WIDTH 515 #define WM831X_DC3_ON_MODE_MASK 516 #define WM831X_DC3_ON_MODE_SHIFT 517 #define WM831X_DC3_ON_MODE_WIDTH 518 #define WM831X_DC3_ON_VSEL_MASK 519 #define WM831X_DC3_ON_VSEL_SHIFT 520 #define WM831X_DC3_ON_VSEL_WIDTH 521 522 /* 523 * R16483 (0x4063) - DC3 SLEEP Control 524 */ 525 #define WM831X_DC3_SLP_SLOT_MASK 526 #define WM831X_DC3_SLP_SLOT_SHIFT 527 #define WM831X_DC3_SLP_SLOT_WIDTH 528 #define WM831X_DC3_SLP_MODE_MASK 529 #define WM831X_DC3_SLP_MODE_SHIFT 530 #define WM831X_DC3_SLP_MODE_WIDTH 531 #define WM831X_DC3_SLP_VSEL_MASK 532 #define WM831X_DC3_SLP_VSEL_SHIFT 533 #define WM831X_DC3_SLP_VSEL_WIDTH 534 535 /* 536 * R16484 (0x4064) - DC4 Control 537 */ 538 #define WM831X_DC4_ERR_ACT_MASK 539 #define WM831X_DC4_ERR_ACT_SHIFT 540 #define WM831X_DC4_ERR_ACT_WIDTH 541 #define WM831X_DC4_HWC_SRC_MASK 542 #define WM831X_DC4_HWC_SRC_SHIFT 543 #define WM831X_DC4_HWC_SRC_WIDTH 544 #define WM831X_DC4_HWC_MODE 545 #define WM831X_DC4_HWC_MODE_MASK 546 #define WM831X_DC4_HWC_MODE_SHIFT 547 #define WM831X_DC4_HWC_MODE_WIDTH 548 #define WM831X_DC4_RANGE_MASK 549 #define WM831X_DC4_RANGE_SHIFT 550 #define WM831X_DC4_RANGE_WIDTH 551 #define WM831X_DC4_FBSRC 552 #define WM831X_DC4_FBSRC_MASK 553 #define WM831X_DC4_FBSRC_SHIFT 554 #define WM831X_DC4_FBSRC_WIDTH 555 556 /* 557 * R16485 (0x4065) - DC4 SLEEP Control 558 */ 559 #define WM831X_DC4_SLPENA 560 #define WM831X_DC4_SLPENA_MASK 561 #define WM831X_DC4_SLPENA_SHIFT 562 #define WM831X_DC4_SLPENA_WIDTH 563 564 /* 565 * R16488 (0x4068) - LDO1 Control 566 */ 567 #define WM831X_LDO1_ERR_ACT_MASK 568 #define WM831X_LDO1_ERR_ACT_SHIFT 569 #define WM831X_LDO1_ERR_ACT_WIDTH 570 #define WM831X_LDO1_HWC_SRC_MASK 571 #define WM831X_LDO1_HWC_SRC_SHIFT 572 #define WM831X_LDO1_HWC_SRC_WIDTH 573 #define WM831X_LDO1_HWC_VSEL 574 #define WM831X_LDO1_HWC_VSEL_MASK 575 #define WM831X_LDO1_HWC_VSEL_SHIFT 576 #define WM831X_LDO1_HWC_VSEL_WIDTH 577 #define WM831X_LDO1_HWC_MODE_MASK 578 #define WM831X_LDO1_HWC_MODE_SHIFT 579 #define WM831X_LDO1_HWC_MODE_WIDTH 580 #define WM831X_LDO1_FLT 581 #define WM831X_LDO1_FLT_MASK 582 #define WM831X_LDO1_FLT_SHIFT 583 #define WM831X_LDO1_FLT_WIDTH 584 #define WM831X_LDO1_SWI 585 #define WM831X_LDO1_SWI_MASK 586 #define WM831X_LDO1_SWI_SHIFT 587 #define WM831X_LDO1_SWI_WIDTH 588 #define WM831X_LDO1_LP_MODE 589 #define WM831X_LDO1_LP_MODE_MASK 590 #define WM831X_LDO1_LP_MODE_SHIFT 591 #define WM831X_LDO1_LP_MODE_WIDTH 592 593 /* 594 * R16489 (0x4069) - LDO1 ON Control 595 */ 596 #define WM831X_LDO1_ON_SLOT_MASK 597 #define WM831X_LDO1_ON_SLOT_SHIFT 598 #define WM831X_LDO1_ON_SLOT_WIDTH 599 #define WM831X_LDO1_ON_MODE 600 #define WM831X_LDO1_ON_MODE_MASK 601 #define WM831X_LDO1_ON_MODE_SHIFT 602 #define WM831X_LDO1_ON_MODE_WIDTH 603 #define WM831X_LDO1_ON_VSEL_MASK 604 #define WM831X_LDO1_ON_VSEL_SHIFT 605 #define WM831X_LDO1_ON_VSEL_WIDTH 606 607 /* 608 * R16490 (0x406A) - LDO1 SLEEP Control 609 */ 610 #define WM831X_LDO1_SLP_SLOT_MASK 611 #define WM831X_LDO1_SLP_SLOT_SHIFT 612 #define WM831X_LDO1_SLP_SLOT_WIDTH 613 #define WM831X_LDO1_SLP_MODE 614 #define WM831X_LDO1_SLP_MODE_MASK 615 #define WM831X_LDO1_SLP_MODE_SHIFT 616 #define WM831X_LDO1_SLP_MODE_WIDTH 617 #define WM831X_LDO1_SLP_VSEL_MASK 618 #define WM831X_LDO1_SLP_VSEL_SHIFT 619 #define WM831X_LDO1_SLP_VSEL_WIDTH 620 621 /* 622 * R16491 (0x406B) - LDO2 Control 623 */ 624 #define WM831X_LDO2_ERR_ACT_MASK 625 #define WM831X_LDO2_ERR_ACT_SHIFT 626 #define WM831X_LDO2_ERR_ACT_WIDTH 627 #define WM831X_LDO2_HWC_SRC_MASK 628 #define WM831X_LDO2_HWC_SRC_SHIFT 629 #define WM831X_LDO2_HWC_SRC_WIDTH 630 #define WM831X_LDO2_HWC_VSEL 631 #define WM831X_LDO2_HWC_VSEL_MASK 632 #define WM831X_LDO2_HWC_VSEL_SHIFT 633 #define WM831X_LDO2_HWC_VSEL_WIDTH 634 #define WM831X_LDO2_HWC_MODE_MASK 635 #define WM831X_LDO2_HWC_MODE_SHIFT 636 #define WM831X_LDO2_HWC_MODE_WIDTH 637 #define WM831X_LDO2_FLT 638 #define WM831X_LDO2_FLT_MASK 639 #define WM831X_LDO2_FLT_SHIFT 640 #define WM831X_LDO2_FLT_WIDTH 641 #define WM831X_LDO2_SWI 642 #define WM831X_LDO2_SWI_MASK 643 #define WM831X_LDO2_SWI_SHIFT 644 #define WM831X_LDO2_SWI_WIDTH 645 #define WM831X_LDO2_LP_MODE 646 #define WM831X_LDO2_LP_MODE_MASK 647 #define WM831X_LDO2_LP_MODE_SHIFT 648 #define WM831X_LDO2_LP_MODE_WIDTH 649 650 /* 651 * R16492 (0x406C) - LDO2 ON Control 652 */ 653 #define WM831X_LDO2_ON_SLOT_MASK 654 #define WM831X_LDO2_ON_SLOT_SHIFT 655 #define WM831X_LDO2_ON_SLOT_WIDTH 656 #define WM831X_LDO2_ON_MODE 657 #define WM831X_LDO2_ON_MODE_MASK 658 #define WM831X_LDO2_ON_MODE_SHIFT 659 #define WM831X_LDO2_ON_MODE_WIDTH 660 #define WM831X_LDO2_ON_VSEL_MASK 661 #define WM831X_LDO2_ON_VSEL_SHIFT 662 #define WM831X_LDO2_ON_VSEL_WIDTH 663 664 /* 665 * R16493 (0x406D) - LDO2 SLEEP Control 666 */ 667 #define WM831X_LDO2_SLP_SLOT_MASK 668 #define WM831X_LDO2_SLP_SLOT_SHIFT 669 #define WM831X_LDO2_SLP_SLOT_WIDTH 670 #define WM831X_LDO2_SLP_MODE 671 #define WM831X_LDO2_SLP_MODE_MASK 672 #define WM831X_LDO2_SLP_MODE_SHIFT 673 #define WM831X_LDO2_SLP_MODE_WIDTH 674 #define WM831X_LDO2_SLP_VSEL_MASK 675 #define WM831X_LDO2_SLP_VSEL_SHIFT 676 #define WM831X_LDO2_SLP_VSEL_WIDTH 677 678 /* 679 * R16494 (0x406E) - LDO3 Control 680 */ 681 #define WM831X_LDO3_ERR_ACT_MASK 682 #define WM831X_LDO3_ERR_ACT_SHIFT 683 #define WM831X_LDO3_ERR_ACT_WIDTH 684 #define WM831X_LDO3_HWC_SRC_MASK 685 #define WM831X_LDO3_HWC_SRC_SHIFT 686 #define WM831X_LDO3_HWC_SRC_WIDTH 687 #define WM831X_LDO3_HWC_VSEL 688 #define WM831X_LDO3_HWC_VSEL_MASK 689 #define WM831X_LDO3_HWC_VSEL_SHIFT 690 #define WM831X_LDO3_HWC_VSEL_WIDTH 691 #define WM831X_LDO3_HWC_MODE_MASK 692 #define WM831X_LDO3_HWC_MODE_SHIFT 693 #define WM831X_LDO3_HWC_MODE_WIDTH 694 #define WM831X_LDO3_FLT 695 #define WM831X_LDO3_FLT_MASK 696 #define WM831X_LDO3_FLT_SHIFT 697 #define WM831X_LDO3_FLT_WIDTH 698 #define WM831X_LDO3_SWI 699 #define WM831X_LDO3_SWI_MASK 700 #define WM831X_LDO3_SWI_SHIFT 701 #define WM831X_LDO3_SWI_WIDTH 702 #define WM831X_LDO3_LP_MODE 703 #define WM831X_LDO3_LP_MODE_MASK 704 #define WM831X_LDO3_LP_MODE_SHIFT 705 #define WM831X_LDO3_LP_MODE_WIDTH 706 707 /* 708 * R16495 (0x406F) - LDO3 ON Control 709 */ 710 #define WM831X_LDO3_ON_SLOT_MASK 711 #define WM831X_LDO3_ON_SLOT_SHIFT 712 #define WM831X_LDO3_ON_SLOT_WIDTH 713 #define WM831X_LDO3_ON_MODE 714 #define WM831X_LDO3_ON_MODE_MASK 715 #define WM831X_LDO3_ON_MODE_SHIFT 716 #define WM831X_LDO3_ON_MODE_WIDTH 717 #define WM831X_LDO3_ON_VSEL_MASK 718 #define WM831X_LDO3_ON_VSEL_SHIFT 719 #define WM831X_LDO3_ON_VSEL_WIDTH 720 721 /* 722 * R16496 (0x4070) - LDO3 SLEEP Control 723 */ 724 #define WM831X_LDO3_SLP_SLOT_MASK 725 #define WM831X_LDO3_SLP_SLOT_SHIFT 726 #define WM831X_LDO3_SLP_SLOT_WIDTH 727 #define WM831X_LDO3_SLP_MODE 728 #define WM831X_LDO3_SLP_MODE_MASK 729 #define WM831X_LDO3_SLP_MODE_SHIFT 730 #define WM831X_LDO3_SLP_MODE_WIDTH 731 #define WM831X_LDO3_SLP_VSEL_MASK 732 #define WM831X_LDO3_SLP_VSEL_SHIFT 733 #define WM831X_LDO3_SLP_VSEL_WIDTH 734 735 /* 736 * R16497 (0x4071) - LDO4 Control 737 */ 738 #define WM831X_LDO4_ERR_ACT_MASK 739 #define WM831X_LDO4_ERR_ACT_SHIFT 740 #define WM831X_LDO4_ERR_ACT_WIDTH 741 #define WM831X_LDO4_HWC_SRC_MASK 742 #define WM831X_LDO4_HWC_SRC_SHIFT 743 #define WM831X_LDO4_HWC_SRC_WIDTH 744 #define WM831X_LDO4_HWC_VSEL 745 #define WM831X_LDO4_HWC_VSEL_MASK 746 #define WM831X_LDO4_HWC_VSEL_SHIFT 747 #define WM831X_LDO4_HWC_VSEL_WIDTH 748 #define WM831X_LDO4_HWC_MODE_MASK 749 #define WM831X_LDO4_HWC_MODE_SHIFT 750 #define WM831X_LDO4_HWC_MODE_WIDTH 751 #define WM831X_LDO4_FLT 752 #define WM831X_LDO4_FLT_MASK 753 #define WM831X_LDO4_FLT_SHIFT 754 #define WM831X_LDO4_FLT_WIDTH 755 #define WM831X_LDO4_SWI 756 #define WM831X_LDO4_SWI_MASK 757 #define WM831X_LDO4_SWI_SHIFT 758 #define WM831X_LDO4_SWI_WIDTH 759 #define WM831X_LDO4_LP_MODE 760 #define WM831X_LDO4_LP_MODE_MASK 761 #define WM831X_LDO4_LP_MODE_SHIFT 762 #define WM831X_LDO4_LP_MODE_WIDTH 763 764 /* 765 * R16498 (0x4072) - LDO4 ON Control 766 */ 767 #define WM831X_LDO4_ON_SLOT_MASK 768 #define WM831X_LDO4_ON_SLOT_SHIFT 769 #define WM831X_LDO4_ON_SLOT_WIDTH 770 #define WM831X_LDO4_ON_MODE 771 #define WM831X_LDO4_ON_MODE_MASK 772 #define WM831X_LDO4_ON_MODE_SHIFT 773 #define WM831X_LDO4_ON_MODE_WIDTH 774 #define WM831X_LDO4_ON_VSEL_MASK 775 #define WM831X_LDO4_ON_VSEL_SHIFT 776 #define WM831X_LDO4_ON_VSEL_WIDTH 777 778 /* 779 * R16499 (0x4073) - LDO4 SLEEP Control 780 */ 781 #define WM831X_LDO4_SLP_SLOT_MASK 782 #define WM831X_LDO4_SLP_SLOT_SHIFT 783 #define WM831X_LDO4_SLP_SLOT_WIDTH 784 #define WM831X_LDO4_SLP_MODE 785 #define WM831X_LDO4_SLP_MODE_MASK 786 #define WM831X_LDO4_SLP_MODE_SHIFT 787 #define WM831X_LDO4_SLP_MODE_WIDTH 788 #define WM831X_LDO4_SLP_VSEL_MASK 789 #define WM831X_LDO4_SLP_VSEL_SHIFT 790 #define WM831X_LDO4_SLP_VSEL_WIDTH 791 792 /* 793 * R16500 (0x4074) - LDO5 Control 794 */ 795 #define WM831X_LDO5_ERR_ACT_MASK 796 #define WM831X_LDO5_ERR_ACT_SHIFT 797 #define WM831X_LDO5_ERR_ACT_WIDTH 798 #define WM831X_LDO5_HWC_SRC_MASK 799 #define WM831X_LDO5_HWC_SRC_SHIFT 800 #define WM831X_LDO5_HWC_SRC_WIDTH 801 #define WM831X_LDO5_HWC_VSEL 802 #define WM831X_LDO5_HWC_VSEL_MASK 803 #define WM831X_LDO5_HWC_VSEL_SHIFT 804 #define WM831X_LDO5_HWC_VSEL_WIDTH 805 #define WM831X_LDO5_HWC_MODE_MASK 806 #define WM831X_LDO5_HWC_MODE_SHIFT 807 #define WM831X_LDO5_HWC_MODE_WIDTH 808 #define WM831X_LDO5_FLT 809 #define WM831X_LDO5_FLT_MASK 810 #define WM831X_LDO5_FLT_SHIFT 811 #define WM831X_LDO5_FLT_WIDTH 812 #define WM831X_LDO5_SWI 813 #define WM831X_LDO5_SWI_MASK 814 #define WM831X_LDO5_SWI_SHIFT 815 #define WM831X_LDO5_SWI_WIDTH 816 #define WM831X_LDO5_LP_MODE 817 #define WM831X_LDO5_LP_MODE_MASK 818 #define WM831X_LDO5_LP_MODE_SHIFT 819 #define WM831X_LDO5_LP_MODE_WIDTH 820 821 /* 822 * R16501 (0x4075) - LDO5 ON Control 823 */ 824 #define WM831X_LDO5_ON_SLOT_MASK 825 #define WM831X_LDO5_ON_SLOT_SHIFT 826 #define WM831X_LDO5_ON_SLOT_WIDTH 827 #define WM831X_LDO5_ON_MODE 828 #define WM831X_LDO5_ON_MODE_MASK 829 #define WM831X_LDO5_ON_MODE_SHIFT 830 #define WM831X_LDO5_ON_MODE_WIDTH 831 #define WM831X_LDO5_ON_VSEL_MASK 832 #define WM831X_LDO5_ON_VSEL_SHIFT 833 #define WM831X_LDO5_ON_VSEL_WIDTH 834 835 /* 836 * R16502 (0x4076) - LDO5 SLEEP Control 837 */ 838 #define WM831X_LDO5_SLP_SLOT_MASK 839 #define WM831X_LDO5_SLP_SLOT_SHIFT 840 #define WM831X_LDO5_SLP_SLOT_WIDTH 841 #define WM831X_LDO5_SLP_MODE 842 #define WM831X_LDO5_SLP_MODE_MASK 843 #define WM831X_LDO5_SLP_MODE_SHIFT 844 #define WM831X_LDO5_SLP_MODE_WIDTH 845 #define WM831X_LDO5_SLP_VSEL_MASK 846 #define WM831X_LDO5_SLP_VSEL_SHIFT 847 #define WM831X_LDO5_SLP_VSEL_WIDTH 848 849 /* 850 * R16503 (0x4077) - LDO6 Control 851 */ 852 #define WM831X_LDO6_ERR_ACT_MASK 853 #define WM831X_LDO6_ERR_ACT_SHIFT 854 #define WM831X_LDO6_ERR_ACT_WIDTH 855 #define WM831X_LDO6_HWC_SRC_MASK 856 #define WM831X_LDO6_HWC_SRC_SHIFT 857 #define WM831X_LDO6_HWC_SRC_WIDTH 858 #define WM831X_LDO6_HWC_VSEL 859 #define WM831X_LDO6_HWC_VSEL_MASK 860 #define WM831X_LDO6_HWC_VSEL_SHIFT 861 #define WM831X_LDO6_HWC_VSEL_WIDTH 862 #define WM831X_LDO6_HWC_MODE_MASK 863 #define WM831X_LDO6_HWC_MODE_SHIFT 864 #define WM831X_LDO6_HWC_MODE_WIDTH 865 #define WM831X_LDO6_FLT 866 #define WM831X_LDO6_FLT_MASK 867 #define WM831X_LDO6_FLT_SHIFT 868 #define WM831X_LDO6_FLT_WIDTH 869 #define WM831X_LDO6_SWI 870 #define WM831X_LDO6_SWI_MASK 871 #define WM831X_LDO6_SWI_SHIFT 872 #define WM831X_LDO6_SWI_WIDTH 873 #define WM831X_LDO6_LP_MODE 874 #define WM831X_LDO6_LP_MODE_MASK 875 #define WM831X_LDO6_LP_MODE_SHIFT 876 #define WM831X_LDO6_LP_MODE_WIDTH 877 878 /* 879 * R16504 (0x4078) - LDO6 ON Control 880 */ 881 #define WM831X_LDO6_ON_SLOT_MASK 882 #define WM831X_LDO6_ON_SLOT_SHIFT 883 #define WM831X_LDO6_ON_SLOT_WIDTH 884 #define WM831X_LDO6_ON_MODE 885 #define WM831X_LDO6_ON_MODE_MASK 886 #define WM831X_LDO6_ON_MODE_SHIFT 887 #define WM831X_LDO6_ON_MODE_WIDTH 888 #define WM831X_LDO6_ON_VSEL_MASK 889 #define WM831X_LDO6_ON_VSEL_SHIFT 890 #define WM831X_LDO6_ON_VSEL_WIDTH 891 892 /* 893 * R16505 (0x4079) - LDO6 SLEEP Control 894 */ 895 #define WM831X_LDO6_SLP_SLOT_MASK 896 #define WM831X_LDO6_SLP_SLOT_SHIFT 897 #define WM831X_LDO6_SLP_SLOT_WIDTH 898 #define WM831X_LDO6_SLP_MODE 899 #define WM831X_LDO6_SLP_MODE_MASK 900 #define WM831X_LDO6_SLP_MODE_SHIFT 901 #define WM831X_LDO6_SLP_MODE_WIDTH 902 #define WM831X_LDO6_SLP_VSEL_MASK 903 #define WM831X_LDO6_SLP_VSEL_SHIFT 904 #define WM831X_LDO6_SLP_VSEL_WIDTH 905 906 /* 907 * R16506 (0x407A) - LDO7 Control 908 */ 909 #define WM831X_LDO7_ERR_ACT_MASK 910 #define WM831X_LDO7_ERR_ACT_SHIFT 911 #define WM831X_LDO7_ERR_ACT_WIDTH 912 #define WM831X_LDO7_HWC_SRC_MASK 913 #define WM831X_LDO7_HWC_SRC_SHIFT 914 #define WM831X_LDO7_HWC_SRC_WIDTH 915 #define WM831X_LDO7_HWC_VSEL 916 #define WM831X_LDO7_HWC_VSEL_MASK 917 #define WM831X_LDO7_HWC_VSEL_SHIFT 918 #define WM831X_LDO7_HWC_VSEL_WIDTH 919 #define WM831X_LDO7_HWC_MODE_MASK 920 #define WM831X_LDO7_HWC_MODE_SHIFT 921 #define WM831X_LDO7_HWC_MODE_WIDTH 922 #define WM831X_LDO7_FLT 923 #define WM831X_LDO7_FLT_MASK 924 #define WM831X_LDO7_FLT_SHIFT 925 #define WM831X_LDO7_FLT_WIDTH 926 #define WM831X_LDO7_SWI 927 #define WM831X_LDO7_SWI_MASK 928 #define WM831X_LDO7_SWI_SHIFT 929 #define WM831X_LDO7_SWI_WIDTH 930 931 /* 932 * R16507 (0x407B) - LDO7 ON Control 933 */ 934 #define WM831X_LDO7_ON_SLOT_MASK 935 #define WM831X_LDO7_ON_SLOT_SHIFT 936 #define WM831X_LDO7_ON_SLOT_WIDTH 937 #define WM831X_LDO7_ON_MODE 938 #define WM831X_LDO7_ON_MODE_MASK 939 #define WM831X_LDO7_ON_MODE_SHIFT 940 #define WM831X_LDO7_ON_MODE_WIDTH 941 #define WM831X_LDO7_ON_VSEL_MASK 942 #define WM831X_LDO7_ON_VSEL_SHIFT 943 #define WM831X_LDO7_ON_VSEL_WIDTH 944 945 /* 946 * R16508 (0x407C) - LDO7 SLEEP Control 947 */ 948 #define WM831X_LDO7_SLP_SLOT_MASK 949 #define WM831X_LDO7_SLP_SLOT_SHIFT 950 #define WM831X_LDO7_SLP_SLOT_WIDTH 951 #define WM831X_LDO7_SLP_MODE 952 #define WM831X_LDO7_SLP_MODE_MASK 953 #define WM831X_LDO7_SLP_MODE_SHIFT 954 #define WM831X_LDO7_SLP_MODE_WIDTH 955 #define WM831X_LDO7_SLP_VSEL_MASK 956 #define WM831X_LDO7_SLP_VSEL_SHIFT 957 #define WM831X_LDO7_SLP_VSEL_WIDTH 958 959 /* 960 * R16509 (0x407D) - LDO8 Control 961 */ 962 #define WM831X_LDO8_ERR_ACT_MASK 963 #define WM831X_LDO8_ERR_ACT_SHIFT 964 #define WM831X_LDO8_ERR_ACT_WIDTH 965 #define WM831X_LDO8_HWC_SRC_MASK 966 #define WM831X_LDO8_HWC_SRC_SHIFT 967 #define WM831X_LDO8_HWC_SRC_WIDTH 968 #define WM831X_LDO8_HWC_VSEL 969 #define WM831X_LDO8_HWC_VSEL_MASK 970 #define WM831X_LDO8_HWC_VSEL_SHIFT 971 #define WM831X_LDO8_HWC_VSEL_WIDTH 972 #define WM831X_LDO8_HWC_MODE_MASK 973 #define WM831X_LDO8_HWC_MODE_SHIFT 974 #define WM831X_LDO8_HWC_MODE_WIDTH 975 #define WM831X_LDO8_FLT 976 #define WM831X_LDO8_FLT_MASK 977 #define WM831X_LDO8_FLT_SHIFT 978 #define WM831X_LDO8_FLT_WIDTH 979 #define WM831X_LDO8_SWI 980 #define WM831X_LDO8_SWI_MASK 981 #define WM831X_LDO8_SWI_SHIFT 982 #define WM831X_LDO8_SWI_WIDTH 983 984 /* 985 * R16510 (0x407E) - LDO8 ON Control 986 */ 987 #define WM831X_LDO8_ON_SLOT_MASK 988 #define WM831X_LDO8_ON_SLOT_SHIFT 989 #define WM831X_LDO8_ON_SLOT_WIDTH 990 #define WM831X_LDO8_ON_MODE 991 #define WM831X_LDO8_ON_MODE_MASK 992 #define WM831X_LDO8_ON_MODE_SHIFT 993 #define WM831X_LDO8_ON_MODE_WIDTH 994 #define WM831X_LDO8_ON_VSEL_MASK 995 #define WM831X_LDO8_ON_VSEL_SHIFT 996 #define WM831X_LDO8_ON_VSEL_WIDTH 997 998 /* 999 * R16511 (0x407F) - LDO8 SLEEP Control 1000 */ 1001 #define WM831X_LDO8_SLP_SLOT_MASK 1002 #define WM831X_LDO8_SLP_SLOT_SHIFT 1003 #define WM831X_LDO8_SLP_SLOT_WIDTH 1004 #define WM831X_LDO8_SLP_MODE 1005 #define WM831X_LDO8_SLP_MODE_MASK 1006 #define WM831X_LDO8_SLP_MODE_SHIFT 1007 #define WM831X_LDO8_SLP_MODE_WIDTH 1008 #define WM831X_LDO8_SLP_VSEL_MASK 1009 #define WM831X_LDO8_SLP_VSEL_SHIFT 1010 #define WM831X_LDO8_SLP_VSEL_WIDTH 1011 1012 /* 1013 * R16512 (0x4080) - LDO9 Control 1014 */ 1015 #define WM831X_LDO9_ERR_ACT_MASK 1016 #define WM831X_LDO9_ERR_ACT_SHIFT 1017 #define WM831X_LDO9_ERR_ACT_WIDTH 1018 #define WM831X_LDO9_HWC_SRC_MASK 1019 #define WM831X_LDO9_HWC_SRC_SHIFT 1020 #define WM831X_LDO9_HWC_SRC_WIDTH 1021 #define WM831X_LDO9_HWC_VSEL 1022 #define WM831X_LDO9_HWC_VSEL_MASK 1023 #define WM831X_LDO9_HWC_VSEL_SHIFT 1024 #define WM831X_LDO9_HWC_VSEL_WIDTH 1025 #define WM831X_LDO9_HWC_MODE_MASK 1026 #define WM831X_LDO9_HWC_MODE_SHIFT 1027 #define WM831X_LDO9_HWC_MODE_WIDTH 1028 #define WM831X_LDO9_FLT 1029 #define WM831X_LDO9_FLT_MASK 1030 #define WM831X_LDO9_FLT_SHIFT 1031 #define WM831X_LDO9_FLT_WIDTH 1032 #define WM831X_LDO9_SWI 1033 #define WM831X_LDO9_SWI_MASK 1034 #define WM831X_LDO9_SWI_SHIFT 1035 #define WM831X_LDO9_SWI_WIDTH 1036 1037 /* 1038 * R16513 (0x4081) - LDO9 ON Control 1039 */ 1040 #define WM831X_LDO9_ON_SLOT_MASK 1041 #define WM831X_LDO9_ON_SLOT_SHIFT 1042 #define WM831X_LDO9_ON_SLOT_WIDTH 1043 #define WM831X_LDO9_ON_MODE 1044 #define WM831X_LDO9_ON_MODE_MASK 1045 #define WM831X_LDO9_ON_MODE_SHIFT 1046 #define WM831X_LDO9_ON_MODE_WIDTH 1047 #define WM831X_LDO9_ON_VSEL_MASK 1048 #define WM831X_LDO9_ON_VSEL_SHIFT 1049 #define WM831X_LDO9_ON_VSEL_WIDTH 1050 1051 /* 1052 * R16514 (0x4082) - LDO9 SLEEP Control 1053 */ 1054 #define WM831X_LDO9_SLP_SLOT_MASK 1055 #define WM831X_LDO9_SLP_SLOT_SHIFT 1056 #define WM831X_LDO9_SLP_SLOT_WIDTH 1057 #define WM831X_LDO9_SLP_MODE 1058 #define WM831X_LDO9_SLP_MODE_MASK 1059 #define WM831X_LDO9_SLP_MODE_SHIFT 1060 #define WM831X_LDO9_SLP_MODE_WIDTH 1061 #define WM831X_LDO9_SLP_VSEL_MASK 1062 #define WM831X_LDO9_SLP_VSEL_SHIFT 1063 #define WM831X_LDO9_SLP_VSEL_WIDTH 1064 1065 /* 1066 * R16515 (0x4083) - LDO10 Control 1067 */ 1068 #define WM831X_LDO10_ERR_ACT_MASK 1069 #define WM831X_LDO10_ERR_ACT_SHIFT 1070 #define WM831X_LDO10_ERR_ACT_WIDTH 1071 #define WM831X_LDO10_HWC_SRC_MASK 1072 #define WM831X_LDO10_HWC_SRC_SHIFT 1073 #define WM831X_LDO10_HWC_SRC_WIDTH 1074 #define WM831X_LDO10_HWC_VSEL 1075 #define WM831X_LDO10_HWC_VSEL_MASK 1076 #define WM831X_LDO10_HWC_VSEL_SHIFT 1077 #define WM831X_LDO10_HWC_VSEL_WIDTH 1078 #define WM831X_LDO10_HWC_MODE_MASK 1079 #define WM831X_LDO10_HWC_MODE_SHIFT 1080 #define WM831X_LDO10_HWC_MODE_WIDTH 1081 #define WM831X_LDO10_FLT 1082 #define WM831X_LDO10_FLT_MASK 1083 #define WM831X_LDO10_FLT_SHIFT 1084 #define WM831X_LDO10_FLT_WIDTH 1085 #define WM831X_LDO10_SWI 1086 #define WM831X_LDO10_SWI_MASK 1087 #define WM831X_LDO10_SWI_SHIFT 1088 #define WM831X_LDO10_SWI_WIDTH 1089 1090 /* 1091 * R16516 (0x4084) - LDO10 ON Control 1092 */ 1093 #define WM831X_LDO10_ON_SLOT_MASK 1094 #define WM831X_LDO10_ON_SLOT_SHIFT 1095 #define WM831X_LDO10_ON_SLOT_WIDTH 1096 #define WM831X_LDO10_ON_MODE 1097 #define WM831X_LDO10_ON_MODE_MASK 1098 #define WM831X_LDO10_ON_MODE_SHIFT 1099 #define WM831X_LDO10_ON_MODE_WIDTH 1100 #define WM831X_LDO10_ON_VSEL_MASK 1101 #define WM831X_LDO10_ON_VSEL_SHIFT 1102 #define WM831X_LDO10_ON_VSEL_WIDTH 1103 1104 /* 1105 * R16517 (0x4085) - LDO10 SLEEP Control 1106 */ 1107 #define WM831X_LDO10_SLP_SLOT_MASK 1108 #define WM831X_LDO10_SLP_SLOT_SHIFT 1109 #define WM831X_LDO10_SLP_SLOT_WIDTH 1110 #define WM831X_LDO10_SLP_MODE 1111 #define WM831X_LDO10_SLP_MODE_MASK 1112 #define WM831X_LDO10_SLP_MODE_SHIFT 1113 #define WM831X_LDO10_SLP_MODE_WIDTH 1114 #define WM831X_LDO10_SLP_VSEL_MASK 1115 #define WM831X_LDO10_SLP_VSEL_SHIFT 1116 #define WM831X_LDO10_SLP_VSEL_WIDTH 1117 1118 /* 1119 * R16519 (0x4087) - LDO11 ON Control 1120 */ 1121 #define WM831X_LDO11_ON_SLOT_MASK 1122 #define WM831X_LDO11_ON_SLOT_SHIFT 1123 #define WM831X_LDO11_ON_SLOT_WIDTH 1124 #define WM831X_LDO11_OFFENA 1125 #define WM831X_LDO11_OFFENA_MASK 1126 #define WM831X_LDO11_OFFENA_SHIFT 1127 #define WM831X_LDO11_OFFENA_WIDTH 1128 #define WM831X_LDO11_VSEL_SRC 1129 #define WM831X_LDO11_VSEL_SRC_MASK 1130 #define WM831X_LDO11_VSEL_SRC_SHIFT 1131 #define WM831X_LDO11_VSEL_SRC_WIDTH 1132 #define WM831X_LDO11_ON_VSEL_MASK 1133 #define WM831X_LDO11_ON_VSEL_SHIFT 1134 #define WM831X_LDO11_ON_VSEL_WIDTH 1135 1136 /* 1137 * R16520 (0x4088) - LDO11 SLEEP Control 1138 */ 1139 #define WM831X_LDO11_SLP_SLOT_MASK 1140 #define WM831X_LDO11_SLP_SLOT_SHIFT 1141 #define WM831X_LDO11_SLP_SLOT_WIDTH 1142 #define WM831X_LDO11_SLP_VSEL_MASK 1143 #define WM831X_LDO11_SLP_VSEL_SHIFT 1144 #define WM831X_LDO11_SLP_VSEL_WIDTH 1145 1146 /* 1147 * R16526 (0x408E) - Power Good Source 1 1148 */ 1149 #define WM831X_DC4_OK 1150 #define WM831X_DC4_OK_MASK 1151 #define WM831X_DC4_OK_SHIFT 1152 #define WM831X_DC4_OK_WIDTH 1153 #define WM831X_DC3_OK 1154 #define WM831X_DC3_OK_MASK 1155 #define WM831X_DC3_OK_SHIFT 1156 #define WM831X_DC3_OK_WIDTH 1157 #define WM831X_DC2_OK 1158 #define WM831X_DC2_OK_MASK 1159 #define WM831X_DC2_OK_SHIFT 1160 #define WM831X_DC2_OK_WIDTH 1161 #define WM831X_DC1_OK 1162 #define WM831X_DC1_OK_MASK 1163 #define WM831X_DC1_OK_SHIFT 1164 #define WM831X_DC1_OK_WIDTH 1165 1166 /* 1167 * R16527 (0x408F) - Power Good Source 2 1168 */ 1169 #define WM831X_LDO10_OK 1170 #define WM831X_LDO10_OK_MASK 1171 #define WM831X_LDO10_OK_SHIFT 1172 #define WM831X_LDO10_OK_WIDTH 1173 #define WM831X_LDO9_OK 1174 #define WM831X_LDO9_OK_MASK 1175 #define WM831X_LDO9_OK_SHIFT 1176 #define WM831X_LDO9_OK_WIDTH 1177 #define WM831X_LDO8_OK 1178 #define WM831X_LDO8_OK_MASK 1179 #define WM831X_LDO8_OK_SHIFT 1180 #define WM831X_LDO8_OK_WIDTH 1181 #define WM831X_LDO7_OK 1182 #define WM831X_LDO7_OK_MASK 1183 #define WM831X_LDO7_OK_SHIFT 1184 #define WM831X_LDO7_OK_WIDTH 1185 #define WM831X_LDO6_OK 1186 #define WM831X_LDO6_OK_MASK 1187 #define WM831X_LDO6_OK_SHIFT 1188 #define WM831X_LDO6_OK_WIDTH 1189 #define WM831X_LDO5_OK 1190 #define WM831X_LDO5_OK_MASK 1191 #define WM831X_LDO5_OK_SHIFT 1192 #define WM831X_LDO5_OK_WIDTH 1193 #define WM831X_LDO4_OK 1194 #define WM831X_LDO4_OK_MASK 1195 #define WM831X_LDO4_OK_SHIFT 1196 #define WM831X_LDO4_OK_WIDTH 1197 #define WM831X_LDO3_OK 1198 #define WM831X_LDO3_OK_MASK 1199 #define WM831X_LDO3_OK_SHIFT 1200 #define WM831X_LDO3_OK_WIDTH 1201 #define WM831X_LDO2_OK 1202 #define WM831X_LDO2_OK_MASK 1203 #define WM831X_LDO2_OK_SHIFT 1204 #define WM831X_LDO2_OK_WIDTH 1205 #define WM831X_LDO1_OK 1206 #define WM831X_LDO1_OK_MASK 1207 #define WM831X_LDO1_OK_SHIFT 1208 #define WM831X_LDO1_OK_WIDTH 1209 1210 #define WM831X_ISINK_MAX_ISEL 55 1211 extern const unsigned int wm831x_isinkv_value 1212 1213 #endif 1214
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.