1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * linux/include/linux/mmc/host.h 2 * linux/include/linux/mmc/host.h
4 * 3 *
>> 4 * This program is free software; you can redistribute it and/or modify
>> 5 * it under the terms of the GNU General Public License version 2 as
>> 6 * published by the Free Software Foundation.
>> 7 *
5 * Host driver specific definitions. 8 * Host driver specific definitions.
6 */ 9 */
7 #ifndef LINUX_MMC_HOST_H 10 #ifndef LINUX_MMC_HOST_H
8 #define LINUX_MMC_HOST_H 11 #define LINUX_MMC_HOST_H
9 12
>> 13 #include <linux/leds.h>
>> 14 #include <linux/mutex.h>
>> 15 #include <linux/timer.h>
10 #include <linux/sched.h> 16 #include <linux/sched.h>
11 #include <linux/device.h> 17 #include <linux/device.h>
12 #include <linux/fault-inject.h> 18 #include <linux/fault-inject.h>
13 #include <linux/debugfs.h> <<
14 19
15 #include <linux/mmc/core.h> 20 #include <linux/mmc/core.h>
16 #include <linux/mmc/card.h> 21 #include <linux/mmc/card.h>
>> 22 #include <linux/mmc/mmc.h>
17 #include <linux/mmc/pm.h> 23 #include <linux/mmc/pm.h>
18 #include <linux/dma-direction.h> <<
19 #include <linux/blk-crypto-profile.h> <<
20 24
21 struct mmc_ios { 25 struct mmc_ios {
22 unsigned int clock; 26 unsigned int clock; /* clock rate */
23 unsigned short vdd; 27 unsigned short vdd;
24 unsigned int power_delay_ms; <<
25 28
26 /* vdd stores the bit number of the selected v 29 /* vdd stores the bit number of the selected voltage range from below. */
27 30
28 unsigned char bus_mode; 31 unsigned char bus_mode; /* command output mode */
29 32
30 #define MMC_BUSMODE_OPENDRAIN 1 33 #define MMC_BUSMODE_OPENDRAIN 1
31 #define MMC_BUSMODE_PUSHPULL 2 34 #define MMC_BUSMODE_PUSHPULL 2
32 35
33 unsigned char chip_select; 36 unsigned char chip_select; /* SPI chip select */
34 37
35 #define MMC_CS_DONTCARE 0 38 #define MMC_CS_DONTCARE 0
36 #define MMC_CS_HIGH 1 39 #define MMC_CS_HIGH 1
37 #define MMC_CS_LOW 2 40 #define MMC_CS_LOW 2
38 41
39 unsigned char power_mode; 42 unsigned char power_mode; /* power supply mode */
40 43
41 #define MMC_POWER_OFF 0 44 #define MMC_POWER_OFF 0
42 #define MMC_POWER_UP 1 45 #define MMC_POWER_UP 1
43 #define MMC_POWER_ON 2 46 #define MMC_POWER_ON 2
44 #define MMC_POWER_UNDEFINED 3 47 #define MMC_POWER_UNDEFINED 3
45 48
46 unsigned char bus_width; 49 unsigned char bus_width; /* data bus width */
47 50
48 #define MMC_BUS_WIDTH_1 0 51 #define MMC_BUS_WIDTH_1 0
49 #define MMC_BUS_WIDTH_4 2 52 #define MMC_BUS_WIDTH_4 2
50 #define MMC_BUS_WIDTH_8 3 53 #define MMC_BUS_WIDTH_8 3
51 54
52 unsigned char timing; 55 unsigned char timing; /* timing specification used */
53 56
54 #define MMC_TIMING_LEGACY 0 57 #define MMC_TIMING_LEGACY 0
55 #define MMC_TIMING_MMC_HS 1 58 #define MMC_TIMING_MMC_HS 1
56 #define MMC_TIMING_SD_HS 2 59 #define MMC_TIMING_SD_HS 2
57 #define MMC_TIMING_UHS_SDR12 3 60 #define MMC_TIMING_UHS_SDR12 3
58 #define MMC_TIMING_UHS_SDR25 4 61 #define MMC_TIMING_UHS_SDR25 4
59 #define MMC_TIMING_UHS_SDR50 5 62 #define MMC_TIMING_UHS_SDR50 5
60 #define MMC_TIMING_UHS_SDR104 6 63 #define MMC_TIMING_UHS_SDR104 6
61 #define MMC_TIMING_UHS_DDR50 7 64 #define MMC_TIMING_UHS_DDR50 7
62 #define MMC_TIMING_MMC_DDR52 8 65 #define MMC_TIMING_MMC_DDR52 8
63 #define MMC_TIMING_MMC_HS200 9 66 #define MMC_TIMING_MMC_HS200 9
64 #define MMC_TIMING_MMC_HS400 10 67 #define MMC_TIMING_MMC_HS400 10
65 #define MMC_TIMING_SD_EXP 11 <<
66 #define MMC_TIMING_SD_EXP_1_2V 12 <<
67 68
68 unsigned char signal_voltage; 69 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
69 70
70 #define MMC_SIGNAL_VOLTAGE_330 0 71 #define MMC_SIGNAL_VOLTAGE_330 0
71 #define MMC_SIGNAL_VOLTAGE_180 1 72 #define MMC_SIGNAL_VOLTAGE_180 1
72 #define MMC_SIGNAL_VOLTAGE_120 2 73 #define MMC_SIGNAL_VOLTAGE_120 2
73 74
74 unsigned char drv_type; 75 unsigned char drv_type; /* driver type (A, B, C, D) */
75 76
76 #define MMC_SET_DRIVER_TYPE_B 0 77 #define MMC_SET_DRIVER_TYPE_B 0
77 #define MMC_SET_DRIVER_TYPE_A 1 78 #define MMC_SET_DRIVER_TYPE_A 1
78 #define MMC_SET_DRIVER_TYPE_C 2 79 #define MMC_SET_DRIVER_TYPE_C 2
79 #define MMC_SET_DRIVER_TYPE_D 3 80 #define MMC_SET_DRIVER_TYPE_D 3
80 81
81 bool enhanced_strobe; 82 bool enhanced_strobe; /* hs400es selection */
82 }; 83 };
83 84
84 struct mmc_clk_phase { <<
85 bool valid; <<
86 u16 in_deg; <<
87 u16 out_deg; <<
88 }; <<
89 <<
90 #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS4 <<
91 struct mmc_clk_phase_map { <<
92 struct mmc_clk_phase phase[MMC_NUM_CLK <<
93 }; <<
94 <<
95 struct mmc_host; <<
96 <<
97 enum mmc_err_stat { <<
98 MMC_ERR_CMD_TIMEOUT, <<
99 MMC_ERR_CMD_CRC, <<
100 MMC_ERR_DAT_TIMEOUT, <<
101 MMC_ERR_DAT_CRC, <<
102 MMC_ERR_AUTO_CMD, <<
103 MMC_ERR_ADMA, <<
104 MMC_ERR_TUNING, <<
105 MMC_ERR_CMDQ_RED, <<
106 MMC_ERR_CMDQ_GCE, <<
107 MMC_ERR_CMDQ_ICCE, <<
108 MMC_ERR_REQ_TIMEOUT, <<
109 MMC_ERR_CMDQ_REQ_TIMEOUT, <<
110 MMC_ERR_ICE_CFG, <<
111 MMC_ERR_CTRL_TIMEOUT, <<
112 MMC_ERR_UNEXPECTED_IRQ, <<
113 MMC_ERR_MAX, <<
114 }; <<
115 <<
116 struct mmc_host_ops { 85 struct mmc_host_ops {
117 /* 86 /*
118 * It is optional for the host to impl 87 * It is optional for the host to implement pre_req and post_req in
119 * order to support double buffering o 88 * order to support double buffering of requests (prepare one
120 * request while another request is ac 89 * request while another request is active).
121 * pre_req() must always be followed b 90 * pre_req() must always be followed by a post_req().
122 * To undo a call made to pre_req(), c 91 * To undo a call made to pre_req(), call post_req() with
123 * a nonzero err condition. 92 * a nonzero err condition.
124 */ 93 */
125 void (*post_req)(struct mmc_host *h 94 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
126 int err); 95 int err);
127 void (*pre_req)(struct mmc_host *ho !! 96 void (*pre_req)(struct mmc_host *host, struct mmc_request *req,
>> 97 bool is_first_req);
128 void (*request)(struct mmc_host *ho 98 void (*request)(struct mmc_host *host, struct mmc_request *req);
129 /* Submit one request to host in atomi <<
130 int (*request_atomic)(struct mmc_h <<
131 struct mmc_r <<
132 99
133 /* 100 /*
134 * Avoid calling the next three functi 101 * Avoid calling the next three functions too often or in a "fast
135 * path", since underlaying controller 102 * path", since underlaying controller might implement them in an
136 * expensive and/or slow way. Also not 103 * expensive and/or slow way. Also note that these functions might
137 * sleep, so don't call them in the at 104 * sleep, so don't call them in the atomic contexts!
138 */ 105 */
139 106
140 /* 107 /*
141 * Notes to the set_ios callback: 108 * Notes to the set_ios callback:
142 * ios->clock might be 0. For some con 109 * ios->clock might be 0. For some controllers, setting 0Hz
143 * as any other frequency works. Howev 110 * as any other frequency works. However, some controllers
144 * explicitly need to disable the cloc 111 * explicitly need to disable the clock. Otherwise e.g. voltage
145 * switching might fail because the SD 112 * switching might fail because the SDCLK is not really quiet.
146 */ 113 */
147 void (*set_ios)(struct mmc_host *ho 114 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
148 115
149 /* 116 /*
150 * Return values for the get_ro callba 117 * Return values for the get_ro callback should be:
151 * 0 for a read/write card 118 * 0 for a read/write card
152 * 1 for a read-only card 119 * 1 for a read-only card
153 * -ENOSYS when not supported (equal 120 * -ENOSYS when not supported (equal to NULL callback)
154 * or a negative errno value when so 121 * or a negative errno value when something bad happened
155 */ 122 */
156 int (*get_ro)(struct mmc_host *hos 123 int (*get_ro)(struct mmc_host *host);
157 124
158 /* 125 /*
159 * Return values for the get_cd callba 126 * Return values for the get_cd callback should be:
160 * 0 for a absent card 127 * 0 for a absent card
161 * 1 for a present card 128 * 1 for a present card
162 * -ENOSYS when not supported (equal 129 * -ENOSYS when not supported (equal to NULL callback)
163 * or a negative errno value when so 130 * or a negative errno value when something bad happened
164 */ 131 */
165 int (*get_cd)(struct mmc_host *hos 132 int (*get_cd)(struct mmc_host *host);
166 133
167 void (*enable_sdio_irq)(struct mmc_ 134 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
168 /* Mandatory callback when using MMC_C <<
169 void (*ack_sdio_irq)(struct mmc_hos <<
170 135
171 /* optional callback for HC quirks */ 136 /* optional callback for HC quirks */
172 void (*init_card)(struct mmc_host * 137 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
173 138
174 int (*start_signal_voltage_switch) 139 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
175 140
176 /* Check if the card is pulling dat[0] !! 141 /* Check if the card is pulling dat[0:3] low */
177 int (*card_busy)(struct mmc_host * 142 int (*card_busy)(struct mmc_host *host);
178 143
179 /* The tuning command opcode value is 144 /* The tuning command opcode value is different for SD and eMMC cards */
180 int (*execute_tuning)(struct mmc_h 145 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
181 146
182 /* Prepare HS400 target operating freq 147 /* Prepare HS400 target operating frequency depending host driver */
183 int (*prepare_hs400_tuning)(struct 148 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
184 <<
185 /* Execute HS400 tuning depending host <<
186 int (*execute_hs400_tuning)(struct <<
187 <<
188 /* Optional callback to prepare for SD <<
189 int (*prepare_sd_hs_tuning)(struct <<
190 <<
191 /* Optional callback to execute SD hig <<
192 int (*execute_sd_hs_tuning)(struct <<
193 <<
194 /* Prepare switch to DDR during the HS <<
195 int (*hs400_prepare_ddr)(struct mm <<
196 <<
197 /* Prepare for switching from HS400 to <<
198 void (*hs400_downgrade)(struct mmc_ <<
199 <<
200 /* Complete selection of HS400 */ <<
201 void (*hs400_complete)(struct mmc_h <<
202 <<
203 /* Prepare enhanced strobe depending h 149 /* Prepare enhanced strobe depending host driver */
204 void (*hs400_enhanced_strobe)(struc 150 void (*hs400_enhanced_strobe)(struct mmc_host *host,
205 struc 151 struct mmc_ios *ios);
206 int (*select_drive_strength)(struc 152 int (*select_drive_strength)(struct mmc_card *card,
207 unsig 153 unsigned int max_dtr, int host_drv,
208 int c 154 int card_drv, int *drv_type);
209 /* Reset the eMMC card via RST_n */ !! 155 void (*hw_reset)(struct mmc_host *host);
210 void (*card_hw_reset)(struct mmc_ho <<
211 void (*card_event)(struct mmc_host 156 void (*card_event)(struct mmc_host *host);
212 157
213 /* 158 /*
214 * Optional callback to support contro 159 * Optional callback to support controllers with HW issues for multiple
215 * I/O. Returns the number of supporte 160 * I/O. Returns the number of supported blocks for the request.
216 */ 161 */
217 int (*multi_io_quirk)(struct mmc_c 162 int (*multi_io_quirk)(struct mmc_card *card,
218 unsigned int 163 unsigned int direction, int blk_size);
219 <<
220 /* Initialize an SD express card, mand <<
221 int (*init_sd_express)(struct mmc_ <<
222 }; 164 };
223 165
224 struct mmc_cqe_ops { !! 166 struct mmc_card;
225 /* Allocate resources, and make the CQ !! 167 struct device;
226 int (*cqe_enable)(struct mmc_host !! 168
227 /* Free resources, and make the CQE no !! 169 struct mmc_async_req {
228 void (*cqe_disable)(struct mmc_host !! 170 /* active mmc request */
229 /* !! 171 struct mmc_request *mrq;
230 * Issue a read, write or DCMD request <<
231 * effect of ->cqe_off(). <<
232 */ <<
233 int (*cqe_request)(struct mmc_host <<
234 /* Free resources (e.g. DMA mapping) a <<
235 void (*cqe_post_req)(struct mmc_hos <<
236 /* <<
237 * Prepare the CQE and host controller <<
238 * is no corresponding ->cqe_on(), ins <<
239 * to deal with that. <<
240 */ <<
241 void (*cqe_off)(struct mmc_host *ho <<
242 /* <<
243 * Wait for all CQE tasks to complete. <<
244 * becomes necessary. <<
245 */ <<
246 int (*cqe_wait_for_idle)(struct mm <<
247 /* <<
248 * Notify CQE that a request has timed <<
249 * completed or true if a timeout happ <<
250 * recovery is needed. <<
251 */ <<
252 bool (*cqe_timeout)(struct mmc_host <<
253 bool *recovery_ <<
254 /* <<
255 * Stop all CQE activity and prepare t <<
256 * accept recovery commands. <<
257 */ <<
258 void (*cqe_recovery_start)(struct m <<
259 /* 172 /*
260 * Clear the queue and call mmc_cqe_re !! 173 * Check error status of completed mmc request.
261 * Requests that errored will have the !! 174 * Returns 0 if success otherwise non zero.
262 * (data->error or cmd->error for DCMD <<
263 * will have zero data bytes transferr <<
264 */ 175 */
265 void (*cqe_recovery_finish)(struct !! 176 int (*err_check) (struct mmc_card *, struct mmc_async_req *);
266 }; 177 };
267 178
268 /** 179 /**
269 * struct mmc_slot - MMC slot functions 180 * struct mmc_slot - MMC slot functions
270 * 181 *
271 * @cd_irq: MMC/SD-card slot hotpl 182 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
272 * @handler_priv: MMC/SD-card slot conte 183 * @handler_priv: MMC/SD-card slot context
273 * 184 *
274 * Some MMC/SD host controllers implement slot 185 * Some MMC/SD host controllers implement slot-functions like card and
275 * write-protect detection natively. However, 186 * write-protect detection natively. However, a large number of controllers
276 * leave these functions to the CPU. This stru 187 * leave these functions to the CPU. This struct provides a hook to attach
277 * such slot-function drivers. 188 * such slot-function drivers.
278 */ 189 */
279 struct mmc_slot { 190 struct mmc_slot {
280 int cd_irq; 191 int cd_irq;
281 bool cd_wake_enabled; <<
282 void *handler_priv; 192 void *handler_priv;
283 }; 193 };
284 194
>> 195 /**
>> 196 * mmc_context_info - synchronization details for mmc context
>> 197 * @is_done_rcv wake up reason was done request
>> 198 * @is_new_req wake up reason was new request
>> 199 * @is_waiting_last_req mmc context waiting for single running request
>> 200 * @wait wait queue
>> 201 * @lock lock to protect data fields
>> 202 */
>> 203 struct mmc_context_info {
>> 204 bool is_done_rcv;
>> 205 bool is_new_req;
>> 206 bool is_waiting_last_req;
>> 207 wait_queue_head_t wait;
>> 208 spinlock_t lock;
>> 209 };
>> 210
285 struct regulator; 211 struct regulator;
286 struct mmc_pwrseq; 212 struct mmc_pwrseq;
287 213
288 struct mmc_supply { 214 struct mmc_supply {
289 struct regulator *vmmc; /* Car 215 struct regulator *vmmc; /* Card power supply */
290 struct regulator *vqmmc; /* Opt 216 struct regulator *vqmmc; /* Optional Vccq supply */
291 }; 217 };
292 218
293 struct mmc_ctx { <<
294 struct task_struct *task; <<
295 }; <<
296 <<
297 struct mmc_host { 219 struct mmc_host {
298 struct device *parent; 220 struct device *parent;
299 struct device class_dev; 221 struct device class_dev;
300 int index; 222 int index;
301 const struct mmc_host_ops *ops; 223 const struct mmc_host_ops *ops;
302 struct mmc_pwrseq *pwrseq; 224 struct mmc_pwrseq *pwrseq;
303 unsigned int f_min; 225 unsigned int f_min;
304 unsigned int f_max; 226 unsigned int f_max;
305 unsigned int f_init; 227 unsigned int f_init;
306 u32 ocr_avail; 228 u32 ocr_avail;
307 u32 ocr_avail_sdio 229 u32 ocr_avail_sdio; /* SDIO-specific OCR */
308 u32 ocr_avail_sd; 230 u32 ocr_avail_sd; /* SD-specific OCR */
309 u32 ocr_avail_mmc; 231 u32 ocr_avail_mmc; /* MMC-specific OCR */
310 struct wakeup_source *ws; !! 232 #ifdef CONFIG_PM_SLEEP
>> 233 struct notifier_block pm_notify;
>> 234 #endif
311 u32 max_current_33 235 u32 max_current_330;
312 u32 max_current_30 236 u32 max_current_300;
313 u32 max_current_18 237 u32 max_current_180;
314 238
315 #define MMC_VDD_165_195 0x00000080 239 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
316 #define MMC_VDD_20_21 0x00000100 240 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
317 #define MMC_VDD_21_22 0x00000200 241 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
318 #define MMC_VDD_22_23 0x00000400 242 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
319 #define MMC_VDD_23_24 0x00000800 243 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
320 #define MMC_VDD_24_25 0x00001000 244 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
321 #define MMC_VDD_25_26 0x00002000 245 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
322 #define MMC_VDD_26_27 0x00004000 246 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
323 #define MMC_VDD_27_28 0x00008000 247 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
324 #define MMC_VDD_28_29 0x00010000 248 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
325 #define MMC_VDD_29_30 0x00020000 249 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
326 #define MMC_VDD_30_31 0x00040000 250 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
327 #define MMC_VDD_31_32 0x00080000 251 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
328 #define MMC_VDD_32_33 0x00100000 252 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
329 #define MMC_VDD_33_34 0x00200000 253 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
330 #define MMC_VDD_34_35 0x00400000 254 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
331 #define MMC_VDD_35_36 0x00800000 255 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
332 256
333 u32 caps; 257 u32 caps; /* Host capabilities */
334 258
335 #define MMC_CAP_4_BIT_DATA (1 << 0) 259 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
336 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) 260 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
337 #define MMC_CAP_SD_HIGHSPEED (1 << 2) 261 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
338 #define MMC_CAP_SDIO_IRQ (1 << 3) 262 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
339 #define MMC_CAP_SPI (1 << 4) 263 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
340 #define MMC_CAP_NEEDS_POLL (1 << 5) 264 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
341 #define MMC_CAP_8_BIT_DATA (1 << 6) 265 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
342 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) 266 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
343 #define MMC_CAP_NONREMOVABLE (1 << 8) 267 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
344 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) 268 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
345 #define MMC_CAP_3_3V_DDR (1 << 11) !! 269 #define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
346 #define MMC_CAP_1_8V_DDR (1 << 12) !! 270 #define MMC_CAP_1_8V_DDR (1 << 11) /* can support */
347 #define MMC_CAP_1_2V_DDR (1 << 13) !! 271 /* DDR mode at 1.8V */
348 #define MMC_CAP_DDR (MMC_CAP_3_3V_ !! 272 #define MMC_CAP_1_2V_DDR (1 << 12) /* can support */
349 MMC_CAP_1_2V_ !! 273 /* DDR mode at 1.2V */
350 #define MMC_CAP_POWER_OFF_CARD (1 << 14) !! 274 #define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */
351 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) !! 275 #define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */
352 #define MMC_CAP_UHS_SDR12 (1 << 16) !! 276 #define MMC_CAP_UHS_SDR12 (1 << 15) /* Host supports UHS SDR12 mode */
353 #define MMC_CAP_UHS_SDR25 (1 << 17) !! 277 #define MMC_CAP_UHS_SDR25 (1 << 16) /* Host supports UHS SDR25 mode */
354 #define MMC_CAP_UHS_SDR50 (1 << 18) !! 278 #define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
355 #define MMC_CAP_UHS_SDR104 (1 << 19) !! 279 #define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
356 #define MMC_CAP_UHS_DDR50 (1 << 20) !! 280 #define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
357 #define MMC_CAP_UHS (MMC_CAP_UHS_S <<
358 MMC_CAP_UHS_S <<
359 MMC_CAP_UHS_D <<
360 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) <<
361 #define MMC_CAP_NEED_RSP_BUSY (1 << 22) <<
362 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) 281 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
363 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) 282 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
364 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) 283 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
365 #define MMC_CAP_DONE_COMPLETE (1 << 27) <<
366 #define MMC_CAP_CD_WAKE (1 << 28) <<
367 #define MMC_CAP_CMD_DURING_TFR (1 << 29) 284 #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */
368 #define MMC_CAP_CMD23 (1 << 30) 285 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
369 #define MMC_CAP_HW_RESET (1 << 31) !! 286 #define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
370 287
371 u32 caps2; 288 u32 caps2; /* More host capabilities */
372 289
373 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) 290 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
374 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) 291 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
375 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 <<
376 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) 292 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
377 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) 293 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
378 #define MMC_CAP2_HS200 (MMC_CAP2_HS20 294 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
379 MMC_CAP2_HS20 295 MMC_CAP2_HS200_1_2V_SDR)
380 #define MMC_CAP2_SD_EXP (1 << 7) !! 296 #define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */
381 #define MMC_CAP2_SD_EXP_1_2V (1 << 8) <<
382 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) 297 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
383 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) 298 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
>> 299 #define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */
>> 300 #define MMC_CAP2_PACKED_WR (1 << 13) /* Allow packed write */
>> 301 #define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \
>> 302 MMC_CAP2_PACKED_WR)
384 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) 303 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
385 #define MMC_CAP2_HS400_1_8V (1 << 15) 304 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
386 #define MMC_CAP2_HS400_1_2V (1 << 16) 305 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
387 #define MMC_CAP2_HS400 (MMC_CAP2_HS40 306 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
388 MMC_CAP2_HS40 307 MMC_CAP2_HS400_1_2V)
389 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS20 <<
390 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS20 308 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
391 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) 309 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
392 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) 310 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
393 #define MMC_CAP2_NO_SDIO (1 << 19) 311 #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */
394 #define MMC_CAP2_HS400_ES (1 << 20) 312 #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */
395 #define MMC_CAP2_NO_SD (1 << 21) 313 #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */
396 #define MMC_CAP2_NO_MMC (1 << 22) 314 #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
397 #define MMC_CAP2_CQE (1 << 23) <<
398 #define MMC_CAP2_CQE_DCMD (1 << 24) <<
399 #define MMC_CAP2_AVOID_3_3V (1 << 25) <<
400 #define MMC_CAP2_MERGE_CAPABLE (1 << 26) <<
401 #ifdef CONFIG_MMC_CRYPTO <<
402 #define MMC_CAP2_CRYPTO (1 << 27) <<
403 #else <<
404 #define MMC_CAP2_CRYPTO 0 <<
405 #endif <<
406 #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) <<
407 <<
408 int fixed_drv_type <<
409 315
410 mmc_pm_flag_t pm_caps; 316 mmc_pm_flag_t pm_caps; /* supported pm features */
411 317
412 /* host specific block data */ 318 /* host specific block data */
413 unsigned int max_seg_size; !! 319 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
414 unsigned short max_segs; !! 320 unsigned short max_segs; /* see blk_queue_max_segments */
415 unsigned short unused; 321 unsigned short unused;
416 unsigned int max_req_size; 322 unsigned int max_req_size; /* maximum number of bytes in one req */
417 unsigned int max_blk_size; 323 unsigned int max_blk_size; /* maximum size of one mmc block */
418 unsigned int max_blk_count; 324 unsigned int max_blk_count; /* maximum number of blocks in one req */
419 unsigned int max_busy_timeo 325 unsigned int max_busy_timeout; /* max busy timeout in ms */
420 326
421 /* private data */ 327 /* private data */
422 spinlock_t lock; 328 spinlock_t lock; /* lock for claim and bus ops */
423 329
424 struct mmc_ios ios; 330 struct mmc_ios ios; /* current io bus settings */
425 331
426 /* group bitfields together to minimiz 332 /* group bitfields together to minimize padding */
427 unsigned int use_spi_crc:1; 333 unsigned int use_spi_crc:1;
428 unsigned int claimed:1; 334 unsigned int claimed:1; /* host exclusively claimed */
429 unsigned int doing_init_tun !! 335 unsigned int bus_dead:1; /* bus has been released */
>> 336 #ifdef CONFIG_MMC_DEBUG
>> 337 unsigned int removed:1; /* host is being removed */
>> 338 #endif
430 unsigned int can_retune:1; 339 unsigned int can_retune:1; /* re-tuning can be used */
431 unsigned int doing_retune:1 340 unsigned int doing_retune:1; /* re-tuning in progress */
432 unsigned int retune_now:1; 341 unsigned int retune_now:1; /* do re-tuning at next req */
433 unsigned int retune_paused: 342 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */
434 unsigned int retune_crc_dis <<
435 unsigned int can_dma_map_me <<
436 unsigned int vqmmc_enabled: <<
437 343
438 int rescan_disable 344 int rescan_disable; /* disable card detection */
439 int rescan_entered 345 int rescan_entered; /* used with nonremovable devices */
440 346
441 int need_retune; 347 int need_retune; /* re-tuning is needed */
442 int hold_retune; 348 int hold_retune; /* hold off re-tuning */
443 unsigned int retune_period; 349 unsigned int retune_period; /* re-tuning period in secs */
444 struct timer_list retune_timer; 350 struct timer_list retune_timer; /* for periodic re-tuning */
445 351
446 bool trigger_card_e 352 bool trigger_card_event; /* card_event necessary */
447 353
448 struct mmc_card *card; 354 struct mmc_card *card; /* device attached to this host */
449 355
450 wait_queue_head_t wq; 356 wait_queue_head_t wq;
451 struct mmc_ctx *claimer; !! 357 struct task_struct *claimer; /* task that has host claimed */
452 int claim_cnt; 358 int claim_cnt; /* "claim" nesting count */
453 struct mmc_ctx default_ctx; <<
454 359
455 struct delayed_work detect; 360 struct delayed_work detect;
456 int detect_change; 361 int detect_change; /* card detect flag */
457 struct mmc_slot slot; 362 struct mmc_slot slot;
458 363
459 const struct mmc_bus_ops *bus_ops; 364 const struct mmc_bus_ops *bus_ops; /* current bus driver */
>> 365 unsigned int bus_refs; /* reference counter */
460 366
461 unsigned int sdio_irqs; 367 unsigned int sdio_irqs;
462 struct task_struct *sdio_irq_thre 368 struct task_struct *sdio_irq_thread;
463 struct work_struct sdio_irq_work; <<
464 bool sdio_irq_pendi 369 bool sdio_irq_pending;
465 atomic_t sdio_irq_threa 370 atomic_t sdio_irq_thread_abort;
466 371
467 mmc_pm_flag_t pm_flags; 372 mmc_pm_flag_t pm_flags; /* requested pm features */
468 373
469 struct led_trigger *led; 374 struct led_trigger *led; /* activity led */
470 375
471 #ifdef CONFIG_REGULATOR 376 #ifdef CONFIG_REGULATOR
472 bool regulator_enab 377 bool regulator_enabled; /* regulator state */
473 #endif 378 #endif
474 struct mmc_supply supply; 379 struct mmc_supply supply;
475 380
476 struct dentry *debugfs_root; 381 struct dentry *debugfs_root;
477 382
>> 383 struct mmc_async_req *areq; /* active async req */
>> 384 struct mmc_context_info context_info; /* async synchronization info */
>> 385
478 /* Ongoing data transfer that allows c 386 /* Ongoing data transfer that allows commands during transfer */
479 struct mmc_request *ongoing_mrq; 387 struct mmc_request *ongoing_mrq;
480 388
481 #ifdef CONFIG_FAIL_MMC_REQUEST 389 #ifdef CONFIG_FAIL_MMC_REQUEST
482 struct fault_attr fail_mmc_reque 390 struct fault_attr fail_mmc_request;
483 #endif 391 #endif
484 392
485 unsigned int actual_clock; 393 unsigned int actual_clock; /* Actual HC clock rate */
486 394
487 unsigned int slotno; /* use 395 unsigned int slotno; /* used for sdio acpi binding */
488 396
489 int dsr_req; 397 int dsr_req; /* DSR value is valid */
490 u32 dsr; /* opt 398 u32 dsr; /* optional driver stage (DSR) value */
491 399
492 /* Command Queue Engine (CQE) support !! 400 unsigned long private[0] ____cacheline_aligned;
493 const struct mmc_cqe_ops *cqe_ops; <<
494 void *cqe_private; <<
495 int cqe_qdepth; <<
496 bool cqe_enabled; <<
497 bool cqe_on; <<
498 <<
499 /* Inline encryption support */ <<
500 #ifdef CONFIG_MMC_CRYPTO <<
501 struct blk_crypto_profile crypto_profi <<
502 #endif <<
503 <<
504 /* Host Software Queue support */ <<
505 bool hsq_enabled; <<
506 int hsq_depth; <<
507 <<
508 u32 err_stats[MMC_ <<
509 unsigned long private[] ____ <<
510 }; 401 };
511 402
512 struct device_node; <<
513 <<
514 struct mmc_host *mmc_alloc_host(int extra, str 403 struct mmc_host *mmc_alloc_host(int extra, struct device *);
515 struct mmc_host *devm_mmc_alloc_host(struct de <<
516 int mmc_add_host(struct mmc_host *); 404 int mmc_add_host(struct mmc_host *);
517 void mmc_remove_host(struct mmc_host *); 405 void mmc_remove_host(struct mmc_host *);
518 void mmc_free_host(struct mmc_host *); 406 void mmc_free_host(struct mmc_host *);
519 void mmc_of_parse_clk_phase(struct device *dev <<
520 struct mmc_clk_pha <<
521 int mmc_of_parse(struct mmc_host *host); 407 int mmc_of_parse(struct mmc_host *host);
522 int mmc_of_parse_voltage(struct mmc_host *host <<
523 408
524 static inline void *mmc_priv(struct mmc_host * 409 static inline void *mmc_priv(struct mmc_host *host)
525 { 410 {
526 return (void *)host->private; 411 return (void *)host->private;
527 } 412 }
528 413
529 static inline struct mmc_host *mmc_from_priv(v <<
530 { <<
531 return container_of(priv, struct mmc_h <<
532 } <<
533 <<
534 #define mmc_host_is_spi(host) ((host)->caps 414 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
535 415
536 #define mmc_dev(x) ((x)->parent) 416 #define mmc_dev(x) ((x)->parent)
537 #define mmc_classdev(x) (&(x)->class_dev) 417 #define mmc_classdev(x) (&(x)->class_dev)
538 #define mmc_hostname(x) (dev_name(&(x)->class_ 418 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
539 419
>> 420 int mmc_power_save_host(struct mmc_host *host);
>> 421 int mmc_power_restore_host(struct mmc_host *host);
>> 422
540 void mmc_detect_change(struct mmc_host *, unsi 423 void mmc_detect_change(struct mmc_host *, unsigned long delay);
541 void mmc_request_done(struct mmc_host *, struc 424 void mmc_request_done(struct mmc_host *, struct mmc_request *);
542 void mmc_command_done(struct mmc_host *host, s 425 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
543 426
544 void mmc_cqe_request_done(struct mmc_host *hos <<
545 <<
546 /* <<
547 * May be called from host driver's system/run <<
548 * to know if SDIO IRQs has been claimed. <<
549 */ <<
550 static inline bool sdio_irq_claimed(struct mmc <<
551 { <<
552 return host->sdio_irqs > 0; <<
553 } <<
554 <<
555 static inline void mmc_signal_sdio_irq(struct 427 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
556 { 428 {
557 host->ops->enable_sdio_irq(host, 0); 429 host->ops->enable_sdio_irq(host, 0);
558 host->sdio_irq_pending = true; 430 host->sdio_irq_pending = true;
559 if (host->sdio_irq_thread) 431 if (host->sdio_irq_thread)
560 wake_up_process(host->sdio_irq 432 wake_up_process(host->sdio_irq_thread);
561 } 433 }
562 434
563 void sdio_signal_irq(struct mmc_host *host); !! 435 void sdio_run_irqs(struct mmc_host *host);
564 436
565 #ifdef CONFIG_REGULATOR 437 #ifdef CONFIG_REGULATOR
>> 438 int mmc_regulator_get_ocrmask(struct regulator *supply);
566 int mmc_regulator_set_ocr(struct mmc_host *mmc 439 int mmc_regulator_set_ocr(struct mmc_host *mmc,
567 struct regulator *supp 440 struct regulator *supply,
568 unsigned short vdd_bit 441 unsigned short vdd_bit);
569 int mmc_regulator_set_vqmmc(struct mmc_host *m 442 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
570 #else 443 #else
>> 444 static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
>> 445 {
>> 446 return 0;
>> 447 }
>> 448
571 static inline int mmc_regulator_set_ocr(struct 449 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
572 struct regula 450 struct regulator *supply,
573 unsigned shor 451 unsigned short vdd_bit)
574 { 452 {
575 return 0; 453 return 0;
576 } 454 }
577 455
578 static inline int mmc_regulator_set_vqmmc(stru 456 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
579 stru 457 struct mmc_ios *ios)
580 { 458 {
581 return -EINVAL; 459 return -EINVAL;
582 } 460 }
583 #endif 461 #endif
584 462
585 int mmc_regulator_get_supply(struct mmc_host * 463 int mmc_regulator_get_supply(struct mmc_host *mmc);
586 int mmc_regulator_enable_vqmmc(struct mmc_host <<
587 void mmc_regulator_disable_vqmmc(struct mmc_ho <<
588 464
589 static inline int mmc_card_is_removable(struct 465 static inline int mmc_card_is_removable(struct mmc_host *host)
590 { 466 {
591 return !(host->caps & MMC_CAP_NONREMOV 467 return !(host->caps & MMC_CAP_NONREMOVABLE);
592 } 468 }
593 469
594 static inline int mmc_card_keep_power(struct m 470 static inline int mmc_card_keep_power(struct mmc_host *host)
595 { 471 {
596 return host->pm_flags & MMC_PM_KEEP_PO 472 return host->pm_flags & MMC_PM_KEEP_POWER;
597 } 473 }
598 474
599 static inline int mmc_card_wake_sdio_irq(struc 475 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
600 { 476 {
601 return host->pm_flags & MMC_PM_WAKE_SD 477 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
602 } 478 }
603 479
604 /* TODO: Move to private header */ !! 480 static inline int mmc_host_cmd23(struct mmc_host *host)
>> 481 {
>> 482 return host->caps & MMC_CAP_CMD23;
>> 483 }
>> 484
>> 485 static inline int mmc_boot_partition_access(struct mmc_host *host)
>> 486 {
>> 487 return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
>> 488 }
>> 489
>> 490 static inline int mmc_host_uhs(struct mmc_host *host)
>> 491 {
>> 492 return host->caps &
>> 493 (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
>> 494 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 |
>> 495 MMC_CAP_UHS_DDR50);
>> 496 }
>> 497
>> 498 static inline int mmc_host_packed_wr(struct mmc_host *host)
>> 499 {
>> 500 return host->caps2 & MMC_CAP2_PACKED_WR;
>> 501 }
>> 502
605 static inline int mmc_card_hs(struct mmc_card 503 static inline int mmc_card_hs(struct mmc_card *card)
606 { 504 {
607 return card->host->ios.timing == MMC_T 505 return card->host->ios.timing == MMC_TIMING_SD_HS ||
608 card->host->ios.timing == MMC_ 506 card->host->ios.timing == MMC_TIMING_MMC_HS;
609 } 507 }
610 508
611 /* TODO: Move to private header */ <<
612 static inline int mmc_card_uhs(struct mmc_card 509 static inline int mmc_card_uhs(struct mmc_card *card)
613 { 510 {
614 return card->host->ios.timing >= MMC_T 511 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
615 card->host->ios.timing <= MMC_ 512 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
616 } 513 }
617 514
618 void mmc_retune_timer_stop(struct mmc_host *ho !! 515 static inline bool mmc_card_hs200(struct mmc_card *card)
619 <<
620 static inline void mmc_retune_needed(struct mm <<
621 { 516 {
622 if (host->can_retune) !! 517 return card->host->ios.timing == MMC_TIMING_MMC_HS200;
623 host->need_retune = 1; <<
624 } 518 }
625 519
626 static inline bool mmc_can_retune(struct mmc_h !! 520 static inline bool mmc_card_ddr52(struct mmc_card *card)
627 { 521 {
628 return host->can_retune == 1; !! 522 return card->host->ios.timing == MMC_TIMING_MMC_DDR52;
629 } 523 }
630 524
631 static inline bool mmc_doing_retune(struct mmc !! 525 static inline bool mmc_card_hs400(struct mmc_card *card)
632 { 526 {
633 return host->doing_retune == 1; !! 527 return card->host->ios.timing == MMC_TIMING_MMC_HS400;
634 } 528 }
635 529
636 static inline bool mmc_doing_tune(struct mmc_h !! 530 static inline bool mmc_card_hs400es(struct mmc_card *card)
637 { 531 {
638 return host->doing_retune == 1 || host !! 532 return card->host->ios.enhanced_strobe;
639 } 533 }
640 534
641 static inline enum dma_data_direction mmc_get_ !! 535 void mmc_retune_timer_stop(struct mmc_host *host);
>> 536
>> 537 static inline void mmc_retune_needed(struct mmc_host *host)
642 { 538 {
643 return data->flags & MMC_DATA_WRITE ? !! 539 if (host->can_retune)
>> 540 host->need_retune = 1;
644 } 541 }
645 542
646 static inline void mmc_debugfs_err_stats_inc(s !! 543 static inline void mmc_retune_recheck(struct mmc_host *host)
647 e <<
648 { 544 {
649 host->err_stats[stat] += 1; !! 545 if (host->hold_retune <= 1)
>> 546 host->retune_now = 1;
650 } 547 }
651 548
652 int mmc_sd_switch(struct mmc_card *card, bool !! 549 void mmc_retune_pause(struct mmc_host *host);
653 u8 value, u8 *resp); !! 550 void mmc_retune_unpause(struct mmc_host *host);
654 int mmc_send_status(struct mmc_card *card, u32 <<
655 int mmc_send_tuning(struct mmc_host *host, u32 <<
656 int mmc_send_abort_tuning(struct mmc_host *hos <<
657 int mmc_get_ext_csd(struct mmc_card *card, u8 <<
658 551
659 #endif /* LINUX_MMC_HOST_H */ 552 #endif /* LINUX_MMC_HOST_H */
660 553
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