1 /* SPDX-License-Identifier: GPL-2.0 */ 1 2 /* Primary function overlay window definitions 3 * and service functions used by LPDDR chips 4 */ 5 #ifndef __LINUX_MTD_PFOW_H 6 #define __LINUX_MTD_PFOW_H 7 8 #include <linux/mtd/qinfo.h> 9 10 /* PFOW registers addressing */ 11 /* Address of symbol "P" */ 12 #define PFOW_QUERY_STRING_P 13 /* Address of symbol "F" */ 14 #define PFOW_QUERY_STRING_F 15 /* Address of symbol "O" */ 16 #define PFOW_QUERY_STRING_O 17 /* Address of symbol "W" */ 18 #define PFOW_QUERY_STRING_W 19 /* Identification info for LPDDR chip */ 20 #define PFOW_MANUFACTURER_ID 21 #define PFOW_DEVICE_ID 22 /* Address in PFOW where prog buffer can be fo 23 #define PFOW_PROGRAM_BUFFER_OFFSET 24 /* Size of program buffer in words */ 25 #define PFOW_PROGRAM_BUFFER_SIZE 26 /* Address command code register */ 27 #define PFOW_COMMAND_CODE 28 /* command data register */ 29 #define PFOW_COMMAND_DATA 30 /* command address register lower address bits 31 #define PFOW_COMMAND_ADDRESS_L 32 /* command address register upper address bits 33 #define PFOW_COMMAND_ADDRESS_H 34 /* number of bytes to be proggrammed lower add 35 #define PFOW_DATA_COUNT_L 36 /* number of bytes to be proggrammed higher ad 37 #define PFOW_DATA_COUNT_H 38 /* command execution register, the only possib 39 #define PFOW_COMMAND_EXECUTE 40 /* 0x01 should be written at this address to c 41 #define PFOW_CLEAR_PROGRAM_BUFFER 42 /* device program/erase suspend register */ 43 #define PFOW_PROGRAM_ERASE_SUSPEND 44 /* device status register */ 45 #define PFOW_DSR 46 47 /* LPDDR memory device command codes */ 48 /* They are possible values of PFOW command co 49 #define LPDDR_WORD_PROGRAM 0x0041 50 #define LPDDR_BUFF_PROGRAM 0x00E9 51 #define LPDDR_BLOCK_ERASE 0x0020 52 #define LPDDR_LOCK_BLOCK 0x0061 53 #define LPDDR_UNLOCK_BLOCK 0x0062 54 #define LPDDR_READ_BLOCK_LOCK_STATUS 0x0065 55 #define LPDDR_INFO_QUERY 0x0098 56 #define LPDDR_READ_OTP 0x0097 57 #define LPDDR_PROG_OTP 0x00C0 58 #define LPDDR_RESUME 0x00D0 59 60 /* Defines possible value of PFOW command exec 61 #define LPDDR_START_EXECUTION 62 63 /* Defines possible value of PFOW program/eras 64 #define LPDDR_SUSPEND 65 66 /* Possible values of PFOW device status regis 67 /* access R - read; RC read & clearable */ 68 #define DSR_DPS (1<<1) /* RC; 69 * 0 - 70 #define DSR_PSS (1<<2) /* R; p 71 * 0-pr 72 * 1- p 73 #define DSR_VPPS (1<<3) /* RC; 74 #define DSR_PROGRAM_STATUS (1<<4) /* RC; 75 #define DSR_ERASE_STATUS (1<<5) /* RC; 76 * 0-su 77 * 1 bl 78 #define DSR_ESS (1<<6) /* R; e 79 * 0-er 80 * 1 er 81 #define DSR_READY_STATUS (1<<7) /* R; D 82 * 0-bu 83 * 1-re 84 #define DSR_RPS (0x3<<8) /* RC 85 * 00 - 86 * 01-r 87 * obje 88 * 10-o 89 * regi 90 * 11-a 91 * with 92 #define DSR_AOS (1<<12) /* RC; 93 #define DSR_AVAILABLE (1<<15) /* R; 94 * 1 - 95 * 0 - 96 97 /* The superset of all possible error bits in 98 #define DSR_ERR 0x133A 99 100 static inline void send_pfow_command(struct ma 101 unsigned long 102 unsigned long 103 { 104 int bits_per_chip = map_bankwidth(map) 105 106 map_write(map, CMD(cmd_code), map->pfo 107 map_write(map, CMD(adr & ((1<<bits_per 108 map->pfow_base 109 map_write(map, CMD(adr>>bits_per_chip) 110 map->pfow_base 111 if (len) { 112 map_write(map, CMD(len & ((1<< 113 map->p 114 map_write(map, CMD(len>>bits_p 115 map->p 116 } 117 if (datum) 118 map_write(map, *datum, map->pf 119 120 /* Command execution start */ 121 map_write(map, CMD(LPDDR_START_EXECUTI 122 map->pfow_base + PFOW_ 123 } 124 #endif /* __LINUX_MTD_PFOW_H */ 125
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