1 /* SPDX-License-Identifier: GPL-2.0 */ << 2 /* 1 /* 3 * mux/driver.h - definitions for the multiple 2 * mux/driver.h - definitions for the multiplexer driver interface 4 * 3 * 5 * Copyright (C) 2017 Axentia Technologies AB 4 * Copyright (C) 2017 Axentia Technologies AB 6 * 5 * 7 * Author: Peter Rosin <peda@axentia.se> 6 * Author: Peter Rosin <peda@axentia.se> >> 7 * >> 8 * This program is free software; you can redistribute it and/or modify >> 9 * it under the terms of the GNU General Public License version 2 as >> 10 * published by the Free Software Foundation. 8 */ 11 */ 9 12 10 #ifndef _LINUX_MUX_DRIVER_H 13 #ifndef _LINUX_MUX_DRIVER_H 11 #define _LINUX_MUX_DRIVER_H 14 #define _LINUX_MUX_DRIVER_H 12 15 13 #include <dt-bindings/mux/mux.h> 16 #include <dt-bindings/mux/mux.h> 14 #include <linux/device.h> 17 #include <linux/device.h> 15 #include <linux/ktime.h> << 16 #include <linux/semaphore.h> 18 #include <linux/semaphore.h> 17 19 18 struct mux_chip; 20 struct mux_chip; 19 struct mux_control; 21 struct mux_control; 20 22 21 /** 23 /** 22 * struct mux_control_ops - Mux controller 24 * struct mux_control_ops - Mux controller operations for a mux chip. 23 * @set: Set the state 25 * @set: Set the state of the given mux controller. 24 */ 26 */ 25 struct mux_control_ops { 27 struct mux_control_ops { 26 int (*set)(struct mux_control *mux, in 28 int (*set)(struct mux_control *mux, int state); 27 }; 29 }; 28 30 29 /** 31 /** 30 * struct mux_control - Represents a mux contr 32 * struct mux_control - Represents a mux controller. 31 * @lock: Protects the mux contr 33 * @lock: Protects the mux controller state. 32 * @chip: The mux chip that is h 34 * @chip: The mux chip that is handling this mux controller. 33 * @cached_state: The current mux contro 35 * @cached_state: The current mux controller state, or -1 if none. 34 * @states: The number of mux cont 36 * @states: The number of mux controller states. 35 * @idle_state: The mux controller sta 37 * @idle_state: The mux controller state to use when inactive, or one 36 * of MUX_IDLE_AS_IS and 38 * of MUX_IDLE_AS_IS and MUX_IDLE_DISCONNECT. 37 * @last_change: Timestamp of last chan << 38 * 39 * 39 * Mux drivers may only change @states and @id 40 * Mux drivers may only change @states and @idle_state, and may only do so 40 * between allocation and registration of the 41 * between allocation and registration of the mux controller. Specifically, 41 * @cached_state is internal to the mux core a 42 * @cached_state is internal to the mux core and should never be written by 42 * mux drivers. 43 * mux drivers. 43 */ 44 */ 44 struct mux_control { 45 struct mux_control { 45 struct semaphore lock; /* protects the 46 struct semaphore lock; /* protects the state of the mux */ 46 47 47 struct mux_chip *chip; 48 struct mux_chip *chip; 48 int cached_state; 49 int cached_state; 49 50 50 unsigned int states; 51 unsigned int states; 51 int idle_state; 52 int idle_state; 52 << 53 ktime_t last_change; << 54 }; 53 }; 55 54 56 /** 55 /** 57 * struct mux_chip - Represents a chip hold 56 * struct mux_chip - Represents a chip holding mux controllers. 58 * @controllers: Number of mux controll 57 * @controllers: Number of mux controllers handled by the chip. 59 * @mux: Array of mux controlle 58 * @mux: Array of mux controllers that are handled. 60 * @dev: Device structure. 59 * @dev: Device structure. 61 * @id: Used to identify the d 60 * @id: Used to identify the device internally. 62 * @ops: Mux controller operati 61 * @ops: Mux controller operations. 63 */ 62 */ 64 struct mux_chip { 63 struct mux_chip { 65 unsigned int controllers; 64 unsigned int controllers; 66 struct mux_control *mux; 65 struct mux_control *mux; 67 struct device dev; 66 struct device dev; 68 int id; 67 int id; 69 68 70 const struct mux_control_ops *ops; 69 const struct mux_control_ops *ops; 71 }; 70 }; 72 71 73 #define to_mux_chip(x) container_of((x), struc 72 #define to_mux_chip(x) container_of((x), struct mux_chip, dev) 74 73 75 /** 74 /** 76 * mux_chip_priv() - Get the extra memory rese 75 * mux_chip_priv() - Get the extra memory reserved by mux_chip_alloc(). 77 * @mux_chip: The mux-chip to get the private 76 * @mux_chip: The mux-chip to get the private memory from. 78 * 77 * 79 * Return: Pointer to the private memory reser 78 * Return: Pointer to the private memory reserved by the allocator. 80 */ 79 */ 81 static inline void *mux_chip_priv(struct mux_c 80 static inline void *mux_chip_priv(struct mux_chip *mux_chip) 82 { 81 { 83 return &mux_chip->mux[mux_chip->contro 82 return &mux_chip->mux[mux_chip->controllers]; 84 } 83 } 85 84 86 struct mux_chip *mux_chip_alloc(struct device 85 struct mux_chip *mux_chip_alloc(struct device *dev, 87 unsigned int c 86 unsigned int controllers, size_t sizeof_priv); 88 int mux_chip_register(struct mux_chip *mux_chi 87 int mux_chip_register(struct mux_chip *mux_chip); 89 void mux_chip_unregister(struct mux_chip *mux_ 88 void mux_chip_unregister(struct mux_chip *mux_chip); 90 void mux_chip_free(struct mux_chip *mux_chip); 89 void mux_chip_free(struct mux_chip *mux_chip); 91 90 92 struct mux_chip *devm_mux_chip_alloc(struct de 91 struct mux_chip *devm_mux_chip_alloc(struct device *dev, 93 unsigned 92 unsigned int controllers, 94 size_t si 93 size_t sizeof_priv); 95 int devm_mux_chip_register(struct device *dev, 94 int devm_mux_chip_register(struct device *dev, struct mux_chip *mux_chip); 96 95 97 /** 96 /** 98 * mux_control_get_index() - Get the index of 97 * mux_control_get_index() - Get the index of the given mux controller 99 * @mux: The mux-control to get the index for. 98 * @mux: The mux-control to get the index for. 100 * 99 * 101 * Return: The index of the mux controller wit 100 * Return: The index of the mux controller within the mux chip the mux 102 * controller is a part of. 101 * controller is a part of. 103 */ 102 */ 104 static inline unsigned int mux_control_get_ind 103 static inline unsigned int mux_control_get_index(struct mux_control *mux) 105 { 104 { 106 return mux - mux->chip->mux; 105 return mux - mux->chip->mux; 107 } 106 } 108 107 109 #endif /* _LINUX_MUX_DRIVER_H */ 108 #endif /* _LINUX_MUX_DRIVER_H */ 110 109
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