1 /* SPDX-License-Identifier: GPL-2.0-or-later * <<
2 /* 1 /*
3 * NXP (Philips) SCC+++(SCN+++) serial driver 2 * NXP (Philips) SCC+++(SCN+++) serial driver
4 * 3 *
5 * Copyright (C) 2012 Alexander Shiyan <shc_w 4 * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru>
6 * 5 *
7 * Based on sc26xx.c, by Thomas Bogendörfer 6 * Based on sc26xx.c, by Thomas Bogendörfer (tsbogend@alpha.franken.de)
>> 7 *
>> 8 * This program is free software; you can redistribute it and/or modify
>> 9 * it under the terms of the GNU General Public License as published by
>> 10 * the Free Software Foundation; either version 2 of the License, or
>> 11 * (at your option) any later version.
8 */ 12 */
9 13
10 #ifndef _PLATFORM_DATA_SERIAL_SCCNXP_H_ 14 #ifndef _PLATFORM_DATA_SERIAL_SCCNXP_H_
11 #define _PLATFORM_DATA_SERIAL_SCCNXP_H_ 15 #define _PLATFORM_DATA_SERIAL_SCCNXP_H_
12 16
13 #define SCCNXP_MAX_UARTS 2 17 #define SCCNXP_MAX_UARTS 2
14 18
15 /* Output lines */ 19 /* Output lines */
16 #define LINE_OP0 1 20 #define LINE_OP0 1
17 #define LINE_OP1 2 21 #define LINE_OP1 2
18 #define LINE_OP2 3 22 #define LINE_OP2 3
19 #define LINE_OP3 4 23 #define LINE_OP3 4
20 #define LINE_OP4 5 24 #define LINE_OP4 5
21 #define LINE_OP5 6 25 #define LINE_OP5 6
22 #define LINE_OP6 7 26 #define LINE_OP6 7
23 #define LINE_OP7 8 27 #define LINE_OP7 8
24 28
25 /* Input lines */ 29 /* Input lines */
26 #define LINE_IP0 9 30 #define LINE_IP0 9
27 #define LINE_IP1 10 31 #define LINE_IP1 10
28 #define LINE_IP2 11 32 #define LINE_IP2 11
29 #define LINE_IP3 12 33 #define LINE_IP3 12
30 #define LINE_IP4 13 34 #define LINE_IP4 13
31 #define LINE_IP5 14 35 #define LINE_IP5 14
32 #define LINE_IP6 15 36 #define LINE_IP6 15
33 37
34 /* Signals */ 38 /* Signals */
35 #define DTR_OP 0 /* DTR 39 #define DTR_OP 0 /* DTR */
36 #define RTS_OP 4 /* RTS 40 #define RTS_OP 4 /* RTS */
37 #define DSR_IP 8 /* DSR 41 #define DSR_IP 8 /* DSR */
38 #define CTS_IP 12 /* CTS 42 #define CTS_IP 12 /* CTS */
39 #define DCD_IP 16 /* DCD 43 #define DCD_IP 16 /* DCD */
40 #define RNG_IP 20 /* RNG 44 #define RNG_IP 20 /* RNG */
41 45
42 #define DIR_OP 24 /* Spe 46 #define DIR_OP 24 /* Special signal for control RS-485.
43 * Goe 47 * Goes high when transmit,
44 * the 48 * then goes low.
45 */ 49 */
46 50
47 /* Routing control signal 'sig' to line 'line' 51 /* Routing control signal 'sig' to line 'line' */
48 #define MCTRL_SIG(sig, line) ((line) << (si 52 #define MCTRL_SIG(sig, line) ((line) << (sig))
49 53
50 /* 54 /*
51 * Example board initialization data: 55 * Example board initialization data:
52 * 56 *
53 * static struct resource sc2892_resources[] = 57 * static struct resource sc2892_resources[] = {
54 * DEFINE_RES_MEM(UART_PHYS_START, 0x10), 58 * DEFINE_RES_MEM(UART_PHYS_START, 0x10),
55 * DEFINE_RES_IRQ(IRQ_EXT2), 59 * DEFINE_RES_IRQ(IRQ_EXT2),
56 * }; 60 * };
57 * 61 *
58 * static struct sccnxp_pdata sc2892_info = { 62 * static struct sccnxp_pdata sc2892_info = {
>> 63 * .frequency = 3686400,
59 * .mctrl_cfg[0] = MCTRL_SIG(DIR_OP, LI 64 * .mctrl_cfg[0] = MCTRL_SIG(DIR_OP, LINE_OP0),
60 * .mctrl_cfg[1] = MCTRL_SIG(DIR_OP, LI 65 * .mctrl_cfg[1] = MCTRL_SIG(DIR_OP, LINE_OP1),
61 * }; 66 * };
62 * 67 *
63 * static struct platform_device sc2892 = { 68 * static struct platform_device sc2892 = {
64 * .name = "sc2892", 69 * .name = "sc2892",
65 * .id = -1, 70 * .id = -1,
66 * .resource = sc2892_resources, 71 * .resource = sc2892_resources,
67 * .num_resources = ARRAY_SIZE(sc2892_re 72 * .num_resources = ARRAY_SIZE(sc2892_resources),
68 * .dev = { 73 * .dev = {
69 * .platform_data = &sc2892_info 74 * .platform_data = &sc2892_info,
70 * }, 75 * },
71 * }; 76 * };
72 */ 77 */
73 78
74 /* SCCNXP platform data structure */ 79 /* SCCNXP platform data structure */
75 struct sccnxp_pdata { 80 struct sccnxp_pdata {
>> 81 /* Frequency (extrenal clock or crystal) */
>> 82 int frequency;
76 /* Shift for A0 line */ 83 /* Shift for A0 line */
77 const u8 reg_shift; 84 const u8 reg_shift;
78 /* Modem control lines configuration * 85 /* Modem control lines configuration */
79 const u32 mctrl_cfg[SCCN 86 const u32 mctrl_cfg[SCCNXP_MAX_UARTS];
80 /* Timer value for polling mode (usecs 87 /* Timer value for polling mode (usecs) */
81 const unsigned int poll_time_us; 88 const unsigned int poll_time_us;
82 }; 89 };
83 90
84 #endif 91 #endif
85 92
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