1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* 2 /*
3 * max8952.h - Voltage regulation for the Maxi 3 * max8952.h - Voltage regulation for the Maxim 8952
4 * 4 *
5 * Copyright (C) 2010 Samsung Electrnoics 5 * Copyright (C) 2010 Samsung Electrnoics
6 * MyungJoo Ham <myungjoo.ham@samsung.com> 6 * MyungJoo Ham <myungjoo.ham@samsung.com>
7 */ 7 */
8 8
9 #ifndef REGULATOR_MAX8952 9 #ifndef REGULATOR_MAX8952
10 #define REGULATOR_MAX8952 10 #define REGULATOR_MAX8952
11 11
12 #include <linux/regulator/machine.h> 12 #include <linux/regulator/machine.h>
13 13
14 enum { 14 enum {
15 MAX8952_DVS_MODE0, 15 MAX8952_DVS_MODE0,
16 MAX8952_DVS_MODE1, 16 MAX8952_DVS_MODE1,
17 MAX8952_DVS_MODE2, 17 MAX8952_DVS_MODE2,
18 MAX8952_DVS_MODE3, 18 MAX8952_DVS_MODE3,
19 }; 19 };
20 20
21 enum { 21 enum {
22 MAX8952_DVS_770mV = 0, 22 MAX8952_DVS_770mV = 0,
23 MAX8952_DVS_780mV, 23 MAX8952_DVS_780mV,
24 MAX8952_DVS_790mV, 24 MAX8952_DVS_790mV,
25 MAX8952_DVS_800mV, 25 MAX8952_DVS_800mV,
26 MAX8952_DVS_810mV, 26 MAX8952_DVS_810mV,
27 MAX8952_DVS_820mV, 27 MAX8952_DVS_820mV,
28 MAX8952_DVS_830mV, 28 MAX8952_DVS_830mV,
29 MAX8952_DVS_840mV, 29 MAX8952_DVS_840mV,
30 MAX8952_DVS_850mV, 30 MAX8952_DVS_850mV,
31 MAX8952_DVS_860mV, 31 MAX8952_DVS_860mV,
32 MAX8952_DVS_870mV, 32 MAX8952_DVS_870mV,
33 MAX8952_DVS_880mV, 33 MAX8952_DVS_880mV,
34 MAX8952_DVS_890mV, 34 MAX8952_DVS_890mV,
35 MAX8952_DVS_900mV, 35 MAX8952_DVS_900mV,
36 MAX8952_DVS_910mV, 36 MAX8952_DVS_910mV,
37 MAX8952_DVS_920mV, 37 MAX8952_DVS_920mV,
38 MAX8952_DVS_930mV, 38 MAX8952_DVS_930mV,
39 MAX8952_DVS_940mV, 39 MAX8952_DVS_940mV,
40 MAX8952_DVS_950mV, 40 MAX8952_DVS_950mV,
41 MAX8952_DVS_960mV, 41 MAX8952_DVS_960mV,
42 MAX8952_DVS_970mV, 42 MAX8952_DVS_970mV,
43 MAX8952_DVS_980mV, 43 MAX8952_DVS_980mV,
44 MAX8952_DVS_990mV, 44 MAX8952_DVS_990mV,
45 MAX8952_DVS_1000mV, 45 MAX8952_DVS_1000mV,
46 MAX8952_DVS_1010mV, 46 MAX8952_DVS_1010mV,
47 MAX8952_DVS_1020mV, 47 MAX8952_DVS_1020mV,
48 MAX8952_DVS_1030mV, 48 MAX8952_DVS_1030mV,
49 MAX8952_DVS_1040mV, 49 MAX8952_DVS_1040mV,
50 MAX8952_DVS_1050mV, 50 MAX8952_DVS_1050mV,
51 MAX8952_DVS_1060mV, 51 MAX8952_DVS_1060mV,
52 MAX8952_DVS_1070mV, 52 MAX8952_DVS_1070mV,
53 MAX8952_DVS_1080mV, 53 MAX8952_DVS_1080mV,
54 MAX8952_DVS_1090mV, 54 MAX8952_DVS_1090mV,
55 MAX8952_DVS_1100mV, 55 MAX8952_DVS_1100mV,
56 MAX8952_DVS_1110mV, 56 MAX8952_DVS_1110mV,
57 MAX8952_DVS_1120mV, 57 MAX8952_DVS_1120mV,
58 MAX8952_DVS_1130mV, 58 MAX8952_DVS_1130mV,
59 MAX8952_DVS_1140mV, 59 MAX8952_DVS_1140mV,
60 MAX8952_DVS_1150mV, 60 MAX8952_DVS_1150mV,
61 MAX8952_DVS_1160mV, 61 MAX8952_DVS_1160mV,
62 MAX8952_DVS_1170mV, 62 MAX8952_DVS_1170mV,
63 MAX8952_DVS_1180mV, 63 MAX8952_DVS_1180mV,
64 MAX8952_DVS_1190mV, 64 MAX8952_DVS_1190mV,
65 MAX8952_DVS_1200mV, 65 MAX8952_DVS_1200mV,
66 MAX8952_DVS_1210mV, 66 MAX8952_DVS_1210mV,
67 MAX8952_DVS_1220mV, 67 MAX8952_DVS_1220mV,
68 MAX8952_DVS_1230mV, 68 MAX8952_DVS_1230mV,
69 MAX8952_DVS_1240mV, 69 MAX8952_DVS_1240mV,
70 MAX8952_DVS_1250mV, 70 MAX8952_DVS_1250mV,
71 MAX8952_DVS_1260mV, 71 MAX8952_DVS_1260mV,
72 MAX8952_DVS_1270mV, 72 MAX8952_DVS_1270mV,
73 MAX8952_DVS_1280mV, 73 MAX8952_DVS_1280mV,
74 MAX8952_DVS_1290mV, 74 MAX8952_DVS_1290mV,
75 MAX8952_DVS_1300mV, 75 MAX8952_DVS_1300mV,
76 MAX8952_DVS_1310mV, 76 MAX8952_DVS_1310mV,
77 MAX8952_DVS_1320mV, 77 MAX8952_DVS_1320mV,
78 MAX8952_DVS_1330mV, 78 MAX8952_DVS_1330mV,
79 MAX8952_DVS_1340mV, 79 MAX8952_DVS_1340mV,
80 MAX8952_DVS_1350mV, 80 MAX8952_DVS_1350mV,
81 MAX8952_DVS_1360mV, 81 MAX8952_DVS_1360mV,
82 MAX8952_DVS_1370mV, 82 MAX8952_DVS_1370mV,
83 MAX8952_DVS_1380mV, 83 MAX8952_DVS_1380mV,
84 MAX8952_DVS_1390mV, 84 MAX8952_DVS_1390mV,
85 MAX8952_DVS_1400mV, 85 MAX8952_DVS_1400mV,
86 }; 86 };
87 87
88 enum { 88 enum {
89 MAX8952_SYNC_FREQ_26MHZ, /* Default */ 89 MAX8952_SYNC_FREQ_26MHZ, /* Default */
90 MAX8952_SYNC_FREQ_13MHZ, 90 MAX8952_SYNC_FREQ_13MHZ,
91 MAX8952_SYNC_FREQ_19_2MHZ, 91 MAX8952_SYNC_FREQ_19_2MHZ,
92 }; 92 };
93 93
94 enum { 94 enum {
95 MAX8952_RAMP_32mV_us = 0, /* Default * 95 MAX8952_RAMP_32mV_us = 0, /* Default */
96 MAX8952_RAMP_16mV_us, 96 MAX8952_RAMP_16mV_us,
97 MAX8952_RAMP_8mV_us, 97 MAX8952_RAMP_8mV_us,
98 MAX8952_RAMP_4mV_us, 98 MAX8952_RAMP_4mV_us,
99 MAX8952_RAMP_2mV_us, 99 MAX8952_RAMP_2mV_us,
100 MAX8952_RAMP_1mV_us, 100 MAX8952_RAMP_1mV_us,
101 MAX8952_RAMP_0_5mV_us, 101 MAX8952_RAMP_0_5mV_us,
102 MAX8952_RAMP_0_25mV_us, 102 MAX8952_RAMP_0_25mV_us,
103 }; 103 };
104 104
105 #define MAX8952_NUM_DVS_MODE 4 105 #define MAX8952_NUM_DVS_MODE 4
106 106
107 struct max8952_platform_data { 107 struct max8952_platform_data {
108 u32 default_mode; 108 u32 default_mode;
109 u32 dvs_mode[MAX8952_NUM_DVS_MODE]; /* 109 u32 dvs_mode[MAX8952_NUM_DVS_MODE]; /* MAX8952_DVS_MODEx_XXXXmV */
110 110
111 u32 sync_freq; 111 u32 sync_freq;
112 u32 ramp_speed; 112 u32 ramp_speed;
113 113
114 struct regulator_init_data *reg_data; 114 struct regulator_init_data *reg_data;
115 }; 115 };
116 116
117 117
118 #endif /* REGULATOR_MAX8952 */ 118 #endif /* REGULATOR_MAX8952 */
119 119
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