1 /* SPDX-License-Identifier: GPL-2.0 */ 1
2 #ifndef __LINUX_SERIAL_SCI_H
3 #define __LINUX_SERIAL_SCI_H
4
5 #include <linux/bitops.h>
6 #include <linux/serial_core.h>
7 #include <linux/sh_dma.h>
8
9 /*
10 * Generic header for SuperH (H)SCI(F) (used b
11 */
12
13 /* Serial Control Register (@ = not supported
14 #define SCSCR_TIE BIT(7) /* Transmit In
15 #define SCSCR_RIE BIT(6) /* Receive Int
16 #define SCSCR_TE BIT(5) /* Transmit En
17 #define SCSCR_RE BIT(4) /* Receive Ena
18 #define SCSCR_REIE BIT(3) /* Receive Err
19 #define SCSCR_TOIE BIT(2) /* Timeout Int
20 #define SCSCR_CKE1 BIT(1) /* Clock Enabl
21 #define SCSCR_CKE0 BIT(0) /* Clock Enabl
22
23
24 enum {
25 SCIx_PROBE_REGTYPE,
26
27 SCIx_SCI_REGTYPE,
28 SCIx_IRDA_REGTYPE,
29 SCIx_SCIFA_REGTYPE,
30 SCIx_SCIFB_REGTYPE,
31 SCIx_SH2_SCIF_FIFODATA_REGTYPE,
32 SCIx_SH3_SCIF_REGTYPE,
33 SCIx_SH4_SCIF_REGTYPE,
34 SCIx_SH4_SCIF_BRG_REGTYPE,
35 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
36 SCIx_SH4_SCIF_FIFODATA_REGTYPE,
37 SCIx_SH7705_SCIF_REGTYPE,
38 SCIx_HSCIF_REGTYPE,
39 SCIx_RZ_SCIFA_REGTYPE,
40 SCIx_RZV2H_SCIF_REGTYPE,
41
42 SCIx_NR_REGTYPES,
43 };
44
45 struct plat_sci_port_ops {
46 void (*init_pins)(struct uart_port *,
47 };
48
49 /*
50 * Platform device specific platform_data stru
51 */
52 struct plat_sci_port {
53 unsigned int type;
54 upf_t flags;
55
56 unsigned int sampling_rate;
57 unsigned int scscr;
58
59 /*
60 * Platform overrides if necessary, de
61 */
62 unsigned char regtype;
63
64 struct plat_sci_port_ops *ops;
65 };
66
67 #endif /* __LINUX_SERIAL_SCI_H */
68
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