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TOMOYO Linux Cross Reference
Linux/include/linux/smscphy.h

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Diff markup

Differences between /include/linux/smscphy.h (Version linux-6.12-rc7) and /include/linux/smscphy.h (Version linux-5.14.21)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 /* SPDX-License-Identifier: GPL-2.0 */
  2 #ifndef __LINUX_SMSCPHY_H__                         2 #ifndef __LINUX_SMSCPHY_H__
  3 #define __LINUX_SMSCPHY_H__                         3 #define __LINUX_SMSCPHY_H__
  4                                                     4 
  5 #define MII_LAN83C185_ISF 29 /* Interrupt Sour      5 #define MII_LAN83C185_ISF 29 /* Interrupt Source Flags */
  6 #define MII_LAN83C185_IM  30 /* Interrupt Mask      6 #define MII_LAN83C185_IM  30 /* Interrupt Mask */
  7 #define MII_LAN83C185_CTRL_STATUS 17 /* Mode/S      7 #define MII_LAN83C185_CTRL_STATUS 17 /* Mode/Status Register */
  8 #define MII_LAN83C185_SPECIAL_MODES 18 /* Spec      8 #define MII_LAN83C185_SPECIAL_MODES 18 /* Special Modes Register */
  9                                                     9 
 10 #define MII_LAN83C185_ISF_INT1 (1<<1) /* Auto-     10 #define MII_LAN83C185_ISF_INT1 (1<<1) /* Auto-Negotiation Page Received */
 11 #define MII_LAN83C185_ISF_INT2 (1<<2) /* Paral     11 #define MII_LAN83C185_ISF_INT2 (1<<2) /* Parallel Detection Fault */
 12 #define MII_LAN83C185_ISF_INT3 (1<<3) /* Auto-     12 #define MII_LAN83C185_ISF_INT3 (1<<3) /* Auto-Negotiation LP Ack */
 13 #define MII_LAN83C185_ISF_INT4 (1<<4) /* Link      13 #define MII_LAN83C185_ISF_INT4 (1<<4) /* Link Down */
 14 #define MII_LAN83C185_ISF_INT5 (1<<5) /* Remot     14 #define MII_LAN83C185_ISF_INT5 (1<<5) /* Remote Fault Detected */
 15 #define MII_LAN83C185_ISF_INT6 (1<<6) /* Auto-     15 #define MII_LAN83C185_ISF_INT6 (1<<6) /* Auto-Negotiation complete */
 16 #define MII_LAN83C185_ISF_INT7 (1<<7) /* ENERG     16 #define MII_LAN83C185_ISF_INT7 (1<<7) /* ENERGYON */
 17                                                    17 
 18 #define MII_LAN83C185_ISF_INT_ALL (0x0e)           18 #define MII_LAN83C185_ISF_INT_ALL (0x0e)
 19                                                    19 
 20 #define MII_LAN83C185_ISF_INT_PHYLIB_EVENTS \      20 #define MII_LAN83C185_ISF_INT_PHYLIB_EVENTS \
 21         (MII_LAN83C185_ISF_INT6 | MII_LAN83C18     21         (MII_LAN83C185_ISF_INT6 | MII_LAN83C185_ISF_INT4 | \
 22          MII_LAN83C185_ISF_INT7)                   22          MII_LAN83C185_ISF_INT7)
 23                                                    23 
 24 #define MII_LAN83C185_EDPWRDOWN (1 << 13) /* E     24 #define MII_LAN83C185_EDPWRDOWN (1 << 13) /* EDPWRDOWN */
 25 #define MII_LAN83C185_ENERGYON  (1 << 1)  /* E     25 #define MII_LAN83C185_ENERGYON  (1 << 1)  /* ENERGYON */
 26                                                    26 
 27 #define MII_LAN83C185_MODE_MASK      0xE0          27 #define MII_LAN83C185_MODE_MASK      0xE0
 28 #define MII_LAN83C185_MODE_POWERDOWN 0xC0 /* P     28 #define MII_LAN83C185_MODE_POWERDOWN 0xC0 /* Power Down mode */
 29 #define MII_LAN83C185_MODE_ALL       0xE0 /* A     29 #define MII_LAN83C185_MODE_ALL       0xE0 /* All capable mode */
 30                                                    30 
 31 int smsc_phy_config_intr(struct phy_device *ph << 
 32 irqreturn_t smsc_phy_handle_interrupt(struct p << 
 33 int smsc_phy_config_init(struct phy_device *ph << 
 34 int lan87xx_read_status(struct phy_device *phy << 
 35 int smsc_phy_get_tunable(struct phy_device *ph << 
 36                          struct ethtool_tunabl << 
 37 int smsc_phy_set_tunable(struct phy_device *ph << 
 38                          struct ethtool_tunabl << 
 39 int smsc_phy_probe(struct phy_device *phydev); << 
 40                                                << 
 41 #define MII_LAN874X_PHY_MMD_WOL_WUCSR          << 
 42 #define MII_LAN874X_PHY_MMD_WOL_WUF_CFGA       << 
 43 #define MII_LAN874X_PHY_MMD_WOL_WUF_CFGB       << 
 44 #define MII_LAN874X_PHY_MMD_WOL_WUF_MASK0      << 
 45 #define MII_LAN874X_PHY_MMD_WOL_WUF_MASK1      << 
 46 #define MII_LAN874X_PHY_MMD_WOL_WUF_MASK2      << 
 47 #define MII_LAN874X_PHY_MMD_WOL_WUF_MASK3      << 
 48 #define MII_LAN874X_PHY_MMD_WOL_WUF_MASK4      << 
 49 #define MII_LAN874X_PHY_MMD_WOL_WUF_MASK5      << 
 50 #define MII_LAN874X_PHY_MMD_WOL_WUF_MASK6      << 
 51 #define MII_LAN874X_PHY_MMD_WOL_WUF_MASK7      << 
 52 #define MII_LAN874X_PHY_MMD_WOL_RX_ADDRA       << 
 53 #define MII_LAN874X_PHY_MMD_WOL_RX_ADDRB       << 
 54 #define MII_LAN874X_PHY_MMD_WOL_RX_ADDRC       << 
 55 #define MII_LAN874X_PHY_MMD_MCFGR              << 
 56                                                << 
 57 #define MII_LAN874X_PHY_PME1_SET               << 
 58 #define MII_LAN874X_PHY_PME2_SET               << 
 59 #define MII_LAN874X_PHY_PME_SELF_CLEAR         << 
 60 #define MII_LAN874X_PHY_WOL_PFDA_FR            << 
 61 #define MII_LAN874X_PHY_WOL_WUFR               << 
 62 #define MII_LAN874X_PHY_WOL_MPR                << 
 63 #define MII_LAN874X_PHY_WOL_BCAST_FR           << 
 64 #define MII_LAN874X_PHY_WOL_PFDAEN             << 
 65 #define MII_LAN874X_PHY_WOL_WUEN               << 
 66 #define MII_LAN874X_PHY_WOL_MPEN               << 
 67 #define MII_LAN874X_PHY_WOL_BCSTEN             << 
 68                                                << 
 69 #define MII_LAN874X_PHY_WOL_FILTER_EN          << 
 70 #define MII_LAN874X_PHY_WOL_FILTER_MCASTTEN    << 
 71 #define MII_LAN874X_PHY_WOL_FILTER_BCSTEN      << 
 72                                                << 
 73 #define MII_LAN874X_PHY_PME_SELF_CLEAR_DELAY   << 
 74                                                << 
 75 #endif /* __LINUX_SMSCPHY_H__ */                   31 #endif /* __LINUX_SMSCPHY_H__ */
 76                                                    32 

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